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71. 发明授权

US07244975B2 High-voltage device structure 有权
标题翻译：高压器件结构
公开(公告)号：US07244975B2
公开(公告)日：2007-07-17
申请号：US11160657
申请日：2005-07-05
申请人： Anchor Chen , Chih-Hung Lin , Hwi-Huang Chen , Jih-Wei Liou , Chin-Hung Liu , Ming-Tsung Tung , Chien-Ming Lin , Jung-Ching Chen
发明人： Anchor Chen , Chih-Hung Lin , Hwi-Huang Chen , Jih-Wei Liou , Chin-Hung Liu , Ming-Tsung Tung , Chien-Ming Lin , Jung-Ching Chen
IPC分类号： H01L27/10 , H01L29/739 , H01L29/73 , H01L29/76 , H01L29/94
CPC分类号： H01L29/0692 , H01L29/0638 , H01L29/1041 , H01L29/7833
摘要： A high-voltage device structure includes a high-voltage device disposed on a semiconductor substrate. The semiconductor includes an active region and an isolation region, and the high-voltage device is disposed in the active region. The high-voltage device structure includes a source diffusion region of a first conductive type, a drain region of the first conductive type, and a gate longer than the source diffusion region and the drain diffusion region so as to form spare regions on both sides of the gate. The isolation region is outside the active region and surrounds the active region. In the isolation region, an isolation ion implantation region of a second conductive type and an extended ion implantation region are disposed to prevent parasitic current from being generating between the source diffusion region and the drain diffusion region.
摘要翻译：高压器件结构包括设置在半导体衬底上的高电压器件。半导体包括有源区和隔离区，高压器件设置在有源区中。高电压器件结构包括第一导电类型的源极扩散区域，第一导电类型的漏极区域和比源极扩散区域和漏极扩散区域更长的栅极，以在第二导电类型的两侧形成备用区域大门。隔离区域在有源区域之外并且围绕有源区域。在隔离区域中，设置第二导电型隔离离子注入区域和延伸离子注入区域，以防止在源极扩散区域和漏极扩散区域之间产生寄生电流。

72. 发明申请

US20070125173A1 Ergonomic inertial positioning systems and methods 有权
标题翻译：人体工学惯性定位系统及方法
公开(公告)号：US20070125173A1
公开(公告)日：2007-06-07
申请号：US11365878
申请日：2006-03-02
申请人： Chih-Hung Lin , Zhi-Hong Zhu , Yung-Jin Wu , Tung-Wu Lu , Shih-Hsiang Liu
发明人： Chih-Hung Lin , Zhi-Hong Zhu , Yung-Jin Wu , Tung-Wu Lu , Shih-Hsiang Liu
IPC分类号： G01P15/00
CPC分类号： G01C21/165 , Y10T74/2028
摘要： An ergonomic inertial positioning system comprises a motion sensor, an angle sensor, and a processor. The motion sensor detects movement of an object. The angle sensor detects angle variation of the heading of the object. The processor determines motion status of the object based on detected data provided by the motion sensor and the angle sensor, and calculates displacement of the object utilizing the detected angle variation thereof based on the motion status.
摘要翻译：符合人体工程学的惯性定位系统包括运动传感器，角度传感器和处理器。运动传感器检测物体的移动。角度传感器检测物体的航向的角度变化。处理器基于由运动传感器和角度传感器提供的检测数据来确定对象的运动状态，并且基于运动状态来利用其检测到的角度变化来计算物体的位移。

73. 发明授权

US06521487B1 Method for making a thyristor 有权
标题翻译：制造晶闸管的方法
公开(公告)号：US06521487B1
公开(公告)日：2003-02-18
申请号：US09683248
申请日：2001-12-05
申请人： Yen-Chang Chen , Chih-Hung Lin
发明人： Yen-Chang Chen , Chih-Hung Lin
IPC分类号： H01L21332
CPC分类号： H01L29/66393 , H01L27/0617 , H01L27/0817
摘要： A semiconductor substrate has at least one active area and a STI surrounding the active area. An N-well and an adjacent P-well are formed in the active area. A dummy gate is formed atop the border between the N-well and the P-well, while simultaneously forming gates for other MOS transistors on the semiconductor substrate. A spacer is formed on the periphery of each gate. Finally, an N-type ion implantation process and a P-type ion implantation process are performed to form a cathode and an anode for the silicon controlled rectifier device in the P-well and the N-well between the STI and the dummy gate.
摘要翻译：半导体衬底具有至少一个有源区和围绕有源区的STI。在有源区域中形成N阱和相邻的P阱。在N阱和P阱之间的边界顶部形成虚拟栅极，同时在半导体衬底上形成用于其它MOS晶体管的栅极。在每个栅极的周围形成间隔物。最后，进行N型离子注入工艺和P型离子注入工艺，以形成P阱中的可控硅整流器件的阴极和阳极，以及在STI和伪栅之间的N阱中形成阴极和阳极。

74. 发明授权

US06380695B1 Driving device for fluorescent tube 有权
标题翻译：荧光灯管驱动装置
公开(公告)号：US06380695B1
公开(公告)日：2002-04-30
申请号：US09729268
申请日：2000-12-05
申请人： Chih-Hung Lin , Jung Chan Hsieh
发明人： Chih-Hung Lin , Jung Chan Hsieh
IPC分类号： G05F100
CPC分类号： H02M7/5381 , H05B41/2824 , H05B41/3927
摘要： A driving device for a fluorescent tube has a high frequency oscillator which outputs a high frequency AC signal. A pulse width modulator is connected to the high frequency oscillator for outputting a PWM harmonic frequency signal. A first power switch is connected to the pulse width modulator for being turned off during a positive half-cycle of the PWM harmonic frequency signal and being turned on during a negative half-cycle of the PWM harmonic frequency signal. A second power switch is connected to the pulse width modulator for being turned on during the positive half-cycle of the PWM harmonic frequency signal and being turned off during the negative half-cycle of the PWM harmonic frequency signal. A piezoelectric transformer includes a primary winding having two input terminals connected to the first power switch and the second power switch, respectively, and a center terminal connected to the output terminal of the pulse width modulator.
摘要翻译：用于荧光管的驱动装置具有输出高频AC信号的高频振荡器。脉冲宽度调制器连接到高频振荡器，用于输出PWM谐波频率信号。第一电源开关连接到脉宽调制器，在PWM谐波频率信号的正半周期期间被关断，并且在PWM谐波频率信号的负半周期期间导通。第二电源开关连接到脉宽调制器，在PWM谐波频率信号的正半周期期间导通，并在PWM谐波频率信号的负半周期期间关断。压电变压器包括分别具有连接到第一电源开关和第二电源开关的两个输入端子的初级绕组和连接到脉冲宽度调制器的输出端子的中心端子。

75. 发明授权

US06249022B1 Trench flash memory with nitride spacers for electron trapping 失效
标题翻译：沟槽闪存，用于电子捕获的氮化物间隔物
公开(公告)号：US06249022B1
公开(公告)日：2001-06-19
申请号：US09425395
申请日：1999-10-22
申请人： Chih-Hung Lin , Robin Lee
发明人： Chih-Hung Lin , Robin Lee
IPC分类号： H01L218228
CPC分类号： H01L29/66833 , H01L21/28282 , H01L29/7923
摘要： A method for fabricating a flash memory cell is described. A conformal ultra thin oxide layer is formed on a substrate having a trench formed therein, followed by forming silicon nitride spacers on the portion of the ultra thin oxide layer which covers the sidewalls of the trench. The silicon nitride spacers are separated into a first silicon nitride spacer on the right sidewall and a second silicon nitride spacer on the left sidewall. Thereafter, a gate oxide layer is formed on the silicon nitride spacers, followed by forming a polysilicon gate on the gate oxide layer in the substrate. Subsequently, a source/drain region is formed on both sides of the polysilicon gate in the substrate.
摘要翻译：描述了一种制造闪存单元的方法。在其上形成有沟槽的衬底上形成共形的超薄氧化物层，然后在覆盖沟槽的侧壁的超薄氧化物层的部分上形成氮化硅间隔物。氮化硅间隔物被分成右侧壁上的第一氮化硅间隔物和左侧壁上的第二氮化硅间隔物。此后，在氮化硅间隔物上形成栅极氧化层，随后在衬底的栅极氧化物层上形成多晶硅栅极。随后，在衬底中的多晶硅栅极的两侧上形成源/漏区。

76. 发明授权

US06222237B1 Structure of electrostatic discharge protection device 有权
标题翻译：静电放电保护装置结构
公开(公告)号：US06222237B1
公开(公告)日：2001-04-24
申请号：US09316584
申请日：1999-05-21
申请人： Chih-Hung Lin
发明人： Chih-Hung Lin
IPC分类号： H01L2362
CPC分类号： H01L27/0266 , H01L27/0288
摘要： A structure of an ESD protection device located between a pad and an internal circuit. The structure comprises a transistor with a source and a drain connecting to the ground, and an N+ resistor with its cross section comprising an N-well, a P-type doped region located in the N-well, and an N+ doped region located in the P-type doped region. The N+ doped region has a first terminal and a second terminal. The first terminal is connected electrically to the drain and the pad, while the second terminal is connected to the internal circuit.
摘要翻译：位于焊盘和内部电路之间的ESD保护器件的结构。该结构包括具有连接到地的源极和漏极的晶体管，并且N +电阻器的横截面包括N阱，位于N阱中的P型掺杂区域和位于N阱中的N +掺杂区域 P型掺杂区域。 N +掺杂区域具有第一端子和第二端子。第一端子与漏极和焊盘电连接，而第二端子连接到内部电路。

77. 发明授权

US5726081A Method of fabricating metal contact of ultra-large-scale integration metal-oxide semiconductor field effect transistor with silicon-on-insulator structure 失效
标题翻译：利用绝缘体上硅结构制造超大规模集成金属氧化物半导体场效应晶体管的金属接触方法
公开(公告)号：US5726081A
公开(公告)日：1998-03-10
申请号：US544659
申请日：1995-10-18
申请人： Chih-Hung Lin , Gary Hong
发明人： Chih-Hung Lin , Gary Hong
IPC分类号： H01L21/336 , H01L29/45 , H01L29/49 , H01L21/84
CPC分类号： H01L29/66772 , H01L29/41783 , H01L29/458 , H01L29/4908
摘要： In a method for fabricating a ULSI MOSFET with SOI structure, an additional polysilicon layer is used to form polysilicon/metal compound metal contacts on source and drain regions and a gate so as to avoid leakage current and short channel effect problems.
摘要翻译：在制造具有SOI结构的ULSI MOSFET的方法中，使用附加多晶硅层在源极和漏极区域和栅极上形成多晶硅/金属复合金属触点，以避免漏电流和短沟道效应问题。

78. 发明授权

US5686321A Local punchthrough stop for ultra large scale integration devices 失效
标题翻译：超大规模集成设备的本地突破
公开(公告)号：US5686321A
公开(公告)日：1997-11-11
申请号：US647266
申请日：1996-05-06
申请人： Joe Ko , Chih-Hung Lin
发明人： Joe Ko , Chih-Hung Lin
IPC分类号： H01L21/336 , H01L29/10 , H01L29/78 , H01L21/265
CPC分类号： H01L29/66583 , H01L29/1083 , H01L29/66537 , H01L29/66553 , H01L29/7833
摘要： The invention relates to an improved MOSFET device structure for use in ultra large scale integration and the method of forming the device structure. A local punchthrough stop region is formed directly under the gate electrode using ion implantation. The local punchthrough stop region reduces the expansion of the depletion region in the channel and thereby increases the punchthrough voltage. The local punchthrough stop region is self-aligned with the gate electrode and source/drain region so that critical spacings are maintained even for sub micron devices. The source and drain junction capacitances are also reduced. The invention can be used in either N channel or P channel MOSFET devices. The invention can be used with a conventional source/drain structure as well as a double doped drain structure and a light doped drain structure.
摘要翻译：本发明涉及用于超大规模集成的改进的MOSFET器件结构以及形成器件结构的方法。使用离子注入在栅电极正下方形成局部穿通停止区域。局部穿通停止区域减小了通道中耗尽区的扩展，从而增加了穿透电压。局部穿通停止区域与栅极电极和源极/漏极区域自对准，使得即使对于亚微米器件也保持临界间隔。源极和漏极结电容也减小。本发明可用于N沟道或P沟道MOSFET器件。本发明可以与传统的源极/漏极结构以及双掺杂漏极结构和掺杂掺杂的漏极结构一起使用。

79. 发明授权

US5646056A Method of fabricating ultra-large-scale integration metal-oxide semiconductor field effect transistor 失效
标题翻译：制造超大规模集成金属氧化物半导体场效应晶体管的方法
公开(公告)号：US5646056A
公开(公告)日：1997-07-08
申请号：US540776
申请日：1995-10-11
申请人： Chih-Hung Lin , Hwi-Huang Chen , Gary Hong
发明人： Chih-Hung Lin , Hwi-Huang Chen , Gary Hong
IPC分类号： H01L21/336 , H01L29/417 , H01L29/423 , H01L29/45 , H01L29/49 , H01L21/265
CPC分类号： H01L29/456 , H01L29/41775 , H01L29/66621 , H01L29/78 , H01L29/49
摘要： In a method for fabricating a ULSI MOSFET, an additional polysilicon layer is used to form polysilicon/metal compound metal contacts on source and drain regions and a gate so as to avoid leakage current and short channel effect problems.
摘要翻译：在制造ULSI MOSFET的方法中，使用附加的多晶硅层在源极和漏极区域和栅极上形成多晶硅/金属复合金属触点，以避免漏电流和短沟道效应问题。

80. 发明授权

US5518941A Maskless method for formation of a field implant channel stop region 失效
标题翻译：用于形成场注入通道停止区域的无掩模方法
公开(公告)号：US5518941A
公开(公告)日：1996-05-21
申请号：US312122
申请日：1994-09-26
申请人： Chih-Hung Lin , Joe Ko
发明人： Chih-Hung Lin , Joe Ko
IPC分类号： H01L21/336 , H01L21/762 , H01L21/265
CPC分类号： H01L29/6659 , H01L21/76202
摘要： This invention provides a method of forming a field implant channel stop region and a device using a field implant channel stop region to improve isolation between devices in integrated circuits using field effect transistors. The field implant channel stop region is formed without the use of an extra mask or extra masking steps by means of either a large angle tilted ion implant beam or a higher energy normally directed ion implant beam. The field implant channel stop region is formed with the mask used to form the light doped drain region in place. The field implant channel stop region forms a local increase in the doping level in the device well thereby forming the channel stop region.
摘要翻译：本发明提供一种形成场注入通道停止区域的方法和使用场注入通道停止区域的装置，以改善使用场效应晶体管的集成电路中的器件之间的隔离。通过大角度倾斜离子注入光束或较高能量的正向定向离子注入光束，形成场注入通道停止区域，而不需要使用额外的掩模或额外的掩模步骤。场用注入沟道阻挡区域形成有用于在适当位置形成光掺杂漏极区域的掩模。场注入沟道停止区域在器件阱中形成掺杂水平的局部增加，从而形成沟道停止区域。

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