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    • 72. 发明授权
    • Methods and apparatus for electrically and/or chemically-mechanically removing conductive material from a microelectronic substrate
    • 从微电子衬底电气和/或化学机械去除导电材料的方法和装置
    • US07160176B2
    • 2007-01-09
    • US09888002
    • 2001-06-21
    • Whonchee LeeScott G. MeikleScott E. Moore
    • Whonchee LeeScott G. MeikleScott E. Moore
    • B24B1/00
    • B23H5/08B24B1/002
    • A method and apparatus for removing conductive material from a microelectronic substrate. In one embodiment, a support member supports a microelectronic substrate relative to a material removal medium, which can include first and second electrodes and a polishing pad. One or more electrolytes are disposed between the electrodes and the microelectronic substrate to electrically link the electrodes to the microelectronic substrate. The electrodes are then coupled to a source of varying current that electrically removes the conductive material from the substrate. The microelectronic substrate and/or the electrodes can be moved relative to each other to position the electrodes relative to a selected portion of the microelectronic substrate, and/or to polish the microelectronic substrate. The material removal medium can remove gas formed during the process from the microelectronic substrate and/or the electrodes. The medium can also have different first and second electrical characteristics to provide different levels of electrical coupling to different regions of the microelectronic substrate.
    • 一种用于从微电子衬底去除导电材料的方法和装置。 在一个实施例中,支撑构件相对于材料去除介质支撑微电子衬底,其可以包括第一和第二电极以及抛光垫。 一个或多个电解质设置在电极和微电子衬底之间以将电极电连接到微电子衬底。 然后将电极耦合到电流从基板电除去导电材料的变化的电流源。 微电子衬底和/或电极可以相对于彼此移动以相对于微电子衬底的选定部分定位电极,和/或抛光微电子衬底。 材料去除介质可以从微电子衬底和/或电极去除在该过程期间形成的气体。 介质还可以具有不同的第一和第二电特性,以提供与微电子衬底的不同区域的不同水平的电耦合。
    • 76. 发明申请
    • METHODS AND APPARATUS FOR REMOVING CONDUCTIVE MATERIAL FROM A MICROELECTRONIC SUBSTRATE
    • 从微电子基板去除导电材料的方法和装置
    • US20050059324A1
    • 2005-03-17
    • US10665219
    • 2003-09-17
    • Whonchee LeeScott MooreBrian Vaartstra
    • Whonchee LeeScott MooreBrian Vaartstra
    • B23H3/00B23H5/06B23H5/08B24B37/04C25F7/00B24B1/00
    • B23H5/08B23H3/00B23H5/06B24B37/042C25F7/00
    • A method and apparatus for removing conductive material from a microelectronic substrate is disclosed. One method includes disposing an electrolytic liquid between a conductive material of a substrate and at least one electrode, with the electrolytic liquid having about 80% water or less. The substrate can be contacted with a polishing pad material, and the conductive material can be electrically coupled to a source of varying electrical signals via the electrolytic liquid and the electrode. The method can further include applying a varying electrical signal to the conductive material, moving at least one of the polishing pad material and the substrate relative to the other, and removing at least a portion of the conductive material while the electrolytic liquid is adjacent to the conductive material. By limiting/controlling the amount of water in the electrolytic liquid, an embodiment of the method can remove the conductive material with a reduced downforce.
    • 公开了一种用于从微电子衬底去除导电材料的方法和装置。 一种方法包括在基板的导电材料和至少一个电极之间设置电解液,电解液具有约80%的水或更少的水。 衬底可以与抛光垫材料接触,并且导电材料可以经由电解液和电极电耦合到具有变化的电信号的源。 该方法可以进一步包括向导电材料施加变化的电信号,相对于另一个移动抛光垫材料和衬底中的至少一个,以及在电解液邻近该导电材料的同时移除至少一部分导电材料 导电材料。 通过限制/控制电解液中的水量,该方法的一个实施例可以以降低的下压力去除导电材料。
    • 77. 发明授权
    • Capacitor structures with recessed hemispherical grain silicon
    • 具凹陷半球形晶体硅的电容结构
    • US06632719B1
    • 2003-10-14
    • US09652910
    • 2000-08-31
    • Scott J. DeBoerWhonchee Lee
    • Scott J. DeBoerWhonchee Lee
    • H01L2120
    • H01L28/84H01L21/32134H01L28/75
    • Capacitor structures and capacitors with edge zones that are substantially free of hemispherical grain silicon along the upper edges of the capacitor structures are disclosed. The resulting recessed hemispherical grain silicon layers reduce or prevent separation of particles from the hemispherical grain silicon layer during subsequent manufacturing processes, thereby reducing defects and increasing throughput. Also disclosed are methods of forming the capacitor structures and capacitors in which the silicon layer used to form the hemispherical grain silicon is selectively removed to provide an edge zone that is substantially free of hemispherical grain silicon.
    • 公开了具有沿着电容器结构的上边缘基本上没有半球形晶粒硅的边缘区域的电容器结构和电容器。 所产生的凹陷半球形晶粒硅层在随后的制造过程中减少或防止颗粒与半球形晶粒硅层分离,从而减少缺陷并提高生产量。 还公开了形成电容器结构和电容器的方法,其中用于形成半球形晶粒硅的硅层被选择性地去除以提供基本上不含半球形晶粒硅的边缘区域。
    • 79. 发明授权
    • Resistance-reducing conductive adhesives for attachment of electronic components
    • 用于电子部件附着的电阻降低导电粘合剂
    • US06346750B1
    • 2002-02-12
    • US09561030
    • 2000-04-28
    • Tongbi JiangWhonchee Lee
    • Tongbi JiangWhonchee Lee
    • H01L2348
    • H01L24/31C09J9/02H01L24/29H01L24/83H01L2224/05568H01L2224/05573H01L2224/16225H01L2224/2919H01L2224/2929H01L2224/293H01L2224/83192H01L2224/83851H01L2224/83886H01L2924/01005H01L2924/01006H01L2924/01013H01L2924/01027H01L2924/01029H01L2924/01033H01L2924/01047H01L2924/01051H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/0132H01L2924/0133H01L2924/014H01L2924/0665H01L2924/0781H05K3/321H05K3/323H05K2203/121H01L2924/00H01L2924/01014H01L2224/05624H01L2924/00014H01L2224/05639H01L2224/05644H01L2224/05647H01L2224/05655H01L2224/05669
    • Resistance-reducing conductive adhesives, and apparatus and methods of attaching electronic components using resistance-reducing conductive adhesives are provided. In one embodiment, a resistance-reducing conductive adhesive includes a first quantity of conductive adhesive, and a second quantity of a chelating agent combined with the conductive adhesive. The chelating agent reacts with an oxidized conductive material (e.g. alumina or aluminum ion) on a conductive lead to form soluble conductive metal-ligand complex. The chelating agent may also passivate the oxide-free conductive material by forming hydrogen bonds. The resistance of the resulting electrical connection is reduced in comparison with prior art methods of conductive adhesive coupling, providing improved signal strength, reduced power consumption, and decreased waste heat. In alternate embodiments, the conductive adhesive may include an anisotropically conductive adhesive, an isotropically conductive adhesive, a conductive epoxy, or a hydrophilic adhesive. Similarly, the conductive material may include aluminum, copper, gold, nickel, platinum or silver. Alternately, the chelating agents may be any suitable agent that provides the desired reactive mechanisms, including, for example, an oxalic acid, malonic acid, succinic acid, or citric acid. In a further embodiment, the quantity of chelating agent is a value within the range from approximately 0.1 percent by weight to approximately 20 percent by weight, inclusive. In another embodiment, an electronic assembly includes a first component having a first conductive lead, a second conductive lead, and a resistance-reducing conductive layer extending between the first and second conductive leads. The first component may be a die, a circuit board, or any other electronic component.
    • 提供了降低阻力的导电粘合剂,以及使用电阻降低导电粘合剂附着电子元件的装置和方法。 在一个实施方案中,电阻降低导电粘合剂包括第一量的导电粘合剂和与导电粘合剂组合的第二量的螯合剂。 螯合剂与导电引线上的氧化的导电材料(例如氧化铝或铝离子)反应形成可溶的导电金属 - 配体络合物。 螯合剂也可以通过形成氢键来钝化无氧化物的导电材料。 与现有技术的导电粘合剂耦合方法相比,所得到的电连接的电阻降低,提供改善的信号强度,降低的功率消耗和减少的废热。 在替代实施例中,导电粘合剂可以包括各向异性导电粘合剂,各向异性导电粘合剂,导电环氧树脂或亲水性粘合剂。 类似地,导电材料可以包括铝,铜,金,镍,铂或银。 或者,螯合剂可以是提供所需反应机理的任何合适的试剂,包括例如草酸,丙二酸,琥珀酸或柠檬酸。 在另一个实施方案中,螯合剂的量为约0.1重量%至约20重量%(含)范围内的值。 在另一个实施例中,电子组件包括具有第一导电引线,第二导电引线和在第一和第二导电引线之间延伸的电阻降低导电层的第一元件。 第一组件可以是模具,电路板或任何其它电子部件。
    • 80. 发明授权
    • Semiconductor processing methods, and methods of forming capacitor constructions
    • 半导体处理方法和形成电容器结构的方法
    • US06225232B1
    • 2001-05-01
    • US09669093
    • 2000-09-25
    • Whonchee Lee
    • Whonchee Lee
    • H01L2100
    • H01L28/82H01L28/84H01L28/90H01L28/91
    • In one aspect, the invention encompasses a semiconductor processing method. Two silicon-comprising masses are provided. A first of the two masses comprises a higher dopant concentration than a second of the two masses. The two masses are exposed to common conditions which etch the second mass faster than the first mass. In another aspect, the invention encompasses another embodiment semiconductor processing method. A substrate is provided. The substrate has at least one doped polysilicon mass formed thereover, and has regions not proximate the at least one doped polysilicon mass. Roughened polysilicon is formed along the at least one doped polysilicon mass and over said regions of the substrate. A dopant concentration in the roughened polysilicon is increased along the at least one doped polysilicon mass relative to any dopant concentration in the roughened polysilicon over said regions of the substrate. After the dopant concentration is increased, the roughened polysilicon along the at least one doped polysilicon mass and the roughened polysilicon over said regions of the substrate are exposed to common conditions. The common conditions remove the roughened polysilicon from over said regions of the substrate and leave the roughened polysilicon along the doped polysilicon mass.
    • 一方面,本发明包括半导体处理方法。 提供两个含硅的质量。 两个质量块中的第一个包含比两个质量块中的第二个更高的掺杂剂浓度。 这两个质量暴露在常规条件下,其比第一质量更快地蚀刻第二质量。 在另一方面,本发明包括另一实施例半导体处理方法。 提供基板。 衬底具有形成在其上的至少一个掺杂多晶硅质量块,并且具有不接近至少一个掺杂多晶硅块的区域。 沿着所述至少一个掺杂多晶硅块并且在所述衬底的所述区域上形成粗化的多晶硅。 粗糙多晶硅中的掺杂剂浓度相对于衬底的所述区域上的粗糙化多晶硅中的任何掺杂剂浓度沿着至少一个掺杂多晶硅质量增加。 在掺杂剂浓度增加之后,沿着至少一个掺杂多晶硅块的粗糙多晶硅和衬底的所述区域上的粗糙多晶硅暴露于常见条件。 通常的条件从衬底的所述区域上除去粗糙多晶硅,并沿着掺杂的多晶硅质量离开粗糙多晶硅。