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71. 发明申请

US20100044690A1 ORGANIC EL DISPLAY DEVICE 审中-公开
标题翻译：有机EL显示设备
公开(公告)号：US20100044690A1
公开(公告)日：2010-02-25
申请号：US12535973
申请日：2009-08-05
申请人： Satoshi OKUTANI , Kouichi Yamashita , Norihisa Maeda , Hirofumi Kubota , Masuyuki Oota , Takeshi Ikeda
发明人： Satoshi OKUTANI , Kouichi Yamashita , Norihisa Maeda , Hirofumi Kubota , Masuyuki Oota , Takeshi Ikeda
IPC分类号： H01L51/52
CPC分类号： H01L51/5265 , H01L27/3211 , H01L27/3244 , H01L2251/5315 , H01L2251/558
摘要： An organic EL display device includes a first organic EL element which includes a first organic layer including a first light emission layer which emits the color of light in the first wavelength range and a hole blocking layer between a pixel electrode and a counter-electrode, a second organic EL element which includes a second organic layer including a second light emission layer which emits the color of light in the first wavelength range between a pixel electrode and the counter-electrode, the second organic EL element being thinner than the first organic EL element, and a third organic EL element which includes a third organic layer including the third light emission layer which emits the color of light in the first wavelength range between a pixel electrode and the counter-electrode, the third organic EL element being thicker than the first organic EL element.
摘要翻译：有机EL显示装置包括：第一有机EL元件，其包括第一有机层，所述第一有机层包括发射第一波长范围内的光的颜色的第一发光层和像素电极与对电极之间的空穴阻挡层; 第二有机EL元件，其包括第二有机层，所述第二有机层包括在像素电极和对电极之间发射第一波长范围内的光的颜色的第二发光层，所述第二有机EL元件比所述第一有机EL元件薄以及第三有机EL元件，其包括第三有机层，所述第三有机层包括在像素电极和对电极之间发射第一波长范围内的光的颜色的第三发光层，所述第三有机EL元件比所述第一有机EL元件厚有机EL元件。

72. 发明授权

US07619679B2 Image pickup apparatus having iris member and filter units 有权
标题翻译：具有虹膜构件和过滤单元的摄像装置
公开(公告)号：US07619679B2
公开(公告)日：2009-11-17
申请号：US11626591
申请日：2007-01-24
申请人： Takeshi Ikeda
发明人： Takeshi Ikeda
IPC分类号： H04N5/225
CPC分类号： H04N5/23232 , H04N5/23245 , H04N5/2352 , H04N5/238
摘要： An image pickup apparatus capable of preventing a decline of resolution of a still image while keeping a dynamic range of exposure control. The image pickup apparatus capable of photographing with changing over a moving image and a still image, includes an iris mechanism for changing an amount of light input to an image pickup element by changing an aperture diameter, a filter unit, having a single density or a plurality of densities, for changing the amount of the light input to the image pickup element by its advancing towards and withdrawing from the aperture diameter of the iris mechanism, a unit for driving the iris mechanism and the filter unit independently, and a control unit for setting the filter unit in one of two types of states such as fully covering the aperture diameter of the iris mechanism and fully withdrawing from the aperture diameter in the still image photography.
摘要翻译：一种能够在保持动态曝光控制范围的同时防止静止图像的分辨率下降的摄像装置。能够通过改变运动图像和静止图像拍摄的图像拾取装置包括：虹膜机构，用于通过改变孔直径来改变输入到图像拾取元件的光量;滤光器单元，具有单一密度或多个密度，用于通过其向虹膜机构的孔径的前进方向前进和退出来改变输入到图像拾取元件的光量，用于独立地驱动虹膜机构和滤光单元的单元，以及用于将过滤器单元设置为两种状态之一，例如完全覆盖光圈机构的孔径直径并从静止图像摄影中的孔直径完全退出。

73. 发明申请

US20090237036A1 FREQUENCY SYNTHESIZER AND LOOP FILTER USED THEREIN 审中-公开
标题翻译：使用的频率合成器和环路滤波器
公开(公告)号：US20090237036A1
公开(公告)日：2009-09-24
申请号：US12375803
申请日：2007-03-23
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H02J7/00 , H03B21/00 , H03B19/00
CPC分类号： H03L7/093 , H03L7/18
摘要： An LPF (15) includes a plurality of capacitors (C1) to (Cn) connected in parallel, switches (SW11) to (SW1n) and (SW21) to (SW2n) for carrying out switching to perform their charging/discharging operation as a pipeline processing, and a capacitor (CH) connected to an output side of a parallel circuit having the capacitors (C1) to (Cn), and electric charges stored sequentially in the capacitors (C1) to (Cn) are obtained as an output of the parallel circuit and are sequentially stored in the capacitor (CH). Consequently, it is possible to implement a great time constant as the whole circuit even if the time constant is reduced with a decrease in capacitance values of the capacitors (C1) to (Cn) and (CH).
摘要翻译： LPF（15）包括并联连接的多个电容器（C1）至（Cn），开关（SW11）至（SW1n）和（SW21）至（SW2n），用于执行开关以执行充电/放电操作流水线处理和连接到具有电容器（C1）至（Cn）的并联电路的输出侧的电容器（CH），并且顺序地存储在电容器（C1）至（Cn）中的电荷被获得作为并联电路并依次存储在电容器（CH）中。因此，即使随着电容器（C1）至（Cn）和（CH）的电容值的减小而减小时间常数，也可以实现作为整个电路的大的时间常数。

74. 发明授权

US07579888B2 Frequency synthesizer and charge pump circuit used therein 失效
标题翻译：其中使用的频率合成器和电荷泵电路
公开(公告)号：US07579888B2
公开(公告)日：2009-08-25
申请号：US11915112
申请日：2005-12-28
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H03L7/06
CPC分类号： H03L7/0895 , H03L7/0891 , H03L7/18
摘要： There are included a signal generating circuit (8) that generates, based on a comparison signal outputted from a phase comparator (3) and a clock signal outputted from a crystal oscillation circuit (1) and having a shorter pulse width than the comparison signal, a control signal obtained from a logical product of the two signals; and a charge pump circuit that performs, based on the control signal from the signal generating circuit (8), a charging or discharging operation of a capacitor. The charging or discharging operation of the capacitor is gradually performed little by little based on the control signal having the shorter pulse width than the conversional comparison signal, whereby even if the capacitance value of the capacitor is reduced, the substantial time constant can be enlarged, resulting in a stable operation of a frequency synthesizer.
摘要翻译：包括信号生成电路（8），其基于从相位比较器（3）输出的比较信号和从晶体振荡电路（1）输出的具有比比较信号更短的脉冲宽度的时钟信号，从两个信号的逻辑积获得的控制信号; 以及基于来自信号发生电路（8）的控制信号执行电容器的充电或放电操作的电荷泵电路。基于具有比会话比较信号更短的脉冲宽度的控制信号逐渐地逐渐执行电容器的充电或放电操作，由此即使电容器的电容值减小，可以扩大实质时间常数，导致频率合成器的稳定操作。

75. 发明授权

US07576578B2 Frequency synthesizer and charge pump circuit used for the same 失效
标题翻译：频率合成器和电荷泵电路用于相同
公开(公告)号：US07576578B2
公开(公告)日：2009-08-18
申请号：US11834305
申请日：2007-08-06
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H03L7/06
CPC分类号： H03L7/18 , H03L7/0895
摘要： A frequency synthesizer includes an AND circuit (17) for detecting whether a frequency synthesizer is in a lock state according to a signal outputted from an Up terminal and a Down terminal of a phase comparator and switching circuits (18, 19) for switching between presence and absence of connections of constant current circuits (14, 15) constituting a charge pump circuit (4) according to the output signal of the AND circuit (17). When the AND circuit (17) has detected a high impedance state of the charge pump circuit (4), the switching circuits (18, 19) disconnects the constant current circuits (14, 15) by the switching circuits (18, 19). Thus, it is possible to eliminate current flowing into the charge pump circuit (4) without using a control signal from outside such as a power cut signal and an intermittent signal.
摘要翻译：频率合成器包括用于根据从相位比较器的Up端和Down端输出的信号检测频率合成器是否处于锁定状态的AND电路（17），以及用于在存在之间切换的切换电路（18,19）以及根据AND电路（17）的输出信号构成电荷泵电路（4）的恒流电路（14,15）的连接不存在。当AND电路（17）检测到电荷泵电路（4）的高阻抗状态时，开关电路（18,19）通过开关电路（18,19）断开恒流电路（14,15）。因此，可以在不使用来自外部的控制信号（例如断电信号和间歇信号）的情况下消除流入电荷泵电路（4）的电流。

76. 发明申请

US20090102309A1 LINEAR MATERIAL AND STATOR STRUCTURE 有权
标题翻译：线性材料和定子结构
公开(公告)号：US20090102309A1
公开(公告)日：2009-04-23
申请号：US12298524
申请日：2007-04-20
申请人： Hiroyuki Kamibayashi , Yasunori Kashima , Takafumi Tanabe , Takeshi Ikeda , Yasushi Kawakami
发明人： Hiroyuki Kamibayashi , Yasunori Kashima , Takafumi Tanabe , Takeshi Ikeda , Yasushi Kawakami
IPC分类号： H02K3/04 , H01B7/00
CPC分类号： H02K1/165 , H02K3/12 , H02K15/045 , Y10T29/49117
摘要： A stator structure includes: a stator core (104) having a large number of concave slots (105) and a large number of convex magnetic poles (106) circumferentially alternately arranged; and magnet wires (101) of rectangular cross section in each of which an insulating coating (103) is formed on the outer surface of a metal wire (102), wherein each of the slots (105) is formed so that the distance (W2) between both the side surfaces (109, 109) of the slot (105) gradually decreases from the bottom (107) to a distal opening (108) of the slot (105), each of the magnet wires (101) is wound around the associated magnetic pole (106) and inserted in tiers in the associated slot (105), and the magnet wire (101) is placed in the slot (105) so that the width (W1) thereof continuously or stepwise decreases from the bottom (107) to the distal opening (108) of the slot (105).
摘要翻译：定子结构包括：定子芯（104），其具有大量凹槽（105）和大量周向交替布置的凸极磁极（106）; 以及在金属线（102）的外表面上形成有绝缘涂层（103）的矩形截面的电磁线（101），其中每个槽（105）形成为使得距离（W2 （105）的两个侧面（109,109）之间的距离从底部（107）到槽（105）的远端开口（108）逐渐减小，每个磁体线（101）被卷绕相关联的磁极（106）并插入到相关联的狭槽（105）中的层中，并且磁体线（101）被放置在狭槽（105）中，使得其连续或逐步地从底部（ 107）延伸到狭槽（105）的远端开口（108）。

77. 发明申请

US20090085672A1 FREQUENCY SYNTHESIZER 审中-公开
标题翻译：频率合成器
公开(公告)号：US20090085672A1
公开(公告)日：2009-04-02
申请号：US12093742
申请日：2006-07-12
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H03L7/06
CPC分类号： H03L7/087 , H03L7/089 , H03L7/091 , H03L7/18
摘要： By performing rough adjustment of a local oscillation frequency by a first lock loop using an up/down counter (5) and micro adjustment of the local oscillation frequency by a second lock loop using an S/H circuit (11), it is possible to eliminate the need of operation of charging and pumping a capacitor according to a phase difference and to omit an LPF using a large-scale capacitor from the frequency synthesizer. Moreover, by performing micro adjustment using the S/H circuit (11), it is possible to accurately lock the local oscillation frequency and eliminate the need of increasing the bit quantity of the up/down counter (5) to increase the control accuracy of the frequency to be locked. Thus, it is possible to rapidly lock the local oscillation frequency to a desired frequency.
摘要翻译：通过使用上/下计数器（5）通过第一锁定环进行本地振荡频率的粗略调整，并且使用S / H电路（11）通过第二锁定环微调本地振荡频率，消除了根据相位差对电容器进行充电和泵送的操作的需要，并且使用来自频率合成器的大规模电容器省略LPF。此外，通过使用S / H电路（11）进行微调，可以精确地锁定本地振荡频率，并且不需要增加向上/向下计数器（5）的比特量，从而提高控制精度被锁定的频率。因此，可以将本地振荡频率快速地锁定到期望的频率。

78. 发明授权

US07496419B2 Modulation output device 失效
标题翻译：调制输出设备
公开(公告)号：US07496419B2
公开(公告)日：2009-02-24
申请号：US11611026
申请日：2006-12-14
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： G06F17/00
CPC分类号： H04B1/04
摘要： A modulation output device including; a DSP 12 for subjecting MP3 music data and the like read out from an MP3 player 50 to stereo modulation, when necessary; D/A converter 14 for converting the digital data outputted from the DSP 12 to an analog signal and outputting the converted analog signal to either an earphone terminal 54 or transmission part 15; and transmission part 15 for transmitting the analog signal outputted from the D/A converter 14 to the outside through a transmission antenna 55 enables the processing concerning reproduction of music data and processing for modulation of the reproduced music data to transmit without wires to be performed by a single DSP 12 and a single D/A converter 14.
摘要翻译：一种调制输出装置，包括：用于在必要时对从MP3播放器50读出的MP3音乐数据等进行立体调制的DSP12; D / A转换器14，用于将从DSP12输出的数字数据转换为模拟信号，并将转换的模拟信号输出到耳机端子54或发送部分15; 并且用于通过发送天线55将从D / A转换器14输出的模拟信号发送到外部的发送部分15使得能够进行关于音乐数据的再现的处理和用于调制再现的音乐数据的处理，单个DSP 12和单个D / A转换器14。

79. 发明申请

US20090028224A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20090028224A1
公开(公告)日：2009-01-29
申请号：US11816165
申请日：2006-02-24
申请人： Hiroshi Miyagi , Takeshi Ikeda
发明人： Hiroshi Miyagi , Takeshi Ikeda
IPC分类号： H04L27/00
CPC分类号： H03M1/0827 , H04B1/40 , H04B15/00
摘要： A semiconductor device capable of preventing degradation of signal quality due to inclusion of noise and reducing the circuit scale. The constitution of a transmitter/receiver for transmitting/receiving a signal is fabricated on a semiconductor substrate (100). Part of the transmission and reception is performed by analog processing, and the other part is performed by digital processing. The digital processings of the transmission and reception are performed by using a common digital processing unit (20). A reception processing block (10) for analog processing of reception is disposed near a corner of the rectangular semiconductor substrate (100), and digital signal processing unit (20) is disposed near another corner not adjacent to the former corner.
摘要翻译：一种能够防止由于包含噪声而降低信号质量而降低电路规模的半导体器件。用于发送/接收信号的发送器/接收器的结构被制造在半导体衬底（100）上。通过模拟处理进行发送和接收的一部分，另一部分通过数字处理来执行。通过使用公共数字处理单元（20）来进行发送和接收的数字处理。用于模拟处理接收的接收处理块（10）设置在矩形半导体衬底（100）的拐角附近，并且数字信号处理单元（20）设置在不与前一角不相邻的另一角附近。

80. 发明申请

US20080191761A1 Frequency Synthesizer and Charge Pump Circuit Used Therein 失效
标题翻译：其中使用的频率合成器和电荷泵电路
公开(公告)号：US20080191761A1
公开(公告)日：2008-08-14
申请号：US11915112
申请日：2005-12-28
申请人： Takeshi Ikeda , Hiroshi Miyagi
发明人： Takeshi Ikeda , Hiroshi Miyagi
IPC分类号： H03L7/093 , H03L7/089 , G05F1/10
CPC分类号： H03L7/0895 , H03L7/0891 , H03L7/18
摘要： There are included a signal generating circuit (8) that generates, based on a comparison signal outputted from a phase comparator (3) and a clock signal outputted from a crystal oscillation circuit (1) and having a shorter pulse width than the comparison signal, a control signal obtained from a logical product of the two signals; and a charge pump circuit that performs, based on the control signal from the signal generating circuit (8), a charging or discharging operation of a capacitor. The charging or discharging operation of the capacitor is gradually performed little by little based on the control signal having the shorter pulse width than the conversional comparison signal, whereby even if the capacitance value of the capacitor is reduced, the substantial time constant can be enlarged, resulting in a stable operation of a frequency synthesizer.
摘要翻译：包括信号生成电路（8），其基于从相位比较器（3）输出的比较信号和从晶体振荡电路（1）输出的具有比比较信号更短的脉冲宽度的时钟信号，从两个信号的逻辑积获得的控制信号; 以及基于来自信号发生电路（8）的控制信号执行电容器的充电或放电操作的电荷泵电路。基于具有比会话比较信号更短的脉冲宽度的控制信号逐渐地逐渐执行电容器的充电或放电操作，由此即使电容器的电容值减小，可以扩大实质时间常数，导致频率合成器的稳定操作。

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