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    • 73. 发明申请
    • SD memory card for extension of function
    • SD存储卡扩展功能
    • US20050224589A1
    • 2005-10-13
    • US11098462
    • 2005-04-05
    • Young ParkJi ParkYoung KimSung Jun
    • Young ParkJi ParkYoung KimSung Jun
    • G06K19/06G06K19/07
    • G06K19/07732G06K19/0723
    • Provided is a secure digital memory card for extension of function, including: a flash memory installed in a host device and storing data generated by the host device; a controller controlling an access interface to the flash memory; a radio frequency circuit performing functions of a contactless integrated circuit card and a contactless integrated circuit card reader through a wireless interface control of the controller; an antenna unit connected to the radio frequency circuit to perform a function of a transmission and reception antenna; and a contact integrated circuit card adapter performing the function of the contact integrated circuit card reader through a wire interface control of the controller.
    • 提供了一种用于扩展功能的安全数字存储卡,包括:安装在主机设备中并存储由主机设备生成的数据的闪存; 控制器对闪速存储器的访问接口的控制器; 通过控制器的无线接口控制来执行非接触集成电路卡和非接触式集成电路卡读取器的功能的射频电路; 连接到射频电路以执行发送和接收天线的功能的天线单元; 和接触式集成电路卡适配器,通过控制器的接线控制来执行接触式集成电路读卡器的功能。
    • 78. 发明申请
    • Apparatus and method for computing SHA-1hash function
    • 用于计算SHA-1hash函数的装置和方法
    • US20050144204A1
    • 2005-06-30
    • US10917685
    • 2004-08-12
    • Yun LeeSung JunYoung ParkSang LeeYoung KimKyo II Chung
    • Yun LeeSung JunYoung ParkSang LeeYoung KimKyo II Chung
    • G06F7/06G06F7/00H04L9/32
    • H04L9/0643
    • An apparatus and method for computing a SHA-1 hash function value are provided. The apparatus includes a first register unit including a plurality of registers that store a first bit string of predetermined lengths for generation of a hash function value; a second register unit storing input data in units of second bit strings with predetermined lengths, and sequentially outputting the second bit strings; a third register unit performing an operation on the first bit string of the plurality of registers and the second bit strings output from the second register unit so as to generate and store a third bit string, and updating first-bit string of the plurality of registers based on the third bit string; and an adding unit combining the first bit string stored in the first register unit, the first bit string of the third bit string stored in the third register unit, and the original initial values stored in the first register unit so as to obtain a hash function value. Accordingly, it is possible to reduce the size of the apparatus and stably compute a hash function value at a high speed.
    • 提供了一种用于计算SHA-1散列函数值的装置和方法。 该装置包括:第一寄存器单元,包括多个寄存器,用于存储用于生成散列函数值的预定长度的第一位串; 第二寄存器单元,以预定长度的第二位串为单位存储输入数据,并顺序地输出第二位串; 第三寄存器单元,对所述多个寄存器中的第一位串执行操作,以及从所述第二寄存器单元输出的所述第二位串,以产生和存储第三位串,并且更新所述多个寄存器中的第一位串 基于第三位串; 以及添加单元,组合存储在第一寄存器单元中的第一位串,存储在第三寄存器单元中的第三位串的第一位串和存储在第一寄存器单元中的原始初始值,以获得散列函数 值。 因此,可以减小装置的尺寸并且可以高速稳定地计算散列函数值。