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71. 发明授权

US07100029B2 Performing repeat string operations 有权
标题翻译：执行重复字符串操作
公开(公告)号：US07100029B2
公开(公告)日：2006-08-29
申请号：US10233155
申请日：2002-08-28
申请人： Xiang Zou , Rajesh S. Parthasarathy , Madhavan Parthasarathy , Dion Rodgers
发明人： Xiang Zou , Rajesh S. Parthasarathy , Madhavan Parthasarathy , Dion Rodgers
IPC分类号： G06F9/38 , G06F9/00
CPC分类号： G06F9/3824 , G06F9/30018 , G06F9/30043 , G06F9/325
摘要： Performing repeat string operations can include aligning a source data location or a destination data location to a location divisible by a predetermined integer, the aligning including performing a string operation using data having a size equal to the operand size. After aligning, a string operation can be performed using data having a size larger than the operand size. Performing repeat string operations can include issuing a first predetermined number of iterations if an operand size is a predetermined size, and issuing a second predetermined number of iterations otherwise. Performing repeat string operations can include determining that a requested number of iterations in a repeat string operation is within a predetermined multi-number range and issuing exactly the requested number of iterations for any value of the requested number within that range.
摘要翻译：执行重复串操作可以包括将源数据位置或目的地数据位置对准可被预定整数整除的位置，所述对齐包括使用具有等于操作数大小的大小的数据来执行字符串操作。对齐后，可以使用尺寸大于操作数大小的数据来执行字符串操作。执行重复字符串操作可以包括：如果操作数大小是预定大小，则发出第一预定数量的迭代，否则发出第二预定次数的迭代。执行重复字符串操作可以包括确定重复字符串操作中所请求的迭代次数在预定的多数量级范围内，并且对该范围内的请求号码的任何值准确地发出所请求的迭代次数。

72. 发明授权

US06889319B1 Method and apparatus for entering and exiting multiple threads within a multithreaded processor 有权
标题翻译：用于在多线程处理器内进入和退出多个线程的方法和装置
公开(公告)号：US06889319B1
公开(公告)日：2005-05-03
申请号：US09458570
申请日：1999-12-09
申请人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu
发明人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu
IPC分类号： G06F9/46 , G06F9/318 , G06F9/38 , G06F9/44
CPC分类号： G06F9/30152 , G06F9/3808 , G06F9/382 , G06F9/3836 , G06F9/3838 , G06F9/384 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F9/3863
摘要： A method includes maintaining a state machine to provide a multi-bit output, each bit of the multi-bit output indicating a respective status for an associated thread of multiple threads being executed within a multithreaded processor. Status for a first thread is detected, responsive to which a functional unit within the multithreaded processor is configured in accordance with the multi-bit output of the state machine.
摘要翻译：一种方法包括维持状态机以提供多位输出，多比特输出的每个比特指示在多线程处理器内正在执行的多个线程的相关线程的相应状态。检测到第一线程的状态，响应于根据状态机的多位输出配置多线程处理器内的功能单元。

73. 发明授权

US06883107B2 Method and apparatus for disabling a clock signal within a multithreaded processor 有权
标题翻译：用于在多线程处理器内禁用时钟信号的方法和装置
公开(公告)号：US06883107B2
公开(公告)日：2005-04-19
申请号：US10095357
申请日：2002-03-08
申请人： Dion Rodgers , Bret Toll , Aimee Wood
发明人： Dion Rodgers , Bret Toll , Aimee Wood
IPC分类号： G06F15/00 , G06F9/38 , G06F1/08 , G06F1/32
CPC分类号： G06F1/3203 , G06F1/3237 , G06F1/3287 , G06F9/384 , G06F9/3851 , Y02D10/128 , Y02D10/171 , Y02D50/20
摘要： A method includes maintaining an indication of a pending event with respect to each of a number of threads supported within a multithreaded processor. An indication is also maintained of an active or inactive state for each of the multiple threads. A clock disable condition is detected. This clock disable condition may be indicated by the absence of pending events with respect to each of the multiple threads and an inactive state for each of the multiple threads. A clocks signal, if enabled, is then disabled with respect to at least one functional unit within the multithreaded processor responsive to the detection of the clock disable condition.
摘要翻译：一种方法包括相对于在多线程处理器中支持的多个线程中的每一个来维护待决事件的指示。对于多个线程中的每一个，还保持指示为活动状态或非活动状态。检测到时钟禁止条件。该时钟禁用条件可以由相对于多个线程中的每个线程的不存在的事件以及针对多个线程中的每一个的不活动状态来指示。响应于检测到时钟禁止条件，相对于多线程处理器内的至少一个功能单元，如果允许时钟信号被禁用。

74. 发明申请

US20050038980A1 Method and apparatus for entering and exiting multiple threads within a mutlithreaded processor 有权
标题翻译：用于在多线程处理器内进入和退出多个线程的方法和装置
公开(公告)号：US20050038980A1
公开(公告)日：2005-02-17
申请号：US10951836
申请日：2004-09-27
申请人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu
发明人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu
IPC分类号： G06F9/46 , G06F9/318 , G06F9/38 , G06F7/38
CPC分类号： G06F9/30152 , G06F9/3808 , G06F9/382 , G06F9/3836 , G06F9/3838 , G06F9/384 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F9/3863
摘要： A method and apparatus are provided for entering and exiting multiple threads within a multithreaded processor. A state machine is maintained to indicate a respective status of an associated thread of multiple threads being executed within a multithreaded processor. A change of status for a first thread within the multithreaded processor is detected and, responsive to the change of status for the first thread within the multithreaded processor, a partitioning scheme for the functional unit is altered to service a second thread, but not the first thread, within the multithreaded processor when the change of the status of the first thread comprises a transition from an active state to an inactive state.
摘要翻译：提供了用于在多线程处理器内进入和退出多个线程的方法和装置。维护状态机以指示在多线程处理器内正在执行的多个线程的相关线程的相应状态。检测多线程处理器内的第一线程的状态改变，并且响应于多线程处理器内的第一线程的状态改变，功能单元的分区方案被改变以服务于第二线程，但不是第一线程线程，在多线程处理器内，当第一线程的状态改变包括从活动状态到非活动状态的转变时。

75. 发明授权

US06671795B1 Method and apparatus for pausing execution in a processor or the like 有权
标题翻译：用于在处理器等中暂停执行的方法和装置
公开(公告)号：US06671795B1
公开(公告)日：2003-12-30
申请号：US09489130
申请日：2000-01-21
申请人： Deborah T. Marr , Dion Rodgers
发明人： Deborah T. Marr , Dion Rodgers
IPC分类号： G06F948
CPC分类号： G06F9/3869 , G06F9/30083 , G06F9/30087 , G06F9/3009 , G06F9/3851 , G06F9/52
摘要： A method and apparatus for pausing execution of instructions from a thread is described. In one embodiment, a pause instruction is implemented as two instructions or microinstructions: a SET instruction and a READ instruction. When a SET flag is retrieved for a given thread, the SET instruction sets a Bit flag in memory indicating that execution for the thread has been paused. The SET instruction is placed in the pipeline for execution. The following READ instruction for that thread, however, is prevented from entering the pipeline until, the SET instruction is executed and retired (resulting in a clearing of the Bit flag). Once the Bit flag has been cleared, the READ instruction is placed in the pipeline for execution. During the time that processing of one thread is paused, the execution of other threads may continue.
摘要翻译：描述用于暂停从线程执行指令的方法和装置。在一个实施例中，暂停指令被实现为两个指令或微指令：SET指令和READ指令。当为给定的线程检索SET标志时，SET指令在存储器中设置一个Bit标志，指示线程的执行已暂停。 SET指令放在流水线中执行。然而，针对该线程的以下READ指令被阻止进入流水线，直到SET指令被执行并退出（导致清除Bit标志）。一旦Bit标志被清除，READ指令被放置在流水线中才能执行。在一个线程的处理暂停的时间内，其他线程的执行可能会继续。

76. 发明授权

US06496925B1 Method and apparatus for processing an event occurrence within a multithreaded processor 有权
标题翻译：用于在多线程处理器内处理事件发生的方法和装置
公开(公告)号：US06496925B1
公开(公告)日：2002-12-17
申请号：US09458544
申请日：1999-12-09
申请人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu , Keshavan Tiruvallur
发明人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu , Keshavan Tiruvallur
IPC分类号： G06F938
CPC分类号： G06F9/3851
摘要： A method includes detecting a first event occurrence for a first thread being processed within a multithreaded processor. Responsive to the detection of this first event occurrence, a second thread being processed within the multithreaded processor is monitored to detect a clearing point for this second thread. Responsive to the detection of a clearing point for the second thread, a functional unit within the multithreaded processor is cleared of data for both the first and the second threads.
摘要翻译：一种方法包括检测在多线程处理器内处理的第一线程的第一事件发生。响应于检测到该第一事件发生，监视在多线程处理器内处理的第二线程以检测该第二线程的清零点。响应于检测第二线程的清除点，多线程处理器内的功能单元被清除第一和第二线程的数据。

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