专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明授权

US5463340A Phase clocked latch having both parallel and shunt connected switches for transmission gates 失效
标题翻译：相位时钟锁存器具有用于传输门的并联和分流连接的开关
公开(公告)号：US5463340A
公开(公告)日：1995-10-31
申请号：US76649
申请日：1993-06-15
申请人： Akihiko Takabatake , Shinichi Uramoto , Shinichi Nakagawa
发明人： Akihiko Takabatake , Shinichi Uramoto , Shinichi Nakagawa
IPC分类号： G11C19/00 , G11C19/28 , H03K3/037 , H03K3/356
CPC分类号： H03K3/037 , G11C19/28 , H03K3/356156
摘要： A general object of the present invention is to provide a latch of which demand is small. In a half-latch 101, control signals T2 and T2C which vary at late timings are applied to a main unit for data input (update) operation while control signals T1 and T1C which vary at early timings are applied to a feedback unit for data retaining operation. The data input (update) operation is never started until the data retaining operation is completed. The data retaining operation is practiced by retaining two signals having a negative logic relation with each other in a loop made up with two inverters. A signal related to retension of data and a signal newly input never reside in the same signal line. Thus, collision of those signals is avoided, and consequently, through-current due to the collision of the signals can be reduced.
摘要翻译：本发明的一般目的是提供一种需求量小的闩锁。在半锁存器101中，在后期定时变化的控制信号T2和T2C被施加到用于数据输入（更新）操作的主单元，而在早期定时变化的控制信号T1和T1C被应用于用于数据保持的反馈单元操作。在数据保存操作完成之前，数据输入（更新）操作从不开始。通过在由两个反相器构成的回路中保持具有负逻辑关系的两个信号来实现数据保持操作。与数据延迟相关的信号和新输入的信号永远不在同一信号线上。因此，避免了这些信号的碰撞，从而可以减少由于信号的碰撞引起的通电。

72. 发明授权

US5245524A DC-DC converter of charge pump type 失效
标题翻译：电荷泵型DC-DC转换器
公开(公告)号：US5245524A
公开(公告)日：1993-09-14
申请号：US785819
申请日：1991-10-31
申请人： Shinichi Nakagawa , Hidenobu Ito
发明人： Shinichi Nakagawa , Hidenobu Ito
IPC分类号： H02M3/07
CPC分类号： H02M3/07
摘要： A DC-DC converter includes first and second capacitors coupled in parallel, a switching part for controlling the first and second capacitors so that the first capacitor is charged by an input voltage and the second capacitor is charged by a discharging of the first capacitor, an output voltage being obtained at one end of the second capacitor, and the switching part including a discharge path through which the second capacitor is discharged. An output voltage detection units detects the output voltage and determines whether or not the output voltage satisfies a predetermined condition. A discharge path breaking units breakes the discharge path when the output voltage detection unit determines that the output voltage satisfies the predetermined condition, so that the first capacitor is prevented from being discharged through discharge path.
摘要翻译： DC-DC转换器包括并联的第一和第二电容器，用于控制第一和第二电容器的开关部分，使得第一电容器被输入电压充电，并且第二电容器通过第一电容器的放电而被充电，输出电压在第二电容器的一端获得，并且开关部分包括放电路径，第二电容器被放电通过该放电路径。输出电压检测单元检测输出电压，并确定输出电压是否满足预定条件。当输出电压检测单元确定输出电压满足预定条件时，放电路径断开单元破坏放电路径，从而防止第一电容器通过放电路径放电。

73. 发明授权

US4513129A Ethylene/tetrafluoroethylene or chlorotrifluoroethylene copolymer 失效
标题翻译：乙烯/四氟乙烯或氯三氟乙烯共聚物
公开(公告)号：US4513129A
公开(公告)日：1985-04-23
申请号：US601432
申请日：1984-04-18
申请人： Shinichi Nakagawa , Kiyohiko Ihara , Toshio Sogabe
发明人： Shinichi Nakagawa , Kiyohiko Ihara , Toshio Sogabe
IPC分类号： C08F210/00 , C08F10/00 , C08F14/00 , C08F14/24 , C08F210/02 , C08F214/00 , C08F214/24 , C08F214/26 , C08F12/20
CPC分类号： C08F214/265 , C08F210/02 , C08F214/24
摘要： A copolymer comprising monomeric units derived from ethylene, tetrafluoroethylene or chlorotrifluoroethylene and a fluorovinyl compound of the formula:CH.sub.2 .dbd.CFRf (I)wherein Rf is a C.sub.2 -C.sub.10 fluoroalkyl group, a molar ratio of ethylene and tetrafluoroethylene or chlorotrifluoroethylene being from 40:60 to 60:40 and the content of the fluorovinyl compound being from 0.1% to 10% by mole having improved thermal resistance and high temperature mechanical properties such as crack resistance.
摘要翻译：一种共聚物，其包含衍生自乙烯，四氟乙烯或氯三氟乙烯的单体单元和下式的氟代乙烯基化合物：CH2 = CFRf（I）其中Rf是C2-C10氟代烷基，乙烯和四氟乙烯或氯三氟乙烯的摩尔比为40:60 至60:40，并且氟乙烯基化合物的含量为0.1％至10％摩尔，具有改进的耐热性和耐高温机械性能如抗裂性。

74. 发明申请

US20130302498A1 Extruded Noodle and Die Piece for Extruded Noodle 审中-公开
标题翻译：挤压面条挤出面和模具
公开(公告)号：US20130302498A1
公开(公告)日：2013-11-14
申请号：US13996156
申请日：2011-12-21
申请人： Mitsuru Tanaka , Tatsuo Yamaya , Takuo Nakazeko , Shinichi Nakagawa , Masahiro Oda
发明人： Mitsuru Tanaka , Tatsuo Yamaya , Takuo Nakazeko , Shinichi Nakagawa , Masahiro Oda
IPC分类号： A23L1/16
摘要： Disclosed is an extruded noodle having a hole extending therethrough in a longitudinal direction, wherein: the hole closes or contracts during boiling or rehydration in hot water; and the hole in a cross section of the noodle is configured such that a plurality of grooves are formed rotationally symmetrically about a center of the cross section, extending in an outer radial direction from the center of the cross section of the noodle.
摘要翻译：公开了一种具有沿纵向延伸穿过其中的孔的挤出面，其中：在热水中沸腾或再水合期间孔闭合或收缩; 并且所述面条的横截面中的孔被构造成使得多个槽围绕所述横截面的中心以从所述面条的横截面的中心的外径向延伸的方式旋转对称地形成。

75. 发明授权

US07993506B2 Gas sensor 有权
标题翻译：气体传感器
公开(公告)号：US07993506B2
公开(公告)日：2011-08-09
申请号：US12015238
申请日：2008-01-16
申请人： Yoshihiro Nakano , Shinichi Nakagawa , Yuichi Koyama , Takio Kojima
发明人： Yoshihiro Nakano , Shinichi Nakagawa , Yuichi Koyama , Takio Kojima
IPC分类号： G01N27/26 , G01N27/417 , B05D5/12
CPC分类号： G01N27/16 , Y10T428/2982
摘要： There is provided a gas sensor, including a gas sensing film formed of an oxide semiconductor material and a gas-permeable protection layer formed of oxide particles and arranged on the gas sensing film. The oxide particles of the protection layer have an average particle size of 500 nm or smaller.
摘要翻译：提供了一种气体传感器，其包括由氧化物半导体材料形成的气体感测膜和由氧化物颗粒形成并且设置在气体感测膜上的透气保护层。保护层的氧化物粒子的平均粒径为500nm以下。

76. 外观设计

USD638759S1 Front bumper for an automobile 有权
公开(公告)号：USD638759S1
公开(公告)日：2011-05-31
申请号：US29379788
申请日：2010-11-24
申请人： Shinichi Nakagawa
设计人： Shinichi Nakagawa

77. 外观设计

USD637945S1 Front bumper for an automobile 有权
公开(公告)号：USD637945S1
公开(公告)日：2011-05-17
申请号：US29379782
申请日：2010-11-24
申请人： Shinichi Nakagawa
设计人： Shinichi Nakagawa

78. 发明授权

US07560329B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07560329B2
公开(公告)日：2009-07-14
申请号：US11826251
申请日：2007-07-13
申请人： Shinichi Nakagawa
发明人： Shinichi Nakagawa
IPC分类号： H01L21/4763
CPC分类号： H01L27/115 , H01L27/11526 , H01L27/11546 , H01L29/6656 , H01L29/6659
摘要： The semiconductor device comprises a gate electrode 112 formed over a semiconductor substrate 10, a sidewall spacer 116 formed on the side wall of the gate electrode 112, a sidewall spacer 144 formed on the side wall of the gate electrode 112 with the sidewall spacer 116 formed on, and an oxide film 115 formed between the sidewall spacer 116 and the sidewall spacer 144, and the semiconductor substrate 10. The film thickness of the oxide film 115 between the sidewall spacer 144 and the semiconductor substrate 10 is thinner than the film thickness of the oxide film 115 between the sidewall spacer 116 and the semiconductor substrate 10.
摘要翻译：半导体器件包括形成在半导体衬底10上的栅电极112，形成在栅电极112的侧壁上的侧壁间隔物116，形成在栅电极112的侧壁上的侧壁间隔物144，其中形成侧壁间隔物116 以及形成在侧壁间隔件116和侧壁间隔物144之间的氧化物膜115以及半导体衬底10.侧壁间隔物144与半导体衬底10之间的氧化物膜115的膜厚比薄膜厚度侧壁间隔件116和半导体基板10之间的氧化膜115。

79. 发明申请

US20080220573A1 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20080220573A1
公开(公告)日：2008-09-11
申请号：US12149320
申请日：2008-04-30
申请人： Koji Takahashi , Shinichi Nakagawa
发明人： Koji Takahashi , Shinichi Nakagawa
IPC分类号： H01L21/8238 , H01L21/8234
CPC分类号： H01L27/0207 , G11C16/0466 , H01L27/0266 , H01L27/105 , H01L27/11519 , H01L27/11526 , H01L27/11536 , H01L27/11546
摘要： On a surface of a Si substrate, a nonvolatile memory cell, an nMOS transistor, and a pMOS transistor are formed, and thereafter an interlayer insulation film covering the nonvolatile memory cell, the nMOS transistor, and the pMOS transistor is formed. Next, in the interlayer insulation film, there are formed plural contact plugs connected respectively to a control gate of the nonvolatile memory cell, a source or a drain of the nMOS transistor, and a source or a drain of the pMOS transistor. Thereafter, there is formed a single-layer wiring connecting the control gate to the sources or drains of the nMOS transistor and the pMOS transistor via the plural contact plugs.
摘要翻译：在Si衬底的表面上形成非易失性存储单元，nMOS晶体管和pMOS晶体管，然后形成覆盖非易失性存储单元，nMOS晶体管和pMOS晶体管的层间绝缘膜。接下来，在层间绝缘膜中，形成有分别连接到非易失性存储单元的控制栅极，nMOS晶体管的源极或漏极以及pMOS晶体管的源极或漏极的多个接触插塞。此后，形成了通过多个接触插塞将控制栅极连接到nMOS晶体管和pMOS晶体管的源极或漏极的单层布线。

80. 发明授权

US07332261B2 Phthalocyanine compound, process for preparing the same, and optical recording medium containing the same 失效
标题翻译：酞菁化合物，其制备方法和含有该酞菁化合物的光学记录介质
公开(公告)号：US07332261B2
公开(公告)日：2008-02-19
申请号：US10504089
申请日：2003-02-14
申请人： Kazuhiro Seino , Shinichi Nakagawa , Tsutami Misawa , Satoshi Kinoshita , Akihiro Kosaka , Hiroshi Terao , Yojiro Kumagae
发明人： Kazuhiro Seino , Shinichi Nakagawa , Tsutami Misawa , Satoshi Kinoshita , Akihiro Kosaka , Hiroshi Terao , Yojiro Kumagae
IPC分类号： G11B7/248
CPC分类号： C09B47/18 , C09B47/16 , G11B7/248
摘要： A phthalocyanine compound represented by the following general formula (I) and the mixture thereof, and an optical recording medium containing the compound/mixture in its recording layer. wherein in formula (I), M is two hydrogen atoms, a divalent metal atom, a mono-substituted trivalent metal atom, a di-substituted tetravalent metal atom, or an oxymetal, and L1, L2, L3 and L4 are each independently formula (a), formula (b), or formula (c): wherein X, Y, Z and R are defined.
摘要翻译：由以下通式（I）表示的酞菁化合物及其混合物，以及在其记录层中含有该化合物/混合物的光学记录介质。式（I）中，M为2个氢原子，2价金属原子，单取代三价金属原子，二取代四价金属原子或氧化金属，L 1，L L 2，L 3和L 4各自独立地为式（a），式（b）或式（c）：其中X， Y，Z和R被定义。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式