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    • 72. 发明授权
    • Insulated gate type semiconductor apparatus with a control circuit
    • 具有控制电路的绝缘栅型半导体装置
    • US06385025B2
    • 2002-05-07
    • US09797983
    • 2001-03-05
    • Kozo SakamotoIsao Yoshida
    • Kozo SakamotoIsao Yoshida
    • H02H300
    • H03K17/0828H03K17/0822H03K2017/0806
    • A semiconductor apparatus such as a power MOSFET, an IGBT, or the like is provided having therein a control circuit such as an over-heating protection circuit and an over-current protection circuit, which realizes both of high-speed operation and prevention of erroneous operation caused by a parasitic device. To prevent erroneous operation, the control circuit controls so that when the voltage of a gate terminal is positive relative to that of a source terminal, a first switch circuit is turned on, when the voltage of the gate terminal is negative relative to that of the source terminal, a second switch circuit is turned on, and when the gate terminal and the source terminal have an almost same potential and a drain terminal has a high potential, the second switch circuit is turned on, thereby reducing leakage current from the drain terminal to the gate terminal.
    • 提供诸如功率MOSFET,IGBT等的半导体装置,其中具有诸如过热保护电路和过电流保护电路的控制电路,其实现高速操作和防止错误 由寄生器件引起的操作。 为了防止错误操作,控制电路进行控制,使得当栅极端子的电压相对于源极端子的电压为正时,第一开关电路导通,当栅极端子的电压相对于栅极端子的电压为负时 源极端子,第二开关电路导通,并且当栅极端子和源极端子具有几乎相同的电位且漏极端子具有高电位时,第二开关电路导通,从而减少漏极端子的漏电流 到门终端。
    • 73. 发明授权
    • V-ribbed power transmission belt
    • V型动力传动带
    • US06361462B1
    • 2002-03-26
    • US09490480
    • 2000-01-24
    • Toshimichi TakadaKazutoshi IshidaYorifumi HinenoIsao Yoshida
    • Toshimichi TakadaKazutoshi IshidaYorifumi HinenoIsao Yoshida
    • F16G506
    • B32B25/02F16G5/20
    • A power transmission belt having a body with a length, an inside, an outside, and laterally spaced sides. The body has a bonding rubber layer in which elongate load carrying cords are embedded to extend lengthwise of the body. The body has a first layer on the inside of the bonding rubber layer in which a plurality of laterally spaced ribs are formed extending lengthwise of the body, and a second layer on the outside of the bonding rubber layer in which a plurality of laterally spaced ribs are formed extending lengthwise of the body. The bonding rubber layer has a sulfur-crosslinked rubber composition including an ethylene-&agr;-olefin elastomer. At least one of the first and second layers has a crosslinking product that is an organic peroxide-crosslinked rubber composition including an ethylene-&agr;-olefin elastomer.
    • 一种动力传动带,其具有长度,内侧,外侧和侧向间隔开的主体。 主体具有接合橡胶层,其中细长载荷承载绳被嵌入以延伸到身体的纵向。 主体在接合橡胶层的内侧具有第一层,其中沿主体纵向延伸形成有多个横向隔开的肋,以及在接合橡胶层的外侧上的第二层,其中多个横向隔开的肋 形成在身体纵向延伸。 接合橡胶层具有包含乙烯-α-烯烃弹性体的硫交联橡胶组合物。 第一层和第二层中的至少一层具有交联产物,其是包含乙烯-α-烯烃弹性体的有机过氧化物交联的橡胶组合物。
    • 75. 发明授权
    • Insulated gate type semiconductor apparatus with a control circuit
    • 具有控制电路的绝缘栅型半导体装置
    • US06201677B1
    • 2001-03-13
    • US09489736
    • 2000-01-21
    • Kozo SakamotoIsao Yoshida
    • Kozo SakamotoIsao Yoshida
    • H02H308
    • H03K17/0828H03K17/0822H03K2017/0806
    • There is disclosed a semiconductor apparatus such as a power MOSFET, an IGBT, or the like having therein a control circuit such as an over-heating protection circuit and an over-current protection circuit, which realizes both of high-speed operation and prevention of erroneous operation caused by a parasitic device. In order to prevent erroneous operation of a power MOSFET 30 and a protection circuit 21 caused by a parasitic npn transistor 29 of an MOSFET 32, a control circuit 20 controls so that when the voltage of a gate terminal 2 is positive relative to that of a source terminal 3, a switch circuit SW3 is turned on, when the voltage of the gate terminal 2 is negative relative to that of the source terminal 3, a switch circuit SW2 is turned on, and when the gate terminal 2 and the source terminal 3 have an almost same potential and a drain terminal 1 has a high potential, the switch circuit SW2 is turned on. By adding such a control circuit, an insulated gate semiconductor apparatus having therein the protection circuit according to the invention can reduce a leakage current flowing from the drain terminal to the gate terminal when a negative voltage is applied to the gate and can operate at high speed without causing drop of a drain breakdown voltage.
    • 公开了具有诸如过热保护电路和过电流保护电路等控制电路的功率MOSFET,IGBT等半导体装置,实现了高速运行和防止 由寄生器件引起的错误操作。为了防止由MOSFET32的寄生npn晶体管29引起的功率MOSFET 30和保护电路21的错误操作,控制电路20控制,使得当栅极端子 2相对于源极端子3是正的,开关电路SW3导通,当栅极端子2的电压相对于源极端子3的电压为负时,开关电路SW2导通,并且当 栅极端子2和源极端子3具有几乎相同的电位,并且漏极端子1具有高电位,开关电路SW2导通。通过添加这种控制电路,绝缘栅极半导体装置h 其中根据本发明的保护电路可以减小当向栅极施加负电压时能够从漏极端子流到栅极端子的漏电流,并且可以在不引起漏极击穿电压下降的情况下高速工作。
    • 78. 发明授权
    • Semiconductor device having a protection circuit, and electronic system
including the same
    • 具有保护电路的半导体装置和包括该保护电路的电子系统
    • US5638246A
    • 1997-06-10
    • US10572
    • 1993-01-28
    • Kozo SakamotoIsao YoshidaMasatoshi MorikawaShigeo OhtakaHideki Tsunoda
    • Kozo SakamotoIsao YoshidaMasatoshi MorikawaShigeo OhtakaHideki Tsunoda
    • H02H5/04H03K17/08H03K17/082
    • H02H5/044H03K17/0822H03K2017/0806
    • In a semiconductor device including a power MOSFET (M.sub.0) for the output stage, a temperature detection circuit produces an output signal upon detecting an abnormal rise in the chip temperature, the signal turns on a set input element (M.sub.1) in a latch circuit so that the latch circuit becomes a set state, the set output of the latch circuit turns on a control element (M.sub.5), causing the power MOSFET to become non-conductive so that it is protected from destruction. The latch circuit is not brought to a reset state even if the external gate terminal of the device is brought to zero volt. With a voltage outside the range of the normal input signal, e.g., a large negative voltage, being applied to the external gate terminal, the gate capacitance of the control element (M.sub.5) discharges, and consequently the latch circuit is brought to the reset state and the protective operation is cancelled. The semiconductor device is further provided with an external reset terminal, and the protective operation can also be cancelled through the application of a reset signal to the external reset terminal. The semiconductor device is protected from destruction and also from deterioration of characteristics of the power MOSFET (M.sub.0), and yet the protective operation is not cancelled erroneously by the normal input signal.
    • 在包括用于输出级的功率MOSFET(M0)的半导体器件中,温度检测电路在检测到芯片温度的异常升高时产生输出信号,该信号使锁存电路中的设定输入元件(M1)接通,从而 锁存电路变为置位状态,锁存电路的设定输出导通控制元件(M5),使功率MOSFET变得不导通,从而防止其破坏。 即使器件的外部栅极端子达到零伏,锁存电路也不会进入复位状态。 在外部栅极端子施加正常输入信号(例如,大的负电压)的范围之外的电压时,控制元件(M5)的栅极电容放电,因此锁存电路进入复位状态 并且保护操作被取消。 半导体器件还具有外部复位端子,并且还可以通过向外部复位端子施加复位信号来取消保护操作。 保护半导体器件不受破坏,也可以防止功率MOSFET(M0)的特性恶化,而保护操作也不会被正常输入信号错误地消除。