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71. 发明授权

US5023420A Wire tension controlling method in a wire cut electric discharge machine 失效
标题翻译：线切割放电机的线张力控制方法
公开(公告)号：US5023420A
公开(公告)日：1991-06-11
申请号：US474754
申请日：1990-03-23
申请人： Toshiyuki Aso , Yasuo Arakawa , Junichi Kato
发明人： Toshiyuki Aso , Yasuo Arakawa , Junichi Kato
IPC分类号： B23H7/10
CPC分类号： B23H7/104
摘要： A wire tension controlling method in a wire cut electric discharge machine, capable of preventing occurrence of an excessive variation in a wire tension which may be caused by an abnormal operation of an electromagnetic powder brake upon start and release of application of the wire tension, and upon change of same. When the presence of a possibility of an actual wire tension being excessively changed is determined on the basis of the result of comparison between a present instructed wire tension and a new wire tension, a process of adding or subtracting an upper limit variation amount, set beforehand to such a value which may not cause the excessive variation in the wire tension, to or from the present target wire tension is repeatedly effected at predetermined intervals of a cycle until the target wire tension reaches the instructed wire tension, so that the electromagnetic powder brake effects a braking operation at an operation voltage corresponding to gradually changing target wire tension, so that the actual wire tension is gradually changed to the instructed wire tension.

72. 发明申请

US20090190428A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：非易失性半导体存储器件
公开(公告)号：US20090190428A1
公开(公告)日：2009-07-30
申请号：US12256775
申请日：2008-10-23
申请人： Junichi Kato
发明人： Junichi Kato
IPC分类号： G11C5/14
CPC分类号： G11C16/30 , G11C5/141 , G11C5/147
摘要： In a semiconductor device equipped with a nonvolatile memory, using a simple configuration, a write operation and the like are reliably made feasible even when stability of power supply from an external component is inhibited. The semiconductor device includes a nonvolatile memory core including a nonvolatile memory and a switch for switching a power supply mode for supplying power to the nonvolatile memory core between a first mode in which power is supplied from an external power supply and a second mode in which power is supplied from an accumulation device used as a back-up power supply. The nonvolatile memory core outputs a status signal indicating an operation state of the nonvolatile memory core, and the switch switches the power supply mode according to an operation state of the nonvolatile memory core that the status signal indicates.
摘要翻译：在配备有非易失性存储器的半导体器件中，即使在抑制来自外部部件的电源的稳定性的情况下，也可以使用简单的结构，写入动作等可靠地实现。半导体器件包括非易失性存储器芯，其包括非易失性存储器和开关，用于在从外部电源供应电力的第一模式和第二模式之间切换用于向非易失性存储器核心供电的电源模式，由用作备用电源的蓄积装置提供。非易失性存储器核心输出表示非易失性存储器核心的运行状态的状态信号，并且该开关根据状态信号指示的非易失性存储器核心的运行状态切换电源模式。

73. 外观设计

USD589150S1 Blood pressure measuring apparatus 有权
公开(公告)号：USD589150S1
公开(公告)日：2009-03-24
申请号：US29292055
申请日：2007-09-26
申请人： Junichi Kato
设计人： Junichi Kato

74. 外观设计

USD583477S1 Blood pressure cuff 有权
标题翻译：血压袖带
公开(公告)号：USD583477S1
公开(公告)日：2008-12-23
申请号：US29288905
申请日：2007-06-26
申请人： Junichi Kato
设计人： Junichi Kato

75. 发明授权

US07420844B2 Non-volatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US07420844B2
公开(公告)日：2008-09-02
申请号：US11523564
申请日：2006-09-20
申请人： Junichi Kato , Akira Sugimoto , Masayoshi Nakayama , Norio Hattori
发明人： Junichi Kato , Akira Sugimoto , Masayoshi Nakayama , Norio Hattori
IPC分类号： G11C16/06
CPC分类号： G11C16/28 , G11C16/0458 , G11C16/0475 , G11C16/0491
摘要： A memory cell array with a group of memory cells capable of retaining two-bit information. Each memory cell has a pair of transistors having charge storage regions, mutually connected gates, and mutually connected sources. Word lines are provided to the gates of the transistors. Bit lines are provided to the sources and drains of the transistors. A pair of the bit lines respectively connected to the drains of a pair of transistors included in a memory cell are connected to a comparison input terminal of the differential detector. An information retained in the memory cell is read based on a comparison result of current amounts inputted to the differential detector via the pair of bit lines obtained by the differential detector in a state where memory cell currents are simultaneously and independently supplied to the pair of transistors.
摘要翻译：具有能够保留两位信息的一组存储器单元的存储单元阵列。每个存储单元具有一对具有电荷存储区域，相互连接的栅极和相互连接的源极的晶体管。字线被提供给晶体管的栅极。位线被提供给晶体管的源极和漏极。分别连接到包含在存储单元中的一对晶体管的漏极的一对位线连接到差分检测器的比较输入端子。基于在存储单元电流同时且独立地提供给该对晶体管的状态下，通过由差分检测器获得的一对位线，基于输入到差分检测器的电流量的比较结果来读取保存在存储单元中的信息。

76. 发明授权

US07219416B2 Method of manufacturing a magnetic element 有权
标题翻译：磁性元件的制造方法
公开(公告)号：US07219416B2
公开(公告)日：2007-05-22
申请号：US10842813
申请日：2004-05-11
申请人： Osamu Inoue , Junichi Kato , Nobuya Matsutani , Hiroshi Fujii , Takeshi Takahashi
发明人： Osamu Inoue , Junichi Kato , Nobuya Matsutani , Hiroshi Fujii , Takeshi Takahashi
IPC分类号： H01F7/06
CPC分类号： H01F41/127 , H01F1/24 , H01F1/26 , H01F1/28 , H01F17/04 , H01F27/027 , H01F27/292 , H01F41/0246 , Y10S156/922 , Y10T29/49002 , Y10T29/4902 , Y10T29/49021 , Y10T29/49071 , Y10T29/49073 , Y10T29/49158 , Y10T29/49172 , Y10T29/49176 , Y10T29/4922 , Y10T29/49261 , Y10T29/49277 , Y10T156/1082 , Y10T156/11 , Y10T428/11 , Y10T428/32
摘要： The present invention provides a composite magnetic body containing metallic magnetic powder and thermosetting resin and having a packing ratio of the metallic magnetic powder of 65 vol % to 90 vol % and an electrical resistivity of at least 104 Ω·cm. When a coil is embedded in this composite magnetic body, a miniature magnetic element can be obtained that has a high inductance value and is excellent in DC bias characteristics.
摘要翻译：本发明提供一种复合磁体，其含有金属磁性粉末和热固性树脂，其金属磁性粉末的填充率为65体积％〜90体积％，电阻率为至少10体积％。厘米。当将该线圈嵌入该复合磁体时，可以得到具有高电感值且DC偏置特性优异的微型磁性元件。

77. 发明申请

US20070064490A1 Non-volatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20070064490A1
公开(公告)日：2007-03-22
申请号：US11523564
申请日：2006-09-20
申请人： Junichi Kato , Akira Sugimoto , Masayoshi Nakayama , Norio Hattori
发明人： Junichi Kato , Akira Sugimoto , Masayoshi Nakayama , Norio Hattori
IPC分类号： G11C16/06
CPC分类号： G11C16/28 , G11C16/0458 , G11C16/0475 , G11C16/0491
摘要： A memory cell array comprises a group of memory cells capable of retaining two-bit information. The memory cell has a pair of transistors having charge storage regions and arranged along a row direction of the memory cell array. Word lines are provided between the memory cells adjacent to each other along a column direction of the memory cell array and extend along the row direction. Bit lines are provided between the transistors adjacent to each other along the row direction and extend along the column direction. Gates of the pair of transistors constituting the respective memory cells are connected to each other and further connected to the word line corresponding to the relevant memory cell. Sources of the pair of transistors are connected to each other and further connected to the bit lines provided between the relevant pair of transistors. Drains of the transistors facing each other between the both memory cells adjacent to each other along the row direction are connected to each other and further connected to the bit line provided between the relevant adjacent memory cells. A pair of the bit lines connected to the both drains of the pairs of transistors included in all of the memory cells are connected to a comparison input terminal of the differential detector. An information retained in the memory cell is read based on a comparison result of current amounts inputted to the differential detector via the pair of bit lines obtained by the differential detector in a state where memory cell currents are simultaneously and independently supplied to the pair of transistors.
摘要翻译：存储单元阵列包括能够保留两位信息的一组存储单元。存储单元具有一对具有电荷存储区并且沿着存储单元阵列的行方向布置的晶体管。字线被设置在沿着存储单元阵列的列方向彼此相邻的存储单元之间并且沿着行方向延伸。位线沿着行方向设置在彼此相邻的晶体管之间并且沿列方向延伸。构成各个存储单元的一对晶体管的栅极彼此连接并进一步连接到与相关存储单元对应的字线。一对晶体管的源极彼此连接并且进一步连接到设置在相关晶体管对之间的位线。在沿着行方向彼此相邻的两个存储单元之间彼此面对的晶体管的漏极彼此连接，并进一步连接到设置在相邻的相邻存储单元之间的位线。连接到包括在所有存储单元中的晶体管对的两个漏极的一对位线连接到差分检测器的比较输入端子。基于在存储单元电流同时且独立地提供给该对晶体管的状态下，通过由差分检测器获得的一对位线，基于输入到差分检测器的电流量的比较结果来读取保存在存储单元中的信息。

78. 发明授权

US07161832B2 Non-volatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US07161832B2
公开(公告)日：2007-01-09
申请号：US11143581
申请日：2005-06-03
申请人： Junichi Kato , Masayoshi Nakayama , Takao Ozeki , Asako Miyoshi , Shinichi Hatakeyama
发明人： Junichi Kato , Masayoshi Nakayama , Takao Ozeki , Asako Miyoshi , Shinichi Hatakeyama
IPC分类号： G11C11/34 , G11C16/04
CPC分类号： G11C14/00 , G11C16/0441
摘要： A switch section connects a first wire line aSL to the gate of a first memory transistor 1 and the source of a second memory transistor 2 and a second wire line bSL to the source of the first memory transistor 1 and the gate of the second memory transistor 2 when first type data is to be written into a memory cell; and connects the first wire line aSL to the source of the first memory transistor 1 and the gate of the second memory transistor 2 and the second wire line bSL to the gate of the first memory transistor 1 and the source of the second memory transistor 2 when second type data is to be written into a memory cell.
摘要翻译：开关部分将第一有线线路aSL连接到第一存储晶体管1的栅极和第二存储晶体管2的源极和第二有线线路bSL连接到第一存储晶体管1的源极和第二存储晶体管的栅极当第一类数据被写入存储单元时; 并且将第一有线线路aSL连接到第一存储晶体管1的源极和第二存储晶体管2的栅极和第二有线线路bSL到第一存储晶体管1的栅极和第二存储晶体管2的源极，第二类型数据将被写入存储单元。

79. 发明授权

US06921876B2 Method for adjusting nozzle gap 失效
标题翻译：调整喷嘴间隙的方法
公开(公告)号：US06921876B2
公开(公告)日：2005-07-26
申请号：US10856977
申请日：2004-05-28
申请人： Shinji Okuda , Mitsuyoshi Ishihara , Junichi Kato
发明人： Shinji Okuda , Mitsuyoshi Ishihara , Junichi Kato
IPC分类号： B23H7/02 , B23H7/10
CPC分类号： B23H7/101
摘要： A method for adjusting the gap between an upper nozzle of a wire electric discharge machine includes placing a spacer member of a known thickness between a forward end of the upper nozzle and a workpiece. The forward end of the upper nozzle is brought into contact with the spacer member, so that the forward end of the upper nozzle is prevented from coming into direct contact with the workpiece. A Z-axis position of the upper nozzle is controlled on the basis of the thickness of the spacer member and the desired nozzle gap to set the gap between the forward end of the upper nozzle and the workpiece to a predetermined value. In controlling the Z-axis position of the upper nozzle, correction is made to compensate for a deformation of the upper guide, the spacer member, the workpiece, and the upper nozzle, and/or for a displacement of the upper guide resulting from a pressure of a working fluid.
摘要翻译：一种用于调节电火花线切割机的上喷嘴之间的间隙的方法包括将已知厚度的间隔件放置在上喷嘴的前端和工件之间。上部喷嘴的前端与间隔件接触，防止上部喷嘴的前端与工件直接接触。基于间隔件的厚度和所需的喷嘴间隙来控制上喷嘴的Z轴位置，以将上喷嘴的前端与工件之间的间隙设定为预定值。在控制上喷嘴的Z轴位置时，进行校正以补偿上引导件，间隔件，工件和上喷嘴的变形，和/或用于由上引导件产生的上引导件的位移工作流体的压力。

80. 发明申请

US20050047576A1 Telephone support method, storage medium and apparatus 失效
标题翻译：电话支持方式，存储介质和设备
公开(公告)号：US20050047576A1
公开(公告)日：2005-03-03
申请号：US10786141
申请日：2004-02-26
申请人： Shigeru Hidesawa , Junichi Kato
发明人： Shigeru Hidesawa , Junichi Kato
IPC分类号： G06Q10/00 , G06Q30/02 , G06Q50/00 , H04M3/00 , H04M3/42 , H04M3/51 , H04M3/523 , H04M5/00 , H04M11/00
CPC分类号： H04M3/5238
摘要： A support reception unit issues a reception number in response to an application for support from a client and notifies the client of the reception number and a guidance for a call connection. A wait state management unit allocates into a queue the reception number sent from a call connection by telephone, holds the call connection and notifies the client, for display, of a current wait state and wait time points increased as a wait time elapses, until a support client becomes available for response. When the support client has become available for response, a support start unit confirms start of support for the client and, as a result of a confirmation response, connects by an extension the held call connection to the support client. A support end unit adds the wait time points to be accumulated and stores them at the point of time when the call connection with the supporter is terminated.
摘要翻译：支持接收单元响应于来自客户端的支持的应用发出接收号码，并向客户通知接收号码和呼叫连接的指导。等待状态管理单元通过电话将从呼叫连接发送的接收号码分配到队列中，保持呼叫连接并通知客户端以显示当前等待状态，并且等待时间过去等待时间点增加，直到等待时间支持客户端可用于响应。当支持客户端可用于响应时，支持启动单元确认对客户端的支持开始，并且作为确认响应的结果，通过分机将保持的呼叫连接连接到支持客户端。支持端单元添加待累积的等待时间点，并在与支持者的呼叫连接终止的时刻存储。

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