专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明申请

US20120099695A1 FUEL GUIDE PIN, FUEL GUIDE PIN ATTACHMENT METHOD, CORE PLATE, AND NUCLEAR REACTOR 审中-公开
标题翻译：燃油指南引脚，燃油指南引导附件方法，核心板和核反应堆
公开(公告)号：US20120099695A1
公开(公告)日：2012-04-26
申请号：US13275731
申请日：2011-10-18
申请人： Makoto Nakajima
发明人： Makoto Nakajima
IPC分类号： G21C3/32
CPC分类号： G21C5/06 , G21C19/19 , Y02E30/40
摘要： A fuel guide pin to be fixed to a core plate includes a shrink fit portion 2 which is inserted into a recessed portion 22a having a bottom and being provided in a core support plate 22 and fixed thereto by means of shrink fit;a pin portion 3 provided above the shrink fit portion 2 and projecting from an upper surface of the core support plate 22, over which a fuel assembly to be loaded on the core support plate 22 is inserted; and a constricted portion 4 which is provided between the shrink fit portion 2 and the pin portion 3 in a constricted shape having a smaller diameter than an outer diameter of the pin portion 3 and has a lower narrowed portion 4a smoothly narrowed toward the most constricted portion from the shrink fit portion side 2.
摘要翻译：要固定在芯板上的燃料导向销包括一个收缩配合部分2，该收缩配合部分2插入到具有底部的凹入部分22a中并且设置在芯支撑板22中并通过收缩配合固定在其上; 销部3，其设置在收缩配合部2的上方并从芯支撑板22的上表面突出，在其上插入要装载在芯支撑板22上的燃料组件; 以及收缩配合部2和销部3之间的缩径部4，其缩径形状具有比销部3的外径小的直径，并且具有朝向最狭窄部平滑地变窄的下部变窄部4a 从收缩配合部侧2。

72. 发明授权

US08121243B2 In-core-monitor-guide-tube supporting apparatus 有权
标题翻译：内核监视导管支持装置
公开(公告)号：US08121243B2
公开(公告)日：2012-02-21
申请号：US11475251
申请日：2006-06-27
申请人： Satoshi Yonemoto , Shigeyuki Watanabe , Makoto Nakajima
发明人： Satoshi Yonemoto , Shigeyuki Watanabe , Makoto Nakajima
IPC分类号： G21C9/00 , G21C17/00
CPC分类号： G21C19/02 , G21Y2002/303 , G21Y2004/301
摘要： Monitor-guide-tube fixing sections are fixed to portions on a core support plate side of a plurality of in-core monitor guide tubes disposed in a reactor vessel. The monitor-guide-tube fixing sections are fixed to the core support plate disposed in the reactor vessel to fix the in-core monitor guide tubes to the core support plate. This makes it possible to realize improvement of rigidity of the fixed sections of the in-core monitor guide tubes. A tie plate is fixed to the in-core monitor guide tubes. The in-core monitor guide tubes are coupled by the tie plate. This makes it possible to realize improvement of rigidity of the entire in-core monitor guide tubes. As a result, it is possible to realize vibration damping for the in-core monitor guide tubes.
摘要翻译：显示器导管固定部固定在设置在反应容器中的多个芯内监视器引导管的芯支撑板侧的部分。显示器导向管固定部分固定在设置在反应器容器中的芯支撑板上，以将芯内显示器引导管固定在芯支撑板上。由此，能够实现芯内监视导管的固定部的刚性的提高。连接板固定在内芯显示器导管上。内核显示器引导管通过连接板联接。这使得可以实现整个内核监视器引导管的刚性的提高。结果，可以实现内核监视器引导管的减震。

73. 发明授权

US07842620B2 Method for manufacturing semiconductor device using quadruple-layer laminate 有权
标题翻译：使用四层层压制造半导体器件的方法
公开(公告)号：US07842620B2
公开(公告)日：2010-11-30
申请号：US12311742
申请日：2007-10-12
申请人： Satoshi Takei , Makoto Nakajima , Yasushi Sakaida , Hikaru Imamura , Keisuke Hashimoto , Takahiro Kishioka
发明人： Satoshi Takei , Makoto Nakajima , Yasushi Sakaida , Hikaru Imamura , Keisuke Hashimoto , Takahiro Kishioka
IPC分类号： H01L21/31
CPC分类号： H01L21/0332 , G03F7/0752 , G03F7/091 , G03F7/11 , H01L21/0274 , H01L21/31138 , H01L21/31144
摘要： There is provided a laminate used as an underlayer layer for a photoresist in a lithography process of a semiconductor device and a method for manufacturing a semiconductor device by using the laminate. The method comprising: laminating each layer of an organic underlayer film (layer A), a silicon-containing hard mask (layer B), an organic antireflective film (layer C) and a photoresist film (layer D) in this order on a semiconductor substrate. The method also comprises: forming a resist pattern in the photoresist film (layer D); etching the organic antireflective film (layer C) with the resist pattern; etching the silicon-containing hard mask (layer B) with the patterned organic antireflective film (layer C); etching the organic underlayer film (layer A) with the patterned silicon-containing hard mask (layer B); and processing the semiconductor substrate with the patterned organic underlayer film (layer A).
摘要翻译：在半导体器件的光刻工艺中提供了用作光致抗蚀剂的下层的层压体，以及通过使用层压体制造半导体器件的方法。该方法包括：在半导体上依次层叠有机下层膜（A层），含硅硬掩模（B层），有机抗反射膜（C层）和光致抗蚀剂膜（D层）的各层基质。该方法还包括：在光致抗蚀剂膜（层D）中形成抗蚀剂图案; 用抗蚀剂图案蚀刻有机抗反射膜（层C）; 用图案化的有机抗反射膜（C层）蚀刻含硅硬掩模（B层）; 用图案化的含硅硬掩模（B层）蚀刻有机下层膜（层A）; 并用图案化的有机下层膜（层A）处理半导体衬底。

74. 发明申请

US20100291487A1 SILICON-CONTAINING RESIST UNDERLAYER FILM FORMING COMPOSITION HAVING UREA GROUP 有权
标题翻译：含有电阻膜的成膜组合物
公开(公告)号：US20100291487A1
公开(公告)日：2010-11-18
申请号：US12811424
申请日：2009-01-08
申请人： Makoto Nakajima , Yuta Kanno , Wataru Shibayama
发明人： Makoto Nakajima , Yuta Kanno , Wataru Shibayama
IPC分类号： G03F7/20 , C08G77/26 , C08L83/00
CPC分类号： G03F7/11 , C08G77/26 , C09D183/08 , G03F7/0752 , G03F7/0757 , G03F7/091 , G03F7/30 , G03F7/322 , G03F7/36 , G03F7/40
摘要： There is provided a resist underlayer film forming composition for lithography for forming a resist underlayer film capable of being used as a hardmask. A resist underlayer film forming composition for lithography comprising: a hydrolyzable organosilane having a urea group; a hydrolysis product thereof; or a hydrolysis-condensation product thereof. The hydrolyzable organosilane is for example a compound of Formula (1): where at least one of three groups T1, T2, and T3 is a group of Formula (2):
摘要翻译：提供了用于形成能够用作硬掩模的抗蚀剂下层膜的光刻用抗蚀剂下层膜形成用组合物。一种用于光刻的抗蚀剂下层膜形成组合物，包括：具有脲基的可水解的有机硅烷; 其水解产物; 或其水解缩合产物。可水解的有机硅烷是例如式（1）的化合物：其中三个基团T1，T2和T3中的至少一个是式（2）的基团：

75. 发明申请

US20100022089A1 Method for manufacturing semiconductor device using quadruple-layer laminate 有权
公开(公告)号：US20100022089A1
公开(公告)日：2010-01-28
申请号：US12311742
申请日：2007-10-12
申请人： Satoshi Takei , Makoto Nakajima , Yasushi Sakaida , Hikaru Imamura , Keisuke Hashimoto , Takahiro Kishioka
发明人： Satoshi Takei , Makoto Nakajima , Yasushi Sakaida , Hikaru Imamura , Keisuke Hashimoto , Takahiro Kishioka
IPC分类号： H01L21/311 , G03F7/075
CPC分类号： H01L21/0332 , G03F7/0752 , G03F7/091 , G03F7/11 , H01L21/0274 , H01L21/31138 , H01L21/31144
摘要： There is provided a laminate used as an underlayer layer for a photoresist in a lithography process of a semiconductor device and a method for manufacturing a semiconductor device by using the laminate. The method comprising: laminating each layer of an organic underlayer film (layer A), a silicon-containing hard mask (layer B), an organic antireflective film (layer C) and a photoresist film (layer D) in this order on a semiconductor substrate. The method also comprises: forming a resist pattern in the photoresist film (layer D); etching the organic antireflective film (layer C) with the resist pattern; etching the silicon-containing hard mask (layer B) with the patterned organic antireflective film (layer C); etching the organic underlayer film (layer A) with the patterned silicon-containing hard mask (layer B); and processing the semiconductor substrate with the patterned organic underlayer film (layer A).

76. 发明申请

US20090327599A1 VIRTUAL TAPE DEVICE, DATA BACKUP METHOD, AND RECORDING MEDIUM 有权
标题翻译：虚拟磁带设备，数据备份方法和记录介质
公开(公告)号：US20090327599A1
公开(公告)日：2009-12-31
申请号：US12490604
申请日：2009-06-24
申请人： Hajime Nonaka , Yoshiaki Mori , Makoto Nakajima , Muneyuki Yoshikawa
发明人： Hajime Nonaka , Yoshiaki Mori , Makoto Nakajima , Muneyuki Yoshikawa
IPC分类号： G06F12/00 , G06F12/16
CPC分类号： G06F1/3203 , G06F1/3268 , G06F3/0625 , G06F3/0634 , G06F3/0686 , Y02D10/154
摘要： To provide a virtual tape device to reduce power consumption by utilizing a disk array device conforming to MAID. Two or more disk devices are divided into an information managing disk group whose power is kept on at all times and to two or more recording disk groups whose power is turned on/off as necessary when managing data. The virtual tape device includes: a volume information managing part which manages positions of virtual tapes allotted to storage areas of the recording disk groups; and a data managing part which rearranges, in the recording disk group whose power is on, the virtual tape for storing the data to the recording disk group whose power is off based on writing/reading information stored in the information managing disk group and positional information of the virtual tapes, and executes a control to write backup data to the recording disk group whose power is on.
摘要翻译：通过利用符合MAID的磁盘阵列设备来提供虚拟磁带设备以降低功耗。两个或更多个磁盘设备被分成一直保持功率的信息管理磁盘组，并且在管理数据时，根据需要将其功率打开/关闭的两个或更多个记录磁盘组分配。虚拟磁带装置包括：卷信息管理部，其管理分配给记录盘组的存储区域的虚拟磁带的位置; 以及数据管理部，其根据存储在信息管理盘组中的写入/读取信息，在存储在信息管理盘组中的写入/读取信息的情况下，重新排列在电源打开的记录盘组中，将用于存储数据的虚拟磁带重新排列到电源关闭的记录盘组上，的虚拟磁带，并且执行控制以将备份数据写入到其打开电源的记录盘组。

77. 发明申请

US20090252881A1 METHOD OF SPRAY APPLICATION, AND SPRAY APPARATUS, FOR BENTONITE MATERIAL 有权
标题翻译：喷涂方法和喷涂装置，用于膨润材料
公开(公告)号：US20090252881A1
公开(公告)日：2009-10-08
申请号：US12064004
申请日：2006-08-10
申请人： Ichizo Kobayashi , Takeshi Sasakura , Toshiyuki Tanaka , Makoto Nakajima , Masaru Toida , Takahisa Isobe
发明人： Ichizo Kobayashi , Takeshi Sasakura , Toshiyuki Tanaka , Makoto Nakajima , Masaru Toida , Takahisa Isobe
IPC分类号： B05D1/02 , B05B7/04
CPC分类号： B28C5/026 , B01F5/0256 , B05B7/0416 , E02D31/02 , E02D31/04 , E21F15/10 , G21F9/36
摘要： The present invention provides a spray method and spray apparatus for bentonite-based material that allow forming a bentonite layer of high dry density. A spray apparatus 1 comprises a supersonic nozzle 2, to which a compressor 5 and a bentonite container 6 are connected. The supersonic nozzle 2 is fed compressed air from the compressor 5 and a bentonite-based material from the bentonite container 6. The compressed air, mixed with the bentonite-based material, is accelerated to supersonic speed when passing through a constriction portion 14 of the supersonic nozzle 2, and is sprayed at supersonic speed out of a jet orifice 11.
摘要翻译：本发明提供了一种用于膨润土基材料的喷涂方法和喷涂装置，其允许形成高密度的膨润土层。喷雾装置1包括超音速喷嘴2，压缩机5和膨润土容器6连接到该喷嘴上。超音速喷嘴2从压缩机5输送压缩空气和来自膨润土容器6的膨润土类材料。与膨润土类材料混合的压缩空气通过膨润土类材料的收缩部14时被加速到超声速度超音速喷嘴2，并且以超音速喷射出喷射孔11。

78. 发明申请

US20070019774A1 In-core-monitor-guide-tube supporting apparatus 有权
标题翻译：内核监视导管支持装置
公开(公告)号：US20070019774A1
公开(公告)日：2007-01-25
申请号：US11475251
申请日：2006-06-27
申请人： Satoshi Yonemoto , Shigeyuki Watanabe , Makoto Nakajima
发明人： Satoshi Yonemoto , Shigeyuki Watanabe , Makoto Nakajima
IPC分类号： G21C17/00
CPC分类号： G21C19/02 , G21Y2002/303 , G21Y2004/301
摘要： Monitor-guide-tube fixing sections are fixed to portions on a core support plate side of a plurality of in-core monitor guide tubes disposed in a reactor vessel. The monitor-guide-tube fixing sections are fixed to the core support plate disposed in the reactor vessel to fix the in-core monitor guide tubes to the core support plate. This makes it possible to realize improvement of rigidity of the fixed sections of the in-core monitor guide tubes. A tie plate is fixed to the in-core monitor guide tubes. The in-core monitor guide tubes are coupled by the tie plate. This makes it possible to realize improvement of rigidity of the entire in-core monitor guide tubes. As a result, it is possible to realize vibration damping for the in-core monitor guide tubes.
摘要翻译：显示器导管固定部固定在设置在反应容器中的多个芯内监视器引导管的芯支撑板侧的部分。显示器导向管固定部分固定在设置在反应器容器中的芯支撑板上，以将芯内显示器引导管固定在芯支撑板上。由此，能够实现芯内监视导管的固定部的刚性的提高。连接板固定在内芯显示器导管上。内核显示器引导管通过连接板联接。这使得可以实现整个内核监视器引导管的刚性的提高。结果，可以实现内核监视器引导管的减震。

79. 发明授权

US06476847B2 Pulse width modulation system and image forming apparatus having the pulse width modulation system 失效
公开(公告)号：US06476847B2
公开(公告)日：2002-11-05
申请号：US09986942
申请日：2001-11-13
申请人： Hiroki Satoh , Makoto Nakajima , Koji Tanimoto
发明人： Hiroki Satoh , Makoto Nakajima , Koji Tanimoto
IPC分类号： B41J247
CPC分类号： G06K15/00 , G06K2215/0002 , G06K2215/0011 , G06K2215/0082
摘要： When a CPU begins to monitor whether delay variation characteristics of a pulse width variation circuit have varied, it selects a basic delay setting value in a basic delay value setting block from a smallest one. The CPU sets a division number in a phase select block from a given minimum desired division number for pulse width modulation. The CPU senses the level of a phase comparison result signal (PHASE) from the pulse width modulation circuit. If the phase comparison result signal is stable at “1”, the CPU 1 fixes the division number. If the phase comparison result signal is “0” and the division number is not maximum, the CPU increases the division number and goes back to the setting of the division number. If the division number is maximum, the CPU increases the basic delay and goes back to the basic delay setting.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式