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    • 71. 发明授权
    • Method of forming modified layer and pattern
    • 形成改性层和图案的方法
    • US4900396A
    • 1990-02-13
    • US233585
    • 1988-08-18
    • Yutaka HayashiKenichi IshiiShunsuke Fujita
    • Yutaka HayashiKenichi IshiiShunsuke Fujita
    • H01L21/033H01L21/314H01L21/32
    • H01L21/033H01L21/3144H01L21/32
    • A two-dimensional pattern of a silicon oxide film is formed on a silicon surface of a substrate, thereby to form a material, the two-dimensional pattern being represented by the presence and absence and/or thickness variations of the silicon oxide film. The material is nitrided to form a modified layer on the surface of the material, the modified layer being thicker on the silicon oxide film and thinner on the silicon surface of the substrate or thicker on the thicker portion of the silicon oxide film and thinner on the thinner portion of the silicon oxide film. The thinner portion of the modified layer is removed while leaving the thicker portion of the modified layer, for thereby forming the modified layer on the silicon oxide film substantially in the same shape as the silicon oxide film. An oxidant diffusion prevention film is formed at least on a thicker portion of the oxide film which has a thicker portion and a thinner portion on a substrate, then a silicon film, a silicide film, or a multilayer film composed of silicon and silicide films is deposited on a surface of the substrate a mask layer is formed on the film or films. The silicon film, the silicide film, or the multilayer film is oxidized to pattern the same in a shape corresponding to the mask layer. A relatively thin silicon oxide film may be formed on the oxidant diffusion prevention film.
    • 在基板的硅表面上形成氧化硅膜的二维图案,从而形成材料,二维图案由氧化硅膜的存在和/或厚度变化来表示。 该材料被氮化以在材料的表面上形成改性层,改性层在氧化硅膜上更厚并且在衬底的硅表面上更薄,或者在氧化硅膜的较厚部分上更厚, 较薄的氧化硅膜部分。 除去改性层的较薄部分,同时留下改性层的较厚部分,由此在氧化硅膜上形成基本上与氧化硅膜相同形状的改性层。 至少在基板上具有较厚部分和较薄部分的氧化物膜的较厚部分上形成氧化物扩散防止膜,则硅膜,硅化物膜或由硅和硅化物膜构成的多层膜为 沉积在衬底的表面上,在膜或膜上形成掩模层。 硅膜,硅化物膜或多层膜被氧化成与掩模层相对应的形状。 可以在氧化剂扩散防止膜上形成相对薄的氧化硅膜。
    • 75. 发明授权
    • Electronic apparatus and display panel
    • 电子仪器和显示面板
    • US08743095B2
    • 2014-06-03
    • US13395223
    • 2010-05-25
    • Hiroyuki MoriwakiMayuko SakamotoKenichi Ishii
    • Hiroyuki MoriwakiMayuko SakamotoKenichi Ishii
    • G09G3/36G02F1/1345
    • G02F1/13452
    • A display device as an electronic apparatus in accordance with the present invention includes a clock signal wiring (104) for connecting to a source driver circuit; a power supply wiring (105) formed at a position where the power supply wiring (105) does not overlap with a projection plane of the clock signal wiring (104), so as to sandwich at least an insulating layer with a layer in which the clock signal wiring (104) is formed; and a capacitive electrode (109) electrically connected to the clock signal wiring (104). The capacitive electrode (109) is formed so as to overlap at least partially with a projection plane of the power supply wiring (105). A capacitance (301) is formed between the capacitive electrode (109) and the power supply wiring (105).
    • 作为根据本发明的电子设备的显示装置包括用于连接到源极驱动器电路的时钟信号布线(104) 形成在电源布线(105)与时钟信号布线(104)的投影平面不重叠的位置处的电源布线(105),以至少将绝缘层夹在其中的层 形成时钟信号布线(104); 和电连接到时钟信号线(104)的电容电极(109)。 电容电极(109)形成为至少部分地与电源布线(105)的投影平面重叠。 电容(301)形成在电容电极(109)和电源配线(105)之间。
    • 79. 发明申请
    • ELECTRONIC APPARATUS AND DISPLAY PANEL
    • 电子装置和显示面板
    • US20120169681A1
    • 2012-07-05
    • US13395223
    • 2010-05-25
    • Hiroyuki MoriwakiMayuko SakamotoKenichi Ishii
    • Hiroyuki MoriwakiMayuko SakamotoKenichi Ishii
    • G09G3/36G06F3/038
    • G02F1/13452
    • A display device as an electronic apparatus in accordance with the present invention includes a clock signal wiring (104) for connecting to a source driver circuit; a power supply wiring (105) formed at a position where the power supply wiring (105) does not overlap with a projection plane of the clock signal wiring (104), so as to sandwich at least an insulating layer with a layer in which the clock signal wiring (104) is formed; and a capacitive electrode (109) electrically connected to the clock signal wiring (104). The capacitive electrode (109) is formed so as to overlap at least partially with a projection plane of the power supply wiring (105). A capacitance (301) is formed between the capacitive electrode (109) and the power supply wiring (105).
    • 作为根据本发明的电子设备的显示装置包括用于连接到源极驱动器电路的时钟信号布线(104) 形成在电源布线(105)与时钟信号布线(104)的投影平面不重叠的位置处的电源布线(105),以至少将绝缘层夹在其中的层 形成时钟信号布线(104); 和电连接到时钟信号线(104)的电容电极(109)。 电容电极(109)形成为至少部分地与电源布线(105)的投影平面重叠。 电容(301)形成在电容电极(109)和电源配线(105)之间。