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71. 发明授权

US6040729A Digital output buffer for multiple voltage system 失效
标题翻译：用于多电压系统的数字输出缓冲器
公开(公告)号：US6040729A
公开(公告)日：2000-03-21
申请号：US917306
申请日：1997-08-25
申请人： Hector Sanchez , Jose M. Alvarez , Joshua Siegel , Carmine Nicoletta
发明人： Hector Sanchez , Jose M. Alvarez , Joshua Siegel , Carmine Nicoletta
IPC分类号： H03K19/003 , H03K17/687
CPC分类号： H03K19/00384 , H03K19/00315
摘要： An output buffer translates digital input signals which toggle between ground and V.sub.DDL to signals which toggle between ground and V.sub.DDH. The technology dielectric breakdown voltage limit is less than the magnitude of V.sub.DDH, such that use of a traditional output stage would subject transistors' dielectrics to voltages which exceed their dielectric breakdown limit, and would thus be damaged. Predrive circuits (40, 50) control output stage (70) transistors' (72, 78) gates, and voltage dropping circuits control output stage (70) transistors (74, 76). These control signals are generated specifically to maximize output stage transistor drive strengths, thereby minimizing output stage size. Output buffer functions when V.sub.DDL =V.sub.DDH, and its performance is V.sub.DDL independent. Temperature compensation is incorporated into the output buffer by deliberately offsetting temperature effects on output stage transistor drive strengths. Desired performance and temperature compensation are accomplished without subjecting any dielectrics to voltages which exceed the technology dielectric breakdown limit.
摘要翻译：输出缓冲器将数字输入信号转换为在地和VDDL之间切换的接地和VDDH之间的信号。技术介电击穿电压极限小于VDDH的大小，因此使用传统的输出级将使晶体管的电介质受到超过其介电击穿极限的电压，从而将被损坏。预驱动电路（40,50）控制输出级（70）晶体管（72,78）门，并且降压电路控制输出级（70）晶体管（74,76）。专门生成这些控制信号以使输出级晶体管驱动强度最大化，从而使输出级大小最小化。 VDDL = VDDH时的输出缓冲器功能，其性能与VDDL无关。温度补偿通过故意抵消输出级晶体管驱动强度的温度影响而被并入输出缓冲器。实现所需的性能和温度补偿，而不会对任何电介质施加超过技术介电击穿极限的电压。

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