专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明授权

US5994183A Method for forming charge storage structure 失效
标题翻译：电荷储存结构形成方法
公开(公告)号：US5994183A
公开(公告)日：1999-11-30
申请号：US996696
申请日：1997-12-23
申请人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
发明人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
IPC分类号： H01L21/02 , H01L21/285 , H01L21/768 , H01L21/8242 , H01L27/108
CPC分类号： H01L28/60 , H01L21/28518 , H01L27/10852
摘要： A method for forming a high capacitance charge storage structure that can be applied to a substrate wafer having MOS transistor already formed thereon. The method is to form an insulating layer above the substrate wafer. Next, a contact window exposing a source/drain region is formed in the insulating layer. Then, a tungsten suicide layer, which functions as a lower electrode for the charge storage structure, is formed over the substrate. Thereafter, a tungsten nitride layer is formed over the tungsten silicide layer, and then a dielectric layer is formed over the tungsten nitride layer. The dielectric layer is preferably a tantalum oxide layer. Finally, a titanium nitride layer, which functions as an upper electrode for the charge storage structure, is formed over the tantalum oxide layer.
摘要翻译：一种用于形成可以应用于已经形成有MOS晶体管的衬底晶片的高电容电荷存储结构的方法。该方法是在衬底晶片之上形成绝缘层。接下来，在绝缘层中形成暴露源极/漏极区域的接触窗口。然后，在基板上形成用作电荷存储结构的下电极的硅化钨层。此后，在硅化钨层之上形成氮化钨层，然后在氮化钨层上形成电介质层。电介质层优选为氧化钽层。最后，在钽氧化物层上形成用作电荷存储结构的上电极的氮化钛层。

72. 发明授权

US5990015A Dual damascence process 失效
标题翻译：双重大马士革过程
公开(公告)号：US5990015A
公开(公告)日：1999-11-23
申请号：US41567
申请日：1998-03-12
申请人： Tony Lin , Yimin Huang , Tri-Rung Yew
发明人： Tony Lin , Yimin Huang , Tri-Rung Yew
IPC分类号： H01L21/768 , H01L21/44
CPC分类号： H01L21/76813 , H01L21/76807
摘要： A dual damascene process can be used to form an interconnect. A first dielectric layer is formed on a semiconductor substrate having a device layer formed thereon. A stop layer is formed on the first dielectric layer and a second dielectric layer is formed on the stop layer. A hard mask layer is formed and patterned on the second dielectric layer so that an opening is formed to expose the second dielectric layer therewithin. The second dielectric layer, the stop layer and a part of the first dielectric layer are etched within the opening by photolithography and etching, so that a contact window is formed. Using the hard mask layer as a hard mask, an etching is performed so that a metal trench penetrating through the second dielectric layer is formed, and the device layer within the contact window is exposed.
摘要翻译：可以使用双镶嵌工艺来形成互连。在其上形成有器件层的半导体衬底上形成第一介电层。在第一电介质层上形成阻挡层，在停止层上形成第二电介质层。在第二电介质层上形成并图案化硬掩模层，从而形成开口以在其中露出第二介电层。通过光刻和蚀刻在开口内蚀刻第二介电层，停止层和第一介电层的一部分，从而形成接触窗。使用硬掩模层作为硬掩模，进行蚀刻，从而形成穿过第二介电层的金属沟槽，并且暴露接触窗内的器件层。

73. 发明授权

US08461037B2 Method for fabricating interconnections with carbon nanotubes 有权
标题翻译：制造与碳纳米管互连的方法
公开(公告)号：US08461037B2
公开(公告)日：2013-06-11
申请号：US13094388
申请日：2011-04-26
申请人： Hsin-wei Wu , Chung-Min Tsai , Tri-Rung Yew
发明人： Hsin-wei Wu , Chung-Min Tsai , Tri-Rung Yew
IPC分类号： H01L21/00
CPC分类号： H01L23/53276 , H01L21/76849 , H01L21/76876 , H01L21/76879 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating interconnections with carbon nanotubes of the present invention comprises the following steps: forming a dual-layer that contains a catalytic layer and an upper covering layer on the periphery of a hole connecting with a substrate; and growing carbon nanotubes on the catalytic layer with the upper covering layer covering the carbon nanotubes. The present invention grows the carbon nanotubes between the catalytic layer and the upper covering layer. The upper covering layer protects the catalytic layer from being oxidized and thus enhances the growth of the carbon nanotubes. The carbon nanotubes are respectively connected with the lower substrate and an upper conductive wire via the catalytic layer and the upper covering layer, which results in a lower contact resistance. Moreover, the upper covering layer also functions as a metal-diffusion barrier layer to prevent metal from spreading to other materials via diffusion or other approaches.
摘要翻译：本发明的制造与碳纳米管的互连的方法包括以下步骤：在与基板连接的孔的周围形成包含催化剂层和上覆盖层的双层; 并在上覆盖层覆盖碳纳米管的催化层上生长碳纳米管。本发明在催化层和上覆盖层之间生长碳纳米管。上覆盖层保护催化层不被氧化，从而增强碳纳米管的生长。碳纳米管分别通过催化层和上覆盖层与下基板和上导电线连接，导致较低的接触电阻。此外，上覆盖层还用作金属扩散阻挡层，以防止金属通过扩散或其它方法扩散到其它材料。

74. 发明申请

US20120148449A1 ELECTRIC CONDUCTIVITY-BASED BIOSENSOR 审中-公开
标题翻译：基于电导率的生物传感器
公开(公告)号：US20120148449A1
公开(公告)日：2012-06-14
申请号：US13114717
申请日：2011-05-24
申请人： Ya-Hsuan Chuang , Kuo-Liang Liu , Tri-Rung Yew
发明人： Ya-Hsuan Chuang , Kuo-Liang Liu , Tri-Rung Yew
IPC分类号： G01N27/00
CPC分类号： G01N27/125
摘要： An electric conductivity-based biosensor electrochemically detects the concentration of tested objects via measuring impedance or capacitance variation of the tested objects. The biosensor comprises a substrate, two electric-conduction electrodes arranged on the substrate, an antibody adhesion layer arranged on a region of the substrate and a plurality of antibodies arranged on the antibody adhesion layer. The antibody adhesion layer is between the two electric-conduction electrodes. The antibodies are connected with a plurality of tested objects. The tested objects connected with the antibodies form an electric-conduction group contacting the two electric-conduction electrodes. The concentration of the tested objects can be provided via measuring impedance or capacitance between the two electric-conduction electrodes.
摘要翻译：基于电导率的生物传感器通过测量被测物体的阻抗或电容变化来电化学地检测被测物体的浓度。生物传感器包括衬底，布置在衬底上的两个导电电极，布置在衬底的区域上的抗体粘附层和布置在抗体粘附层上的多个抗体。抗体粘附层位于两个导电电极之间。抗体与多个测试对象连接。与抗体连接的测试对象形成接触两个导电电极的导电组。可以通过测量两个导电电极之间的阻抗或电容来提供被测物体的浓度。

75. 发明申请

US20120118386A1 P-TYPE TRANSPARENT CONDUCTIVE OXIDES AND SOLAR CELLS WITH P-TYPE TRANSPARENT CONDUCTIVE OXIDES 有权
标题翻译： P型透明导电氧化物和具有P型透明导电氧化物的太阳能电池
公开(公告)号：US20120118386A1
公开(公告)日：2012-05-17
申请号：US13104744
申请日：2011-05-10
申请人： Han-Yi CHEN , Chia-Hsiang Chen , Huan-Chieh Su , Kuo-Liang Liu , Tri-Rung Yew
发明人： Han-Yi CHEN , Chia-Hsiang Chen , Huan-Chieh Su , Kuo-Liang Liu , Tri-Rung Yew
IPC分类号： H01L31/02 , H01B1/08 , B82Y99/00
CPC分类号： H01B1/08 , B82Y30/00 , C01G39/02 , C01P2002/54 , C01P2004/16 , C01P2004/17 , C01P2006/40 , H01G9/2031 , H01G9/2059 , H01L31/022466 , H01L31/035227 , H01L31/03529 , H01L31/072 , H01L31/1884 , H01L51/442 , Y02E10/50
摘要： A p-type transparent conductive oxide and a solar cell containing the p-type transparent conducting oxide, wherein the p-type transparent conductive oxide includes a molybdenum trioxide doped with an element having less than six valence electrons, the element is selected from the group consisting of alkali metals, alkaline earth metals, group III elements, group IV, group V, transition elements and their combinations. Doping an element having less than six valence electron results in hole number increase, and thus increasing the hole drift velocity, and making Fermi level closer to the range of p-type materials. Hence, a p-type transparent conductive material is generated. This p-type transparent conducting oxide not only has high electron hole drift velocity, low resistivity, but also reaches a transmittance of 88% in the visible wavelength range, and therefore it is very suitable to be used in solar cells.
摘要翻译： p型透明导电氧化物和含有p型透明导电氧化物的太阳能电池，其中p型透明导电氧化物包括掺杂有少于6价电子的元素的三氧化钼，该元素选自由碱金属，碱土金属，III族元素，IV族，V族，过渡元素及其组合组成。掺杂具有小于6价电子的元素导致孔数增加，从而增加空穴漂移速度，并使费米能级更接近p型材料的范围。因此，产生p型透明导电材料。该p型透明导电氧化物不仅具有高的电子空穴漂移速度，低电阻率，而且在可见光波长范围内也达到88％的透射率，因此非常适用于太阳能电池。

76. 发明申请

US20110193065A1 Organic thin film transistor 有权
标题翻译：有机薄膜晶体管
公开(公告)号：US20110193065A1
公开(公告)日：2011-08-11
申请号：US12807620
申请日：2010-09-09
申请人： Yu-Ping Wang , Heng-Wen Ting , Chung-Min Tsai , Tri-Rung Yew
发明人： Yu-Ping Wang , Heng-Wen Ting , Chung-Min Tsai , Tri-Rung Yew
IPC分类号： H01L51/30
CPC分类号： H01L51/0053 , H01L51/0545
摘要： An organic thin film transistor includes: a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an organic active layer. The organic active layer includes an organic semiconductor compound represented by the following formula (A) as defined in the specification.
摘要翻译：有机薄膜晶体管包括：栅极，栅极绝缘膜，源电极，漏电极和有机活性层。有机活性层包括由说明书中定义的下式（A）表示的有机半导体化合物。

77. 发明授权

US07807979B2 Specimen kit and fabricating method thereof 有权
标题翻译：试样套件及其制造方法
公开(公告)号：US07807979B2
公开(公告)日：2010-10-05
申请号：US11952148
申请日：2007-12-07
申请人： Kuo-Liang Liu , Tri-Rung Yew
发明人： Kuo-Liang Liu , Tri-Rung Yew
IPC分类号： G01F23/00
CPC分类号： H01J37/20 , H01J37/26 , H01J2237/2003
摘要： A specimen kit for enclosing a specimen is described, including a first substrate, a second substrate and a sealant. The first substrate has a first observation window at which a thickness thereof is smaller than that of the other parts thereof. The second substrate has a second observation window at which a thickness thereof is smaller than that of the other parts thereof, and is disposed on the first substrate such that the second observation window is aligned to the first observation window and an interval is present between the first and the second substrates. The sealant is disposed between the first and the second substrates and surrounds the first and the second observation windows to seal a space between fringes of the first and the second substrate, thus defining a specimen cell between the first and the second substrates.
摘要翻译：描述了用于封装样本的标本试剂盒，包括第一基底，第二基底和密封剂。第一基板具有第一观察窗，其第一观察窗的厚度小于其他部分的厚度。第二基板具有第二观察窗，其第二观察窗的厚度小于其他部分的厚度，并且设置在第一基板上，使得第二观察窗对准于第一观察窗，并且在第二观察窗之间存在间隔第一和第二基板。密封剂设置在第一和第二基板之间并且围绕第一和第二观察窗口以密封第一和第二基板的边缘之间的空间，从而在第一和第二基板之间限定了样本池。

78. 发明申请

US20080135778A1 SPECIMEN KIT AND FABRICATING METHOD THEREOF 有权
标题翻译：样本套件及其制作方法
公开(公告)号：US20080135778A1
公开(公告)日：2008-06-12
申请号：US11952148
申请日：2007-12-07
申请人： Kuo-Liang Liu , Tri-Rung Yew
发明人： Kuo-Liang Liu , Tri-Rung Yew
IPC分类号： H01J37/20 , B29C65/54
CPC分类号： H01J37/20 , H01J37/26 , H01J2237/2003
摘要： A specimen kit for enclosing a specimen is described, including a first substrate, a second substrate and a sealant. The first substrate has a first observation window at which a thickness thereof is smaller than that of the other parts thereof. The second substrate has a second observation window at which a thickness thereof is smaller than that of the other parts thereof, and is disposed on the first substrate such that the second observation window is aligned to the first observation window and an interval is present between the first and the second substrates. The sealant is disposed between the first and the second substrates and surrounds the first and the second observation windows to seal a space between fringes of the first and the second substrate, thus defining a specimen cell between the first and the second substrates.
摘要翻译：描述了用于封装样本的标本试剂盒，包括第一基底，第二基底和密封剂。第一基板具有第一观察窗，其第一观察窗的厚度小于其他部分的厚度。第二基板具有第二观察窗，其第二观察窗的厚度小于其他部分的厚度，并且设置在第一基板上，使得第二观察窗对准于第一观察窗，并且在第二观察窗之间存在间隔第一和第二基板。密封剂设置在第一和第二基板之间并且围绕第一和第二观察窗口以密封第一和第二基板的边缘之间的空间，从而在第一和第二基板之间限定了样本池。

79. 发明授权

US06987057B2 Method making bonding pad 有权
标题翻译：方法制作焊盘
公开(公告)号：US06987057B2
公开(公告)日：2006-01-17
申请号：US10229443
申请日：2002-08-27
申请人： Ellis Lee , Yimin Huang , Tri-Rung Yew
发明人： Ellis Lee , Yimin Huang , Tri-Rung Yew
IPC分类号： H01L21/44
CPC分类号： H01L24/05 , H01L24/03 , H01L24/11 , H01L24/45 , H01L2224/0401 , H01L2224/04042 , H01L2224/05073 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05624 , H01L2224/13099 , H01L2224/45144 , H01L2224/48624 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/04941 , H01L2924/04953 , H01L2924/0496 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： An bonding pad structure has a passivation layer over a copper layer having a pad window to expose a portion of the copper layer, a barrier layer conformal to a profile of the pad window, and an aluminum pad located in the pad window. The metal layer can be an aluminum, aluminum alloy or aluminum dominated layer for providing a better adhesion property between the copper layer and the bonding wire.
摘要翻译：焊盘结构在铜层上具有钝化层，该钝化层具有用于暴露铜层的一部分的焊盘窗口，与焊盘窗口的轮廓一致的阻挡层和位于焊盘窗口中的铝焊盘。金属层可以是铝，铝合金或铝主导层，用于在铜层和接合线之间提供更好的粘合性能。

80. 发明授权

US06894364B2 Capacitor in an interconnect system and method of manufacturing thereof 有权
标题翻译：互连系统中的电容器及其制造方法
公开(公告)号：US06894364B2
公开(公告)日：2005-05-17
申请号：US10248833
申请日：2003-02-24
申请人： Ming-Yin Hao , Tri-Rung Yew , Coming Chen , Tsong-Minn Hsieh , Nai-Chen Peng , Jih-Cheng Yeh
发明人： Ming-Yin Hao , Tri-Rung Yew , Coming Chen , Tsong-Minn Hsieh , Nai-Chen Peng , Jih-Cheng Yeh
IPC分类号： H01L21/02 , H01L21/768 , H01L23/522 , H01L29/00 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L28/60 , H01L21/76807 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A fabrication method for an integrated device having a capacitor in an interconnect system is described. At least a first exposed metal line and a second metal line are provided in an insulating layer. A stack layer is deposited and patterned to form a film stack structure over the second metal line. An inter-metal dielectric layer is formed over the film stack structure, the first metal line and the insulating layer. At least a first dual damascene interconnect and a second dual damascene interconnect are formed over and in contact with the first metal line and the film stack structure, respectively.
摘要翻译：描述了在互连系统中具有电容器的集成器件的制造方法。至少第一露出金属线和第二金属线设置在绝缘层中。堆叠层并图案化以在第二金属线上形成膜堆叠结构。在膜堆叠结构，第一金属线和绝缘层之上形成金属间介电层。至少第一双镶嵌互连和第二双镶嵌互连分别形成在第一金属线和薄膜堆叠结构的上方并与之接触。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式