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71. 发明申请

US20090272590A1 HYDROGEN STORAGE SYSTEM FOR VEHICLE 审中-公开
标题翻译：车辆储氢系统
公开(公告)号：US20090272590A1
公开(公告)日：2009-11-05
申请号：US12268117
申请日：2008-11-10
申请人： Hyung Ki Kim , Sang Hyun Kim , Hoon Hee Lee , Hee Yeon Ryu
发明人： Hyung Ki Kim , Sang Hyun Kim , Hoon Hee Lee , Hee Yeon Ryu
IPC分类号： B60K15/063
CPC分类号： B60K15/03006 , Y02E60/324
摘要： The present invention provides a hydrogen storage system for a vehicle which is readily attachable to and detachable from the vehicle. The hydrogen storage system includes a plurality of hydrogen tanks filled with hydrogen at the outside and is mounted on the top of a rear underfloor of the vehicle in the form of a cartridge.For this purpose, the present invention provides a hydrogen storage system for a vehicle, including a hydrogen storage housing, accommodating a hydrogen storage material filled with hydrogen at the outside and easily attached to and detached from the vehicle using a quick connector.
摘要翻译：本发明提供一种车辆的氢气储存系统，其易于附接到车辆上并可从车辆拆卸。氢存储系统包括在外部填充有氢的多个氢气罐，并且以盒的形式安装在车辆的后地板的顶部上。为此，本发明提供了一种用于车辆的氢存储系统，其包括储氢壳体，其容纳使用快速连接器容易地附接到车辆并从车辆拆卸的在外部填充氢的储氢材料。

72. 发明申请

US20080136987A1 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US20080136987A1
公开(公告)日：2008-06-12
申请号：US12007691
申请日：2008-01-14
申请人： Sang Hyun Kim
发明人： Sang Hyun Kim
IPC分类号： G02F1/1368
CPC分类号： G02F1/136227
摘要： A method of fabricating a liquid crystal display device includes forming a data bus line on a substrate, forming a preliminary interlayer insulating layer having a first thickness on the substrate including the data bus line, forming an interlayer insulating layer by etching the preliminary interlayer insulating layer to a second thickness less than the first thickness, the interlayer insulating layer having a planarized surface, sequentially forming a semiconductor layer, a gate insulating layer, and a gate electrode on the interlayer insulating layer, forming a passivation layer on the substrate, forming a plurality of contact holes exposing portions of the data bus line and the semiconductor layer by etching portions of the passivation layer, and forming a pixel electrode on the passivation layer.
摘要翻译：一种液晶显示装置的制造方法，其特征在于，在基板上形成数据总线，在包括所述数据总线的基板上形成具有第一厚度的预备层间绝缘层，通过蚀刻所述初始层间绝缘层所述层间绝缘层具有平坦化表面，在所述层间绝缘层上依次形成半导体层，栅极绝缘层和栅电极，在所述基板上形成钝化层，形成所述第一厚度，多个接触孔通过蚀刻钝化层的部分而暴露数据总线和半导体层的部分，以及在钝化层上形成像素电极。

73. 发明授权

US07342631B2 Liquid crystal display device and method of fabricating the same 有权
标题翻译：液晶显示装置及其制造方法
公开(公告)号：US07342631B2
公开(公告)日：2008-03-11
申请号：US10863235
申请日：2004-06-09
申请人： Sang Hyun Kim
发明人： Sang Hyun Kim
IPC分类号： G02F1/1343
CPC分类号： G02F1/136227
摘要： A method of fabricating a liquid crystal display device includes forming a data bus line on a substrate, forming a preliminary interlayer insulating layer having a first thickness on the substrate including the data bus line, forming an interlayer insulating layer by etching the preliminary interlayer insulating layer to a second thickness less than the first thickness, the interlayer insulating layer having a planarized surface, sequentially forming a semiconductor layer, a gate insulating layer, and a gate electrode on the interlayer insulating layer, forming a passivation layer on the substrate, forming a plurality of contact holes exposing portions of the data bus line and the semiconductor layer by etching portions of the passivation layer, and forming a pixel electrode on the passivation layer.
摘要翻译：一种液晶显示装置的制造方法，其特征在于，在基板上形成数据总线，在包括所述数据总线的基板上形成具有第一厚度的预备层间绝缘层，通过蚀刻所述初始层间绝缘层所述层间绝缘层具有平坦化表面，在所述层间绝缘层上依次形成半导体层，栅极绝缘层和栅电极，在所述基板上形成钝化层，形成所述第一厚度，多个接触孔通过蚀刻钝化层的部分而暴露数据总线和半导体层的部分，以及在钝化层上形成像素电极。

74. 发明授权

US07259103B2 Fabrication method of polycrystalline silicon TFT 有权
标题翻译：多晶硅TFT的制造方法
公开(公告)号：US07259103B2
公开(公告)日：2007-08-21
申请号：US10663805
申请日：2003-09-17
申请人： Sang Hyun Kim
发明人： Sang Hyun Kim
IPC分类号： H01L21/302
CPC分类号： H01L21/02686 , H01L21/02532 , H01L21/02595 , H01L21/2022 , H01L21/2026 , H01L21/268 , H01L29/66757
摘要： A method of fabricating polycrystalline silicon thin film transistor according to the present invention includes: depositing a buffer layer on a substrate; depositing an amorphous silicon layer on the buffer layer with a predetermined thickness; crystallizing the deposited amorphous silicon layer by using a laser to form a polycrystalline silicon layer; etching the crystallized polycrystalline silicon layer to a predetermined thickness; curing the etched polycrystalline silicon layer; and patterning the cured polycrystalline silicon layer to form a semiconductor layer.
摘要翻译：根据本发明的制造多晶硅薄膜晶体管的方法包括：在衬底上沉积缓冲层; 以预定厚度在缓冲层上沉积非晶硅层; 通过使用激光使沉积的非晶硅层结晶以形成多晶硅层; 将结晶的多晶硅层蚀刻至预定厚度; 固化蚀刻的多晶硅层; 以及图案化固化的多晶硅层以形成半导体层。

75. 发明授权

US06326252B1 Method for fabricating MOS transistor having dual gate 失效
标题翻译：制造具有双栅极的MOS晶体管的方法
公开(公告)号：US06326252B1
公开(公告)日：2001-12-04
申请号：US09481321
申请日：2000-01-11
申请人： Sang Hyun Kim , Nam Hoon Cho , Jae Sung Roh , Jeong Mo Hwang
发明人： Sang Hyun Kim , Nam Hoon Cho , Jae Sung Roh , Jeong Mo Hwang
IPC分类号： H01L218238
CPC分类号： H01L21/76218 , H01L21/823842
摘要： Methods of forming a MOS transistor having dual gates minimizes impurity channeling and diffusion that can occur during impurity injection and activating processes. A method of fabricating the transistor includes the steps of forming a first conduction type well and a second conduction type well in a semiconductor substrate having an isolation region and an active region formed therein. Then, a gate oxide film is formed on an entire surface of the substrate, and a polysilicon layer is deposited on the gate oxide film preferably at a temperature of about 660° C. to about 700° C. and a pressure of about 10 to about 300 Torr. Next, portions of the polysilicon layer and the gate oxide film are selectively removed to form a gate electrode on each of the wells. Impurity ions are injected, having a conduction type opposite a conduction type of the corresponding well, into an exposed surface of each of the wells, to form lightly doped impurity regions. Insulating film sidewalls are formed at sides of each of the gates. Then, first conduction type impurity ions are heavily injected into a surface of the exposed first conduction type well and into the gate electrode formed on the first conduction type well. Also, second conduction type impurity ions are heavily injected into a surface of the exposed second conduction type well and into the gate electrode formed on the second conduction type well. Next, a first heat treatment is conducted in an oxygen ambient and a second heat treatment is conducted in a nitrogen ambient, to diffuse the impurities.
摘要翻译：形成具有双栅极的MOS晶体管的方法使杂质注入和激活过程中可能发生的杂质沟道和扩散最小化。制造晶体管的方法包括以下步骤：在其中形成有隔离区域和有源区域的半导体衬底中形成第一导电类型阱和第二导电类型阱。然后，在基板的整个表面上形成栅极氧化膜，优选在约660℃〜约700℃的温度和约10〜10℃的压力下，在栅极氧化膜上沉积多晶硅层约300乇。接下来，选择性地去除多晶硅层和栅极氧化物膜的部分以在每个阱上形成栅电极。将具有与相应的阱的导电类型相反的导电类型的杂质离子注入每个阱的暴露表面，以形成轻掺杂杂质区。绝缘膜侧壁形成在每个栅极的侧面。然后，第一导电型杂质离子被重度地注入到暴露的第一导电类型阱的表面中并进入形成在第一导电类型阱上的栅电极中。此外，第二导电型杂质离子被严重地注入到暴露的第二导电类型阱的表面中并进入形成在第二导电类型阱上的栅电极中。接下来，在氧环境中进行第一热处理，并且在氮气环境中进行第二热处理以扩散杂质。

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