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    • 71. 发明申请
    • Flip-Flop Circuit Design
    • 触发器电路设计
    • US20120098582A1
    • 2012-04-26
    • US12908602
    • 2010-10-20
    • Chi-Lin LiuChung-Cheng ChouYi-Tzu Chen
    • Chi-Lin LiuChung-Cheng ChouYi-Tzu Chen
    • H03K3/356H03K3/01
    • H03K3/356121
    • A flip-flop circuit includes a precharge circuit that outputs a charge signal high when a received clock signal is LOW. A delay clock input circuit generates a delayed clock input controlled signal with the same value as an input signal when the clock signal is HIGH. A charge keeper circuit, upon receiving the charge signal and the delayed clock input controlled signal, generates a charge keeping signal, which equals the charged signal when the clock signal is LOW and equals the delayed clock input controlled signal when the clock signal is HIGH. A separator circuit can receive the charge keeping signal and clock signal and generate an inverted charge keeping signal. A storage circuit is configured to receive the inverted charge keeping signal, a present state signal, and inverted present state signal, and to generate a present state signal and an inverted present state signal.
    • 触发器电路包括预充电电路,当接收到的时钟信号为低电平时,该充电电路输出高电平信号。 当时钟信号为高电平时,延迟时钟输入电路产生与输入信号相同值的延迟时钟输入受控信号。 充电保持器电路在接收到充电信号和延迟的时钟输入受控信号时产生一个充电保持信号,当时钟信号为低电平时,该充电信号等于充电信号,并且当时钟信号为高电平时等于延迟的时钟输入受控信号。 分离器电路可以接收电荷保持信号和时钟信号并产生反向电荷保持信号。 存储电路被配置为接收反转的保持电荷信号,当前状态信号和反相的当前状态信号,并且生成当前状态信号和反相的当前状态信号。
    • 73. 发明申请
    • MICROINJECTORS
    • 微量元素
    • US20070120894A1
    • 2007-05-31
    • US11563652
    • 2006-11-27
    • Chung-Cheng ChouShang-Shi Wu
    • Chung-Cheng ChouShang-Shi Wu
    • B41J2/05
    • B41J2/14088B41J2/14056B41J2002/1437
    • Microinjectors are provided. A microinjector includes a substrate, a manifold formed on the substrate, and at least a jet unit. The jet unit includes a nozzle layer connected to the substrate, a nozzle disposed on the nozzle layer, a reservoir, a first heater disposed on a first side of the nozzle and a second heater disposed on a second side of the nozzle. The reservoir is formed between the nozzle layer and the substrate, connecting the nozzle and the manifold. Specifically, the first and second heaters are actuated by individual drive circuits, to heat the reservoir and eject a droplet through the nozzle.
    • 提供微量注射器。 微型注射器包括基底,形成在基底上的歧管和至少一个喷射单元。 喷射单元包括连接到基板的喷嘴层,设置在喷嘴层上的喷嘴,储存器,设置在喷嘴的第一侧上的第一加热器和设置在喷嘴的第二侧上的第二加热器。 储存器形成在喷嘴层和基板之间,连接喷嘴和歧管。 具体地,第一和第二加热器由单独的驱动电路致动,以加热储存器并通过喷嘴喷射液滴。
    • 76. 发明授权
    • Circuit and method for self-refresh of DRAM cells through monitoring of cell leakage currents
    • 通过监测电池漏电流来自动刷新DRAM单元的电路和方法
    • US06862239B1
    • 2005-03-01
    • US10696291
    • 2003-10-29
    • Chien-Hua HuangChung-Cheng Chou
    • Chien-Hua HuangChung-Cheng Chou
    • G11C11/406G11C7/00
    • G11C11/40615G11C11/406G11C2211/4068
    • A circuit and a method for self refresh of DRAM cells are provided. The circuit comprises a bias generator and an oscillator. The bias generator comprises a first current generator, a second current generator and a converter. The first current generator generates a first leakage current of “0” state cells. The second current generator generates a second leakage current of “1” state cells. The converter transforms a current comprising the first leakage current and the second leakage current into output biases. The method comprises generating leakage currents from memory cells; transforming the leakage currents into output biases for determining a self refresh period; and using the output biases to control an oscillator for generating a periodical signal pulse in response to the leakage currents.
    • 提供了一种用于DRAM单元的自刷新的电路和方法。 电路包括偏置发生器和振荡器。 偏置发生器包括第一电流发生器,第二电流发生器和转换器。 第一电流发生器产生“0”状态单元的第一泄漏电流。 第二电流发生器产生“1”状态单元的第二泄漏电流。 转换器将包括第一漏电流和第二漏电流的电流转换成输出偏压。 该方法包括从存储器单元产生泄漏电流; 将泄漏电流转换成输出偏压,以确定自刷新周期; 以及使用所述输出偏压来控制用于响应于所述漏电流产生周期性信号脉冲的振荡器。
    • 79. 发明授权
    • Circuit and method for small swing memory signals
    • 小摆动记忆信号的电路和方法
    • US08116149B2
    • 2012-02-14
    • US12687571
    • 2010-01-14
    • Yi-Tzu ChenChia-Wei SuMing-Zhang KuoChung-Cheng Chou
    • Yi-Tzu ChenChia-Wei SuMing-Zhang KuoChung-Cheng Chou
    • G11C7/06
    • G11C8/12G11C11/413
    • Circuits and methods for transmitting and receiving small swing differential voltage data to and from a memory are described. A plurality of memory cells is formed in arrays within a plurality of memory banks. Each memory bank is coupled to a pair of small swing differential voltage global bit lines that extend across the memory. A small signal write driver circuit is coupled to the global bit lines and configured to output a small signal differential voltage on the global bit lines during write cycles. A global sense amplifier is coupled to the global bit line pairs and configured to output a full swing voltage on a data line during a read cycle. Methods for providing small swing global bit line signals to memory cells are disclosed. The use of small swing differential voltage signals across the memory reduces power consumption and shortens memory cycle time.
    • 描述用于向存储器发送和接收小的摆动差分电压数据的电路和方法。 多个存储单元形成为多个存储体中的阵列。 每个存储体耦合到跨越存储器延伸的一对小的摆动差分电压全局位线。 小信号写驱动器电路耦合到全局位线并且被配置为在写周期期间在全局位线上输出小信号差分电压。 全局读出放大器耦合到全局位线对并被配置为在读取周期期间在数据线上输出全摆幅电压。 公开了向存储器单元提供小的摆动全局位线信号的方法。 在存储器内使用小的摆幅差分电压信号可以降低功耗并缩短存储周期时间。