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71. 发明授权

US08357554B2 Display substrate and method of manufacturing the same 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US08357554B2
公开(公告)日：2013-01-22
申请号：US13156986
申请日：2011-06-09
申请人： Wang-Woo Lee , Hong-Sick Park
发明人： Wang-Woo Lee , Hong-Sick Park
IPC分类号： H01L21/00
CPC分类号： H01L33/0041 , H01L27/1218 , H01L27/1225 , H01L27/124 , H01L27/1292
摘要： A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced.
摘要翻译：提供具有低电阻信号线的显示基板和制造显示基板的方法。显示基板包括绝缘基板，栅极线，数据线和像素电极。栅极线栅极线通过子沟槽和开口部分形成。子沟槽形成在绝缘衬底中，并且开口部分通过绝缘衬底上的与子沟槽位置对应的位置处的平坦化层形成。数据线穿过栅极线。像素电极通过开关元件电连接到栅极线和数据线。因此，通过使用平坦化层和绝缘基板形成的沟槽形成信号线，使得信号线的电阻可能降低。

72. 发明申请

US20120132917A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US20120132917A1
公开(公告)日：2012-05-31
申请号：US13156986
申请日：2011-06-09
申请人： Wang-Woo LEE , Hong-Sick Park
发明人： Wang-Woo LEE , Hong-Sick Park
IPC分类号： H01L29/786 , H01L33/08
CPC分类号： H01L33/0041 , H01L27/1218 , H01L27/1225 , H01L27/124 , H01L27/1292
摘要： A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced.
摘要翻译：提供具有低电阻信号线的显示基板和制造显示基板的方法。显示基板包括绝缘基板，栅极线，数据线和像素电极。栅极线栅极线通过子沟槽和开口部分形成。子沟槽形成在绝缘衬底中，并且开口部分通过绝缘衬底上的与子沟槽位置对应的位置处的平坦化层形成。数据线穿过栅极线。像素电极通过开关元件电连接到栅极线和数据线。因此，通过使用平坦化层和绝缘基板形成的沟槽形成信号线，使得信号线的电阻可能降低。

73. 发明授权

US08084184B2 Composition for removing photoresist and method of manufacturing an array substrate using the same 有权
标题翻译：用于除去光致抗蚀剂的组合物及其制造方法
公开(公告)号：US08084184B2
公开(公告)日：2011-12-27
申请号：US12323649
申请日：2008-11-26
申请人： Jong-Hyun Choung , Hong-Sick Park , Sun-Young Hong , Bong-Kyun Kim , Byeoung-Jin Lee , Byung-Uk Kim , Jong-Hyun Jeong , Suk-Il Yoon , Sung-Gun Shin , Soon-Beom Huh , Se-Hwan Jung , Doo-Young Jang
发明人： Jong-Hyun Choung , Hong-Sick Park , Sun-Young Hong , Bong-Kyun Kim , Byeoung-Jin Lee , Byung-Uk Kim , Jong-Hyun Jeong , Suk-Il Yoon , Sung-Gun Shin , Soon-Beom Huh , Se-Hwan Jung , Doo-Young Jang
IPC分类号： G03F7/00 , G03F7/26 , G03F7/32 , G03F7/40
CPC分类号： G03F7/425
摘要： A composition for removing a photoresist includes a) an amine compound having a cyclic amine and/or a diamine, b) a glycol ether compound, c) a corrosion inhibitor and d) a polar solvent. The composition further includes a stripping promoter. Further disclosed is a method of manufacturing an array substrate using the composition for removing a photoresist.
摘要翻译：用于除去光致抗蚀剂的组合物包括a）具有环胺和/或二胺的胺化合物，b）二醇醚化合物，c）缓蚀剂和d）极性溶剂。组合物还包括剥离促进剂。进一步公开了使用除去光致抗蚀剂的组合物制造阵列基板的方法。

74. 发明授权

US07811868B2 Method for manufacturing a signal line, thin film transistor panel, and method for manufacturing the thin film transistor panel 有权
标题翻译：信号线的制造方法，薄膜晶体管面板，以及薄膜晶体管面板的制造方法
公开(公告)号：US07811868B2
公开(公告)日：2010-10-12
申请号：US11932233
申请日：2007-10-31
申请人： Do-Hyun Kim , Won-Suk Shin , Chang-Oh Jeong , Hong-Sick Park , Eun-Guk Lee , Je-Hun Lee
发明人： Do-Hyun Kim , Won-Suk Shin , Chang-Oh Jeong , Hong-Sick Park , Eun-Guk Lee , Je-Hun Lee
IPC分类号： H01L21/768
CPC分类号： H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： A method for manufacturing a thin film transistor array panel includes forming a gate line on a substrate; sequentially forming a gate insulating layer, a silicon layer, and a conductor layer including a lower layer and an upper layer on the gate line, forming a photoresist film, on the conductor layer, patterning the photoresist film to form a photoresist pattern including a first portion and a second portion having a greater thickness than the first portion, etching the upper layer and the lower layer by using the photoresist pattern as art etch mask, etching the silicon layer by using the photoresist pattern as an etch mask to form a semiconductor, removing the second portion of the photoresist pattern by using an etch back process, selectively wet-etching the upper layer of the conductor layer by using the photoresist pattern as an etch mask, dry-etching the lower layer of the conductor layer by using the photoresist pattern as an etch mask to form a data line and a drain electrode including remaining upper and lower layers, and forming a pixel electrode connected to the drain electrode.
摘要翻译：一种制造薄膜晶体管阵列面板的方法，包括在基板上形成栅极线; 在栅极线上顺序地形成栅极绝缘层，硅层和包括下层和上层的导体层，在导体层上形成光致抗蚀剂膜，图案化光致抗蚀剂膜以形成包括第一部分和第二部分具有比第一部分更大的厚度，通过使用光致抗蚀剂图案作为蚀刻掩模蚀刻上层和下层，通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻硅层以形成半导体，通过使用回蚀工艺去除光致抗蚀剂图案的第二部分，通过使用光致抗蚀剂图案作为蚀刻掩模来选择性地湿法蚀刻导体层的上层，通过使用光致抗蚀剂干蚀刻导体层的下层图案作为蚀刻掩模以形成包括剩余的上层和下层的数据线和漏极，并且形成连接到漏电极的像素电极。

75. 发明授权

US07662676B2 Signal line for display device and thin film transistor array panel including the signal line 有权
标题翻译：信号线用于显示器件和薄膜晶体管阵列面板，包括信号线
公开(公告)号：US07662676B2
公开(公告)日：2010-02-16
申请号：US12269603
申请日：2008-11-12
申请人： Hong-Sick Park , Shi-Yul Kim
发明人： Hong-Sick Park , Shi-Yul Kim
IPC分类号： H01L21/00
CPC分类号： H01L29/4908 , H01L27/12 , H01L27/124 , H01L29/458
摘要： A thin film transistor (TFT) array panel with signal lines that have low resistivity is presented. The TFT array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode facing the source electrode with a gap, and a pixel electrode connected to the drain electrode. In one embodiment, at least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a Mo-containing conductor, a second conductive layer made of a Cu-containing conductor, and a third conductive layer made of a MoN-containing conductor.
摘要翻译：提出了具有低电阻率的信号线的薄膜晶体管（TFT）阵列面板。 TFT阵列面板包括绝缘基板，形成在绝缘基板上的栅极线，形成在栅极线上的栅极绝缘层，漏极电极和形成在栅极绝缘层上的源电极的数据线，具有间隙的源电极和连接到漏电极的像素电极。在一个实施例中，栅极线，数据线和漏电极中的至少一个包括由含Mo导体制成的第一导电层，由含Cu导体制成的第二导电层和第三导电层由含MoN的导体制成。

76. 发明授权

US07405425B2 Thin film transistor, method of manufacturing the same, display apparatus having the same and method of manufacturing the display apparatus 有权
标题翻译：薄膜晶体管，其制造方法，具有该薄膜晶体管的显示装置和制造该显示装置的方法
公开(公告)号：US07405425B2
公开(公告)日：2008-07-29
申请号：US11232306
申请日：2005-09-20
申请人： Sang-Gab Kim , Shi-Yul Kim , Hong-Sick Park , Hee-Hwan Choe , Hong-Kee Chin , Min-Seok Oh
发明人： Sang-Gab Kim , Shi-Yul Kim , Hong-Sick Park , Hee-Hwan Choe , Hong-Kee Chin , Min-Seok Oh
IPC分类号： H01L29/04
CPC分类号： H01L29/66765 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L29/458
摘要： A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the substrate, a channel pattern, a source electrode and a drain electrode. The channel pattern includes a semiconductor pattern formed on the gate electrode and overlaying the gate electrode as well as first and second conductive adhesive patterns formed on the semiconductor pattern and spaced apart from each other. The source electrode includes a first barrier pattern, a source pattern and a first capping pattern sequentially formed on the first conductive adhesive pattern. The drain electrode includes a second barrier pattern, a drain pattern and a second capping pattern sequentially formed on the second conductive adhesive pattern. Etched portions of the first and second conductive adhesive patterns have a substantially vertical profile to prevent the exposure of the source and drain electrodes, thereby improving the characteristics of the thin film transistor.
摘要翻译：薄膜晶体管包括衬底上的栅电极，衬底上的栅极绝缘层，沟道图案，源电极和漏电极。沟道图案包括形成在栅电极上并覆盖栅电极的半导体图案以及形成在半导体图案上并彼此间隔开的第一和第二导电粘合剂图案。源电极包括顺序地形成在第一导电粘合剂图案上的第一阻挡图案，源图案和第一封盖图案。漏电极包括顺序地形成在第二导电粘合剂图案上的第二阻挡图案，漏极图案和第二封盖图案。第一和第二导电粘合剂图案的蚀刻部分具有基本垂直的轮廓，以防止源极和漏极的暴露，从而改善薄膜晶体管的特性。

77. 发明申请

US20080085850A1 COMPOSITION FOR STRIPPING PHOTORESIST AND METHOD FOR MANUFACTURING THIN TRANSISTOR ARRAY PANEL USING THE SAME 有权
公开(公告)号：US20080085850A1
公开(公告)日：2008-04-10
申请号：US11865795
申请日：2007-10-02
申请人： Hong-Sick Park , Jong-Hyun Jeong , Suk-Il Yoon , Seong-Bae Kim , Wy-Yong Kim , Soon-Beom Huh , Byung-Uk Kim
发明人： Hong-Sick Park , Jong-Hyun Jeong , Suk-Il Yoon , Seong-Bae Kim , Wy-Yong Kim , Soon-Beom Huh , Byung-Uk Kim
IPC分类号： G03F7/42
CPC分类号： G03F7/425 , H01L21/31133 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： The present invention provides a photoresist stripper including about 5 wt % to about 20 wt % alcohol amine, about 40 wt % to about 70 wt % glycol ether, about 20 wt % to about 40 wt % N-methyl pyrrolidone, and about 0.2 wt % to about 6 wt % chelating agent.

78. 发明授权

US07294518B2 Composition for stripping photoresist and method for manufacturing thin film transistor array panel using the same 有权
标题翻译：用于剥离光刻胶的组合物和使用其制造薄膜晶体管阵列面板的方法
公开(公告)号：US07294518B2
公开(公告)日：2007-11-13
申请号：US11217400
申请日：2005-09-02
申请人： Hong-Sick Park , Jong-Hyun Jeong , Suk-Il Yoon , Seong-Bae Kim , Wy-Yong Kim , Soon-Beom Huh , Byung-Uk Kim
发明人： Hong-Sick Park , Jong-Hyun Jeong , Suk-Il Yoon , Seong-Bae Kim , Wy-Yong Kim , Soon-Beom Huh , Byung-Uk Kim
IPC分类号： H01L21/00
CPC分类号： G03F7/425 , H01L21/31133 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： The present invention provides a photoresist stripper including about 5 wt % to about 20 wt % alcohol amine, about 40 wt % to about 70 wt % glycol ether, about 20 wt % to about 40 wt % N-methyl pyrrolidone, and about 0.2 wt % to about 6 wt % chelating agent.
摘要翻译：本发明提供了一种光致抗蚀剂剥离器，其包括约5重量％至约20重量％的醇胺，约40重量％至约70重量％的二醇醚，约20重量％至约40重量％的N-甲基吡咯烷酮，以及约0.2重量％％至约6重量％的螯合剂。

79. 发明申请

US20060011912A1 Method of forming a metal pattern and a method of fabricating tft array panel by using the same 审中-公开
标题翻译：形成金属图案的方法和使用该方法制造tft阵列面板的方法
公开(公告)号：US20060011912A1
公开(公告)日：2006-01-19
申请号：US10516602
申请日：2002-07-24
申请人： Hong-Sick Park , Sung-Chul Kang , Hong-Je Cho , An-Na Park , Pong-ok Park , Chang-Oh Jeong
发明人： Hong-Sick Park , Sung-Chul Kang , Hong-Je Cho , An-Na Park , Pong-ok Park , Chang-Oh Jeong
IPC分类号： H01L29/04
CPC分类号： H01L21/28008 , G03F7/0047 , H01L21/288 , H01L21/32051 , H01L27/12 , H01L27/124 , H01L29/66765 , H01L29/78669 , H01L51/0003 , H01L51/0015 , H01L51/0021 , H01L51/0545
摘要： With a metal pattern formation process and a method of manufacturing a thin film transistor array panel using the metal pattern formation process, an organometallic layer is formed by coating an organometallic complex containing metal. The organometallic layer is exposed to light through a photo mask, and developed to form a metal pattern.
摘要翻译：利用金属图案形成工艺和使用金属图案形成工艺制造薄膜晶体管阵列板的方法，通过涂覆含有金属的有机金属络合物形成有机金属层。有机金属层通过光掩模曝光，并显影形成金属图案。

80. 发明授权

US08637399B2 Etching composition, method of forming a metal pattern and method of manufacturing a display substrate 有权
标题翻译：蚀刻组合物，形成金属图案的方法和制造显示基板的方法
公开(公告)号：US08637399B2
公开(公告)日：2014-01-28
申请号：US13600392
申请日：2012-08-31
申请人： Hong-Sick Park , Bong-Kyun Kim , Wang-Woo Lee , Ki-Beom Lee , Sam-Young Cho , Won-Guk Seo , Gyu-Po Kim
发明人： Hong-Sick Park , Bong-Kyun Kim , Wang-Woo Lee , Ki-Beom Lee , Sam-Young Cho , Won-Guk Seo , Gyu-Po Kim
IPC分类号： H01L21/311
CPC分类号： C09K13/06 , C23F1/18 , C23F1/34 , H01L21/32134
摘要： An etching composition for a copper-containing layer includes about 0.1% to about 30% by weight of ammonium persulfate, about 0.1% to about 10% by weight of a sulfate, about 0.01% to about 5% by weight of an acetate and about 55% to about 99.79% by weight of water. The etching composition having improved stability during storage and an increased capacity for etching.
摘要翻译：含铜层的蚀刻组合物包含约0.1％至约30％重量的过硫酸铵，约0.1％至约10％重量的硫酸盐，约0.01％至约5％重量的乙酸盐和约 55％至约99.79％的水。蚀刻组合物在储存期间具有改进的稳定性和增加的蚀刻能力。

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