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71. 发明授权

US06991129B2 Power control circuit for use in a vending machine 有权
公开(公告)号：US06991129B2
公开(公告)日：2006-01-31
申请号：US10436130
申请日：2003-05-13
申请人： Tien-Yuan Chien , Jyh-Chyang Hsieh , Yeuh-Ping Hsu
发明人： Tien-Yuan Chien , Jyh-Chyang Hsieh , Yeuh-Ping Hsu
IPC分类号： G07F11/00
CPC分类号： G07F9/00 , G07F7/04
摘要： A power control circuit used in a vending machine having a bill accepter and vending main units controlled by the bill accepter is disclosed to include a pulse signal generator installed in the bill inlet of the bill accepter and adapted to generate a triggering signal upon insertion of a bill into the bill inlet of the bill accepter, a driver, and a trigger, which controls the driver to drive the bill accepter between the power-saving stand-by mode and the work mode subject to the presence of the pulse signal from the pulse signal generator.

72. 发明申请

US20060011448A1 Power control circuit for use in a vending machine 有权
标题翻译：用于自动售货机的电源控制电路
公开(公告)号：US20060011448A1
公开(公告)日：2006-01-19
申请号：US11202939
申请日：2005-08-12
申请人： Tien-Yuan Chien , Jyh-Chyang Hsieh , Yeuh-Ping Hsu
发明人： Tien-Yuan Chien , Jyh-Chyang Hsieh , Yeuh-Ping Hsu
IPC分类号： G06K7/00 , G06K9/00
CPC分类号： G07F7/04 , G07F9/00
摘要： A power control circuit used in a vending machine having a bill accepter and vending main units controlled by the bill accepter is disclosed to include a pulse signal generator installed in the bill inlet of the bill accepter and adapted to generate a triggering signal upon insertion of a bill into the bill inlet of the bill accepter, a driver, and a trigger, which controls the driver to drive the bill accepter between the power-saving stand-by mode and the work mode subject to the presence of the pulse signal from the pulse signal generator.
摘要翻译：公开了一种用于自动售货机的功率控制电路，其具有由纸币接收器控制的纸币接收器和自动售货机主单元，其包括安装在纸币接收器的纸币入口中的脉冲信号发生器，并适于在插入纸币接收器时产生触发信号帐单卡入票据接收者的票据入口，司机和触发器，其控制驾驶员在节电待机模式和工作模式之间驱动票据接收器，该脉冲存在来自脉冲的脉冲信号信号发生器。

73. 发明申请

US20050277247A1 METHOD FOR FABRICATING A TRENCH CAPACITOR OF DRAM 有权
标题翻译：用于制造DRAM的TRENCH电容器的方法
公开(公告)号：US20050277247A1
公开(公告)日：2005-12-15
申请号：US10707027
申请日：2003-11-16
申请人： Kuo-Chien Wu , Ping Hsu
发明人： Kuo-Chien Wu , Ping Hsu
IPC分类号： H01L21/20 , H01L21/334 , H01L21/8242
CPC分类号： H01L27/1087 , H01L29/66181
摘要： This invention discloses a method for fabricating a deep trench capacitor. A substrate is provided. A pad oxide layer and a pad nitride layer are stacked on a main surface of the substrate. A deep trench is etched into the substrate through the pad oxide layer and the pad nitride layer. A doped area is formed at the lower portion of the deep trench serving as the first electrode of the trench capacitor. A node dielectric is coated on the interior surface of the deep trench. A first polysilicon layer is deposited in the deep trench and is then recessed to a first depth. A silicon spacer layer is formed on sidewall of the deep trench over the node dielectric. An upper portion of the silicon spacer layer is doped with dopants such as BF2. The un-doped portion of the silicon spacer layer is selectively removed to expose a portion of the node dielectric. The exposed node dielectric is stripped off to expose the substrate. The remaining node dielectric covered by the doped silicon spacer layer form a protection spacer for protecting the pad oxide layer from corrosion during the subsequent etching processes.
摘要翻译：本发明公开了一种制造深沟槽电容器的方法。提供基板。衬底氧化物层和衬垫氮化物层堆叠在衬底的主表面上。通过衬垫氧化物层和衬垫氮化物层将深沟槽蚀刻到衬底中。在作为沟槽电容器的第一电极的深沟槽的下部形成掺杂区域。节点电介质涂覆在深沟槽的内表面上。第一多晶硅层沉积在深沟槽中，然后凹入第一深度。硅间隔层形成在节点电介质上的深沟槽的侧壁上。硅间隔层的上部掺杂有诸如BF 2 N的掺杂剂。选择性地去除硅间隔层的未掺杂部分以暴露节点电介质的一部分。将暴露的节点电介质剥离以露出衬底。由掺杂硅间隔层覆盖的剩余节点电介质形成保护间隔物，用于在随后的蚀刻工艺期间保护衬垫氧化物层不受腐蚀。

74. 发明申请

US20050186753A1 FIB exposure of alignment marks in MIM technology 审中-公开
标题翻译： MIM技术中FIB曝光对准标记
公开(公告)号：US20050186753A1
公开(公告)日：2005-08-25
申请号：US10786187
申请日：2004-02-25
申请人： Ping-Hsu Chen , Ping Chuang , Mei-Sheng Zhou , Francis Ko , Huxley Lee , Joshua Tseng , Henry Lo
发明人： Ping-Hsu Chen , Ping Chuang , Mei-Sheng Zhou , Francis Ko , Huxley Lee , Joshua Tseng , Henry Lo
IPC分类号： G03F9/00 , H01J37/304 , H01L21/302 , H01L21/461 , H01L21/76 , H01L23/544
CPC分类号： H01L23/544 , G03F9/708 , G03F9/7084 , H01J37/3045 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A new and improved method for exposing alignment marks on a substrate by locally cutting through a metal or non-metal layer or layers sequentially deposited on the substrate above the alignment marks, using focused ion beam (FIB) technology. In a preferred embodiment, a method for exposing alignment marks on a substrate can be carried out by first providing a substrate that has multiple alignment marks provided thereon and at least one overlying opaque layer, typically but not necessarily metal, deposited on the substrate above the alignment marks. A focused ion beam is then directed against the overlying opaque layer or layers to cut through the layer or layers and expose the alignment marks on the substrate. A noble gas, preferably argon, is typically used as the ion source for the focused ion beam.
摘要翻译：一种新的和改进的方法，通过使用聚焦离子束（FIB）技术，通过局部切割穿过对准标记上方的基板上的金属或非金属层或层而在基板上曝光对准标记。在优选实施例中，用于在衬底上曝光对准标记的方法可以通过首先提供其上设置有多个对准标记的衬底和沉积在衬底上方的至少一个上覆的不透明层（通常但不一定是金属）对齐标记然后将聚焦离子束定向到上覆的不透明层或层以切穿该层或者暴露衬底上的对准标记。惰性气体，优选氩气通常用作聚焦离子束的离子源。

75. 发明申请

US20050118776A1 METHOD FOR FABRICATING A DEEP TRENCH CAPACITOR 有权
标题翻译：制造深层电容电容器的方法
公开(公告)号：US20050118776A1
公开(公告)日：2005-06-02
申请号：US10707261
申请日：2003-12-02
申请人： Ping Hsu
发明人： Ping Hsu
IPC分类号： H01L21/20 , H01L21/334 , H01L21/8234 , H01L21/8242 , H01L21/8244 , H01L27/02 , H01L27/108 , H01L29/94
CPC分类号： H01L29/945 , H01L27/0207 , H01L27/10867 , H01L27/1087
摘要： This invention pertains to a method for making a trench capacitor of DRAM devices. A single-sided spacer is situated on the sidewall of a recess at the top of the trench capacitor prior to the third polysilicon deposition and recess etching process. The single-sided spacer is formed on the second polysilicon layer and collar oxide layer. Then, the third polysilicon deposition and recess etching process is carried out to form a third polysilicon layer on the second polysilicon layer. Dopants of the third polysilicon layer are blocked from diffusing to the substrate by the single-sided spacer.
摘要翻译：本发明涉及制造DRAM器件的沟槽电容器的方法。在第三多晶硅沉积和凹陷蚀刻工艺之前，单面间隔物位于沟槽电容器顶部的凹部的侧壁上。单面间隔件形成在第二多晶硅层和环氧化物层上。然后，进行第三多晶硅沉积和凹陷蚀刻工艺以在第二多晶硅层上形成第三多晶硅层。通过单面间隔物阻止第三多晶硅层的掺杂剂扩散到衬底。

76. 发明申请

US20050070084A1 Substrate for pre-soldering material and fabrication method thereof 有权
标题翻译：预焊材料用基板及其制造方法
公开(公告)号：US20050070084A1
公开(公告)日：2005-03-31
申请号：US10769451
申请日：2004-01-29
申请人： Shih-Ping Hsu , Chu-Chin Hu
发明人： Shih-Ping Hsu , Chu-Chin Hu
IPC分类号： H01L21/44 , H01L21/60 , H05K3/34
CPC分类号： H01L24/81 , H01L24/11 , H01L2224/0401 , H01L2224/05568 , H01L2224/11334 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/16 , H01L2224/1607 , H01L2224/16225 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/81801 , H01L2224/83102 , H01L2224/92125 , H01L2924/0002 , H01L2924/01006 , H01L2924/01012 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/15787 , H01L2924/351 , H05K3/3473 , H05K3/3484 , H05K2203/054 , H01L2924/00 , H01L2224/05552
摘要： A substrate for a pre-soldering material and a fabrication method of the substrate are proposed. The substrate having at least one surface formed with a plurality of conductive pads is provided. An insulating layer is formed over the surface of the substrate in such a way that a top surface of each of the conductive pads is exposed. Next, a conductive film and a resist layer are formed in sequence on the insulating layer and the conductive pads, wherein a plurality of openings are formed in the resist layer to expose a part of the conductive film above the conductive pad. Then, a pre-soldering material is deposited over the conductive pad by stencil printing or electroplating process.
摘要翻译：提出了一种用于预焊材料的衬底和该衬底的制造方法。提供具有形成有多个导电焊盘的至少一个表面的衬底。在衬底的表面上形成绝缘层，使得每个导电焊盘的顶表面露出。接下来，在绝缘层和导电焊盘上依次形成导电膜和抗蚀剂层，其中在抗蚀剂层中形成多个开口以暴露导电膜上方的导电膜的一部分。然后，通过模板印刷或电镀工艺将预焊材料沉积在导电焊盘上。

77. 发明申请

US20050054157A1 Trench device structure with single-side buried strap and method for fabricating the same 有权
公开(公告)号：US20050054157A1
公开(公告)日：2005-03-10
申请号：US10720325
申请日：2003-11-24
申请人： Ping Hsu
发明人： Ping Hsu
IPC分类号： H01L21/76 , H01L21/8242
CPC分类号： H01L27/10867
摘要： A trench device with collar oxide for isolation. A buried trench capacitor is formed in a lower portion of a deep trench in a substrate. A conductive layer, surrounded by a collar insulating layer and lower than the collar insulating layer, is deposited in an upper portion of the trench. The collar insulating layer lining the trench is partially removed to expose a portion of the surface of the substrate such that a portion of the conductive layer contacts the substrate. A buried strap is formed where the substrate contacts the conductive layer, as a single-side buried strap. The other portions of the conductive layer are isolated from the substrate by the collar insulating layer. Thus, conventional shallow trench isolation (STI) structure is omitted.

78. 发明授权

US06853084B2 Substrate within a Ni/Au structure electroplated on electrical contact pads and method for fabricating the same 无效
标题翻译：在电接触焊盘上电镀的Ni / Au结构中的衬底及其制造方法
公开(公告)号：US06853084B2
公开(公告)日：2005-02-08
申请号：US10364431
申请日：2003-02-10
申请人： Shih-Ping Hsu , Chiang-Du Chen , Yen-Hung Liu
发明人： Shih-Ping Hsu , Chiang-Du Chen , Yen-Hung Liu
IPC分类号： H01L21/48 , H01L23/498 , H05K3/24 , H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L23/49811 , H01L21/4846 , H01L2924/0002 , H05K3/243 , H05K2203/0542 , H05K2203/0577 , H05K2203/1476 , H01L2924/00
摘要： The present invention discloses a substrate within a Ni/Au structure electroplated on electrical contact pads and a method for fabricating the same. The method comprises: providing a substrate with a circuit layout pattern and forming a conducting film on the surface of the substrate; depositing a first photoresist layer within an opening on said electrical conducting film surface to expose a portion of said circuit layout pattern to be electrical contact pads; removing the exposed conducting film uncovered by the first photoresist layer; depositing a second photoresist layer, covering the conducting film exposed in the openings of the first photoresist layer; electroplating Ni/Au covering the surface of the electrical contact pads; removing the first and second photoresists, and the conducting film covered by the photoresists; depositing solder mask on the substrate within an opening to expose said electrical contact pads. It improves the electrical coupling between gold wires and the electrical contact pads of the substrate, prevents the electrical contact pads from oxidation, and insurances the electrical interconnection performance.
摘要翻译：本发明公开了在电接触焊盘上电镀的Ni / Au结构内的基板及其制造方法。该方法包括：提供具有电路布局图案的衬底并在衬底的表面上形成导电膜; 在所述导电膜表面上的开口内沉积第一光致抗蚀剂层，以将所述电路布局图案的一部分暴露为电接触焊盘; 去除未被所述第一光致抗蚀剂层覆盖的暴露的导电膜; 沉积第二光致抗蚀剂层，覆盖暴露在第一光致抗蚀剂层的开口中的导电膜; 覆盖电接触垫表面的电镀Ni / Au; 去除第一和第二光致抗蚀剂，以及由光致抗蚀剂覆盖的导电膜; 在开口内的衬底上沉积焊料掩模以暴露所述电接触焊盘。它改善了金线和基片的电接触焊盘之间的电耦合，防止了电接触垫的氧化，并保证了电气互连性能。

79. 发明授权

US06789880B2 Microinjector for jetting droplets of different sizes 有权
标题翻译：用于喷射不同大小的液滴的微量注射器
公开(公告)号：US06789880B2
公开(公告)日：2004-09-14
申请号：US10064254
申请日：2002-06-26
申请人： Chung-Cheng Chou , Tsung-Ping Hsu , In-Yao Lee , Wei-Lin Chen , Hung-Sheng Hu
发明人： Chung-Cheng Chou , Tsung-Ping Hsu , In-Yao Lee , Wei-Lin Chen , Hung-Sheng Hu
IPC分类号： B41J214
CPC分类号： B41J2/14137 , B41J2/1412 , B41J2002/1437
摘要： A microinjector uses bubbles as virtual valves to eject droplets of different sizes. The microinjector is in fluid communications with a reservoir and has a substrate, an orifice layer, and a plurality of nozzles. The substrate has a manifold for receiving ink from the reservoir. The orifice layer is positioned on the top of the substrate so that a plurality of chambers are formed between the orifice layer and the top of the substrate. Each of the nozzles has an orifice and at least three bubble generating components. The bubble generating components are selectively driven by a driving circuit so that each nozzle can eject droplets of different sizes.
摘要翻译：微量注射器使用气泡作为虚拟阀来喷射不同尺寸的液滴。微型注射器与储存器流体连通，并具有基底，孔层和多个喷嘴。衬底具有用于从储存器接收墨水的歧管。孔层位于基板的顶部，使得在孔板层和基板的顶部之间形成多个室。每个喷嘴具有孔口和至少三个气泡产生部件。气泡生成部件由驱动电路选择性地驱动，使得每个喷嘴可喷射不同尺寸的液滴。

80. 发明授权

US06733616B2 Surface isolation device 失效
标题翻译：表面隔离装置
公开(公告)号：US06733616B2
公开(公告)日：2004-05-11
申请号：US10063878
申请日：2002-05-21
申请人： Hung-Sheng Hu , Tsung-Ping Hsu , Wei-Lin Chen , Chung-Cheng Chou , In-Yao Lee
发明人： Hung-Sheng Hu , Tsung-Ping Hsu , Wei-Lin Chen , Chung-Cheng Chou , In-Yao Lee
IPC分类号： H05H100
CPC分类号： H01L21/67126 , H01L21/30604 , H01L21/31111 , H01L21/67086
摘要： A surface isolation device for isolating a predetermined area of a second surface of a wafer from an etching solution while the etching solution etches a first surface of the wafer to form a plurality of manifolds in the wafer. The surface isolation device has a base for positioning the wafer, a fixture for fixing the wafer on the base, and an isolation ring positioned on the base for isolating the predetermined area from the etching solution. When the fixture fixes the wafer on the base, the wafer sticks to the isolation ring, forming a seal that isolates the predetermined area from the etching solution.
摘要翻译：一种表面隔离装置，用于在蚀刻溶液蚀刻晶片的第一表面以在晶片中形成多个歧管时，将晶片的第二表面的预定区域与蚀刻溶液隔离。表面隔离装置具有用于定位晶片的基座，用于将晶片固定在基座上的固定器，以及位于基座上用于将预定区域与蚀刻溶液隔离的隔离环。当夹具将晶片固定在基座上时，晶片粘附到隔离环上，形成将预定面积与蚀刻溶液隔离的密封。

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