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61. 发明授权

US09768286B2 Semiconductor device 有权
公开(公告)号：US09768286B2
公开(公告)日：2017-09-19
申请号：US15239201
申请日：2016-08-17
申请人： Renesas Electronics Corporation
发明人： Sho Nakanishi
IPC分类号： H01L29/74 , H01L29/739 , H01L29/66 , H01L29/861 , H01L29/868 , H01L29/06 , H01L29/08 , H01L23/552 , H01L27/06 , H01L29/10 , H01L29/45
CPC分类号： H01L29/7397 , H01L23/552 , H01L27/0664 , H01L29/0692 , H01L29/08 , H01L29/1095 , H01L29/456 , H01L29/66136 , H01L29/861 , H01L29/868 , H01L2924/0002 , H01L2924/00
摘要： In a back surface hole injection type diode, by more effectively securing the effect of hole injection from the back surface of a semiconductor substrate, the performance of a semiconductor device is improved. In the semiconductor device, in a diode formed of a P-N junction including an anode P-type layer formed in the main surface of a semiconductor substrate and a back surface N+-type layer formed in the back surface of the semiconductor substrate, a back surface P+-type layer is formed in the back surface, and a surface P+-type layer is formed in the main surface right above the back surface P+-type layer to thereby promote the effect of hole injection from the back surface.

62. 发明申请

US20170263785A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20170263785A1
公开(公告)日：2017-09-14
申请号：US15519800
申请日：2015-02-09
申请人： Mitsubishi Electric Corporation
发明人： Fumihito MASUOKA , Hidenori FUJII
IPC分类号： H01L29/868 , H01L29/06 , H01L29/417
CPC分类号： H01L29/868 , H01L29/0615 , H01L29/0619 , H01L29/0692 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/417 , H01L29/8611
摘要： A p type anode layer is formed on a front surface of an n type drift layer in an active region. An n type buffer layer is formed on a rear surface of the n− type drift layer. An n type cathode layer and a p type cathode layer are formed side by side on a rear surface of the n type buffer layer. An n type layer is formed on the rear surface of the n type buffer layer in a boundary region between the active region and the terminal region side by side with the n type cathode layer and the p type cathode layer. An extending distance of the n type layer to the active region side with an end portion of the active region as a starting point is represented by WGR1, and WGR1 satisfies 10 μm≦WGR1≦500 μm.

63. 发明授权

US09722039B2 Fabricating high-power devices 有权
公开(公告)号：US09722039B2
公开(公告)日：2017-08-01
申请号：US14986506
申请日：2015-12-31
申请人： International Business Machines Corporation
发明人： Stephen W. Bedell , Keith E. Fogel , Paul A. Lauro , Devendra K. Sadana
IPC分类号： H01L29/86 , H01L29/66 , H01L21/02 , H01L21/683 , H01L21/3065 , H01L29/20 , H01L29/868
CPC分类号： H01L29/66204 , H01L21/0254 , H01L21/3065 , H01L21/6835 , H01L29/2003 , H01L29/66121 , H01L29/868
摘要： According to an embodiment of the present invention, a method for fabricating a semiconductor device comprises depositing a transition layer on a substrate, depositing GaN material on the transition layer, forming a contact on the GaN material, depositing a stressor layer on the GaN material, separating the transition layer and the substrate from the GaN material, patterning and removing portions of the GaN material to expose portions of the stressor layer.

64. 发明授权

US09716186B2 Semiconductor device manufacturing method, and semiconductor device 有权
公开(公告)号：US09716186B2
公开(公告)日：2017-07-25
申请号：US14875787
申请日：2015-10-06
申请人： Kabushiki Kaisha Toshiba
发明人： Johji Nishio , Tatsuo Shimizu , Ryosuke Iijima , Teruyuki Ohashi , Kazuto Takao , Takashi Shinohe
IPC分类号： H01L29/868 , H01L21/04 , H01L29/16 , H01L29/66 , H01L29/32 , H01L29/861
CPC分类号： H01L29/868 , H01L21/046 , H01L29/1608 , H01L29/32 , H01L29/6606 , H01L29/66068 , H01L29/7395 , H01L29/8611
摘要： A semiconductor device manufacturing method according to an embodiment includes: forming an n-type SiC layer on a SiC substrate; forming a p-type impurity region at one side of the SiC layer; exposing other side of the SiC layer by removing at least part of the SiC substrate; implanting carbon (C) ions into exposed part of the SiC layer; performing a heat treatment; forming a first electrode on the p-type impurity region; and forming a second electrode on the exposed part of the SiC layer.

65. 发明申请

US20170133480A1 MOS P-N JUNCTION DIODE WITH ENHANCED RESPONSE SPEED AND MANUFACTURING METHOD THEREOF 有权
公开(公告)号：US20170133480A1
公开(公告)日：2017-05-11
申请号：US15413694
申请日：2017-01-24
申请人： PFC DEVICE HOLDINGS LTD
发明人： Hung-Hsin Kuo , Mei-Ling Chen
IPC分类号： H01L29/66 , H01L21/288 , H01L21/3213 , H01L21/265 , H01L21/324 , H01L29/06 , H01L29/45 , H01L29/51 , H01L29/868 , H01L21/3215
CPC分类号： H01L29/66136 , H01L21/26513 , H01L21/288 , H01L21/32133 , H01L21/32139 , H01L21/3215 , H01L21/324 , H01L29/0619 , H01L29/456 , H01L29/517 , H01L29/6609 , H01L29/66477 , H01L29/78 , H01L29/7802 , H01L29/861 , H01L29/868
摘要： A MOS P-N junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a central conductive layer, a silicon nitride layer, a metal diffusion layer, a channel region, and a metal sputtering layer. For manufacturing the MOS P-N junction diode, a mask layer is formed on a semiconductor substrate. A gate oxide layer is formed on the semiconductor substrate, and a polysilicon structure is formed on the gate oxide layer. A guard ring, a central conductive layer and a channel region are formed in the semiconductor substrate. A silicon nitride layer is formed on the central conductive layer. A metal diffusion layer is formed within the guard ring and the central conductive layer. Afterwards, a metal sputtering layer is formed, and the mask layer is partially exposed.

66. 发明申请

US20170133226A1 DIAMOND SEMICONDUCTOR SYSTEM AND METHOD 审中-公开
公开(公告)号：US20170133226A1
公开(公告)日：2017-05-11
申请号：US15287692
申请日：2016-10-06
申请人： Adam Khan
发明人： Adam Khan
IPC分类号： H01L21/04 , H01L29/868 , H01L29/66 , H01L29/16 , H01L29/36
CPC分类号： H01L21/043 , H01L21/02425 , H01L21/02527 , H01L21/0415 , H01L21/042 , H01L21/0435 , H01L21/2855 , H01L21/28556 , H01L21/324 , H01L21/76871 , H01L29/1602 , H01L29/36 , H01L29/6603 , H01L29/868
摘要： Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.

67. 发明授权

US09646964B2 Semiconductor device 有权
公开(公告)号：US09646964B2
公开(公告)日：2017-05-09
申请号：US14807572
申请日：2015-07-23
申请人： Vanguard International Semiconductor Corporation
发明人： Manoj Kumar , Pei-Heng Hung , Hsiung-Shih Chang , Chia-Hao Lee , Jui-Chun Chang
IPC分类号： H01L29/872 , H01L27/07 , H01L29/868 , H01L29/08
CPC分类号： H01L27/0727 , H01L29/0649 , H01L29/083 , H01L29/36 , H01L29/66128 , H01L29/66143 , H01L29/8611 , H01L29/868 , H01L29/872
摘要： The invention provides a semiconductor device. The semiconductor device includes a buried oxide layer disposed on a substrate. A semiconductor layer having a first conduction type is disposed on the buried oxide layer. A first well doped region having a second conduction type is disposed in the semiconductor layer. A cathode doped region having the second conduction type is disposed in the first well doped region. A first anode doped region having the first conduction type is disposed in the first well doped region, separated from the cathode doped region. A first distance from a bottom boundary of the first anode doped region to a top surface of the semiconductor layer is greater than a second distance from the bottom boundary to an interface between the semiconductor layer and the buried oxide layer.

68. 发明授权

US09601639B2 Semiconductor device 有权
公开(公告)号：US09601639B2
公开(公告)日：2017-03-21
申请号：US14784170
申请日：2013-06-12
申请人： Mitsubishi Electric Corporation
发明人： Fumihito Masuoka , Katsumi Nakamura , Akito Nishii
IPC分类号： H01L29/00 , H01L29/872 , H01L29/36 , H01L29/739 , H01L29/06 , H01L29/417 , H01L29/861 , H01L29/868 , H01L29/16 , H01L29/20
CPC分类号： H01L29/872 , H01L29/0615 , H01L29/0619 , H01L29/063 , H01L29/0638 , H01L29/0684 , H01L29/0692 , H01L29/0834 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/36 , H01L29/417 , H01L29/7393 , H01L29/7397 , H01L29/861 , H01L29/8611 , H01L29/868
摘要： A p-type anode layer (2) is provided on an upper surface of an n-type drift layer (1). An n-type cathode layer (3) is provided on a lower surface of the n−-type drift layer (1). An n-type buffer layer (4) is provided between the n−-type drift layer (1) and the n-type cathode layer (3). A peak impurity concentration in the n-type buffer layer (4) is higher than that in the n−-type drift layer (1) and lower than that in the n-type cathode layer (3). A gradient of carrier concentration at a connection between the n−-type drift layer (1) and the n-type buffer layer (4) is 20 to 2000 cm−4.

69. 发明申请

US20170077218A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20170077218A1
公开(公告)日：2017-03-16
申请号：US15042747
申请日：2016-02-12
申请人： Kabushiki Kaisha Toshiba
发明人： Yukie Nishikawa , Yasuhiko Akaike , Masaki Okazaki
IPC分类号： H01L29/06 , H01L29/868
CPC分类号： H01L29/0619 , H01L29/1608 , H01L29/402 , H01L29/417 , H01L29/7397 , H01L29/8611 , H01L29/872
摘要： Provided is a semiconductor device including a first electrode, a second electrode, a semiconductor substrate having a first plane, a second plane, a first conductivity-type first region, and a plurality of second conductivity-type second regions provided around the first electrode, the second regions being in contact with the first plane, at least a portion of the semiconductor substrate being provided between the first electrode and the second electrode, a first insulating film provided on or above the second regions, the first insulating film including positive charges, and a second insulating film provided on or above the second regions, second insulating film including negative charges.
摘要翻译：提供一种半导体器件，其包括第一电极，第二电极，具有第一平面的半导体衬底，第二平面，第一导电型第一区域和设置在第一电极周围的多个第二导电类型第二区域，所述第二区域与所述第一平面接触，所述半导体衬底的至少一部分设置在所述第一电极和所述第二电极之间，设置在所述第二区域上或上方的第一绝缘膜，所述第一绝缘膜包括正电荷，以及设置在第二区域上或上方的第二绝缘膜，第二绝缘膜包括负电荷。

70. 发明授权

US09577046B1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09577046B1
公开(公告)日：2017-02-21
申请号：US15062202
申请日：2016-03-07
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Yoichi Hori , Tsuyoshi Oota , Hiroshi Kono , Atsuko Yamashita
IPC分类号： H01L29/16 , H01L29/06 , H01L29/45 , H01L29/872 , H01L29/868
CPC分类号： H01L29/1608 , H01L29/0619 , H01L29/063 , H01L29/0684 , H01L29/0692 , H01L29/45 , H01L29/868 , H01L29/872
摘要： A semiconductor device includes a semiconductor layer having a first surface and a second surface, a first electrode on the first surface, a second electrode on the second surface, a first semiconductor region of a first conductivity type in the semiconductor layer, a second semiconductor region of a second conductivity type in an element region of the semiconductor layer between the first semiconductor region and the first electrode, a third semiconductor region of the second conductivity type between the second semiconductor region and the first electrode, and a fourth semiconductor region of the second conductivity type in a termination region of the semiconductor layer inwardly of the first surface. A distance between the fourth semiconductor region and the second surface is greater than a distance between the second semiconductor region and the second surface.
摘要翻译：半导体器件包括具有第一表面和第二表面的半导体层，第一表面上的第一电极，第二表面上的第二电极，半导体层中的第一导电类型的第一半导体区域，第二半导体区域在第一半导体区域和第一电极之间的半导体层的元件区域中的第二导电类型的第二导电类型的第二半导体区域，第二半导体类型的第二半导体区域和第二半导体区域的第二半导体区域导电类型在第一表面内部的半导体层的端接区域中。第四半导体区域和第二表面之间的距离大于第二半导体区域和第二表面之间的距离。

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