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61. 发明申请

US20110008950A1 Remote Hydrogen Plasma With Ion Filter for Terminating Silicon Dangling Bonds 有权
标题翻译：远程氢等离子体与离子过滤器终止硅悬挂债券
公开(公告)号：US20110008950A1
公开(公告)日：2011-01-13
申请号：US12757341
申请日：2010-04-09
申请人： Zhi Xu
发明人： Zhi Xu
IPC分类号： H01L21/30
CPC分类号： H01L21/3105 , H01J37/32357 , H01L21/3003 , H01L21/321 , H01L21/425 , H01L31/03685 , H01L31/03762 , H01L31/075 , H01L31/1824 , H01L31/1868 , H01L31/202 , Y02E10/545 , Y02E10/548 , Y02P70/521
摘要： Apparatus and methods for repairing silicon dangling bonds resulting from semiconductor processing are disclosed. The silicon dangling bonds can be repaired by introducing hydrogen radicals with substantially no hydrogen ions into the processing chamber to react with the silicon dangling bonds, eliminating them.
摘要翻译：公开了用于修复由半导体加工产生的硅悬挂键的装置和方法。可以通过将基本上没有氢离子的氢自由基引入处理室来与硅悬挂键反应来修复硅悬挂键，从而消除它们。

62. 发明申请

US20100167437A1 PEELING METHOD AND METHOD FOR MANUFACTURING DISPLAY DEVICE USING THE PEELING METHOD 有权
标题翻译：使用剥离方法制造显示装置的剥离方法和方法
公开(公告)号：US20100167437A1
公开(公告)日：2010-07-01
申请号：US12720761
申请日：2010-03-10
申请人： Shunpei YAMAZAKI , Toru TAKAYAMA , Junya MARUYAMA , Yuugo GOTO , Yumiko OHNO
发明人： Shunpei YAMAZAKI , Toru TAKAYAMA , Junya MARUYAMA , Yuugo GOTO , Yumiko OHNO
IPC分类号： H01L33/52 , H01L21/78
CPC分类号： H01L27/1218 , H01L21/02175 , H01L21/28008 , H01L21/324 , H01L21/425 , H01L21/707 , H01L21/823487 , H01L27/1214 , H01L27/1266 , H01L27/156 , H01L27/3244 , H01L29/78603 , H01L33/005 , H01L33/0054 , H01L51/003 , H01L51/56 , H01L2221/68368 , H01L2227/326 , H01L2933/0016
摘要： The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
摘要翻译：本发明提供了一种剥离方法的简化方法以及均匀地剥离和转录到大尺寸基板。本发明的一个特征是剥离第一粘合剂并在剥离过程中同时固化第二粘合剂，从而简化制造过程。另外，本发明是为了将形成半导体的电极的剥离层转印为规定的基板的时机。特别地，特征在于，在大尺寸基板上形成有多个半导体元件的状态下进行剥离的情况下，通过使用压差来进行剥离。

63. 发明申请

US20090246948A1 Method of Preparing P-Type Doped ZnO or ZnMgO 失效
标题翻译：制备P型掺杂ZnO或ZnMgO的方法
公开(公告)号：US20090246948A1
公开(公告)日：2009-10-01
申请号：US12409957
申请日：2009-03-24
申请人： Celine Chevalier
发明人： Celine Chevalier
IPC分类号： H01L21/425
CPC分类号： H01L21/425 , H01L33/0087
摘要： Method of preparing p-type doped ZnO or p-type doped ZnMgO, in which the following successive steps are carried out: a) implantation of O+ oxygen ions in an n-type doped ZnO or an n-type doped ZnMgO; b) first annealing at a temperature less than or equal to 1200° C. under oxygen for a time greater than or equal to 5 minutes; c) implantation of at least one ion of an element chosen among the elements of group I or the elements of group V of the periodic table; d) second annealing. The p-type doped ZnO or ZnMgO obtained by this method may be used in an optoelectronic device such as a light emitting diode.
摘要翻译：制备p型掺杂ZnO或p型掺杂ZnMgO的方法，其中进行以下连续步骤：a）在n型掺杂的ZnO或n型掺杂ZnMgO中注入O +氧离子; b）在氧气下在低于或等于1200℃的温度下首先退火大于或等于5分钟的时间; c）植入选自元素周期表第I族元素或第Ⅴ族元素中元素的至少一种离子; d）第二退火。通过该方法获得的p型掺杂的ZnO或ZnMgO可以用于诸如发光二极管的光电子器件中。

64. 发明授权

US07326951B2 Chalcogenide random access memory 有权
标题翻译：硫族元素随机存取存储器
公开(公告)号：US07326951B2
公开(公告)日：2008-02-05
申请号：US11163062
申请日：2005-10-04
申请人： Ming-Hsiang Hsueh
发明人： Ming-Hsiang Hsueh
IPC分类号： H01L29/06
CPC分类号： H01L45/165 , H01L21/425 , H01L29/04 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/1273
摘要： A chalcogenide random access memory (CRAM) is provided. The CRAM includes a substrate, a first dielectric layer, a bottom electrode, a top electrode, a second dielectric layer, a modified chalcogenide spacer and an un-modified chalcogenide thin film. The first dielectric layer is disposed on the substrate and the bottom electrode is located inside the first dielectric layer. The second dielectric layer is disposed on the first dielectric layer and it has at least one opening exposing the bottom electrode. The modified chalcogenide spacer is disposed on the sidewall of the opening exposing portion of the bottom electrode. The top electrode is disposed on the bottom electrode. The un-modified chalcogenide thin film is disposed between the modified chalcogenide spacer and the top electrode and also disposed between the bottom electrode and the top electrode. The modified chalcogenide spacer has a better etching resistivity than the un-modified chalcogenide thin film.
摘要翻译：提供硫属元素随机存取存储器（CRAM）。 CRAM包括基板，第一介电层，底部电极，顶部电极，第二电介质层，修饰的硫族化物间隔物和未改性的硫族化物薄膜。第一电介质层设置在基板上，底电极位于第一电介质层的内部。第二电介质层设置在第一电介质层上，并且具有暴露底部电极的至少一个开口。修饰的硫族化物间隔物设置在底部电极的开口暴露部分的侧壁上。顶部电极设置在底部电极上。未改性的硫族化物薄膜设置在改性硫族化物间隔物和顶部电极之间，并且还设置在底部电极和顶部电极之间。改性硫属元素间隔物具有比未改性的硫族化物薄膜更好的蚀刻电阻率。

65. 发明申请

US20070211189A1 Peeling method and method for manufacturing display device using the peeling method 有权
标题翻译：使用剥离方法制造显示装置的剥离方法和方法
公开(公告)号：US20070211189A1
公开(公告)日：2007-09-13
申请号：US11797535
申请日：2007-05-04
申请人： Shunpei Yamazaki , Toru Takayama , Junya Maruyama , Yuugo Goto , Yumiko Ohno
发明人： Shunpei Yamazaki , Toru Takayama , Junya Maruyama , Yuugo Goto , Yumiko Ohno
IPC分类号： G02F1/136
CPC分类号： H01L27/1218 , H01L21/02175 , H01L21/28008 , H01L21/324 , H01L21/425 , H01L21/707 , H01L21/823487 , H01L27/1214 , H01L27/1266 , H01L27/156 , H01L27/3244 , H01L29/78603 , H01L33/005 , H01L33/0054 , H01L51/003 , H01L51/56 , H01L2221/68368 , H01L2227/326 , H01L2933/0016
摘要： The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
摘要翻译：本发明提供了一种剥离方法的简化方法以及均匀地剥离和转录到大尺寸基板。本发明的一个特征是剥离第一粘合剂并在剥离过程中同时固化第二粘合剂，从而简化制造过程。另外，本发明是为了将形成半导体的电极的剥离层转印为规定的基板的时机。特别地，特征在于，在大尺寸基板上形成有多个半导体元件的状态下进行剥离的情况下，通过使用压差来进行剥离。

66. 发明申请

US20060131618A1 CHALCOGENIDE RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME 有权
标题翻译： CHALCOGENIDE RANDOM ACCESS MEMORY AND METHOD OF FABRISTING THE SAME
公开(公告)号：US20060131618A1
公开(公告)日：2006-06-22
申请号：US11163062
申请日：2005-10-04
申请人： Ming-Hsiang Hsueh
发明人： Ming-Hsiang Hsueh
IPC分类号： H01L29/768
CPC分类号： H01L45/165 , H01L21/425 , H01L29/04 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/1273
摘要： A chalcogenide random access memory (CRAM) is provided. The CRAM includes a substrate, a first dielectric layer, a bottom electrode, a top electrode, a second dielectric layer, a modified chalcogenide spacer and an un-modified chalcogenide thin film. The first dielectric layer is disposed on the substrate and the bottom electrode is located inside the first dielectric layer. The second dielectric layer is disposed on the first dielectric layer and it has at least one opening exposing the bottom electrode. The modified chalcogenide spacer is disposed on the sidewall of the opening exposing portion of the bottom electrode. The top electrode is disposed on the bottom electrode. The un-modified chalcogenide thin film is disposed between the modified chalcogenide spacer and the top electrode and also disposed between the bottom electrode and the top electrode. The modified chalcogenide spacer has a better etching resistivity than the un-modified chalcogenide thin film.
摘要翻译：提供硫属元素随机存取存储器（CRAM）。 CRAM包括基板，第一介电层，底部电极，顶部电极，第二电介质层，修饰的硫族化物间隔物和未改性的硫族化物薄膜。第一电介质层设置在基板上，底电极位于第一电介质层的内部。第二电介质层设置在第一电介质层上，并且具有暴露底部电极的至少一个开口。修饰的硫族化物间隔物设置在底部电极的开口暴露部分的侧壁上。顶部电极设置在底部电极上。未改性的硫族化物薄膜设置在改性硫族化物间隔物和顶部电极之间，并且还设置在底部电极和顶部电极之间。改性硫属元素间隔物具有比未改性的硫族化物薄膜更好的蚀刻电阻率。

67. 发明申请

US20040239827A1 Peeling method and method for manufacturing display device using the peeling method 有权
标题翻译：使用剥离方法制造显示装置的剥离方法和方法
公开(公告)号：US20040239827A1
公开(公告)日：2004-12-02
申请号：US10752574
申请日：2004-01-08
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki , Toru Takayama , Junya Maruyama , Yuugo Goto , Yumiko Ohno
IPC分类号： G02F001/136
CPC分类号： H01L27/1218 , H01L21/02175 , H01L21/28008 , H01L21/324 , H01L21/425 , H01L21/707 , H01L21/823487 , H01L27/1214 , H01L27/1266 , H01L27/156 , H01L27/3244 , H01L29/78603 , H01L33/005 , H01L33/0054 , H01L51/003 , H01L51/56 , H01L2221/68368 , H01L2227/326 , H01L2933/0016
摘要： The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
摘要翻译：本发明提供了一种剥离方法的简化方法以及均匀地剥离和转录到大尺寸基板。本发明的一个特征是剥离第一粘合剂并在剥离过程中同时固化第二粘合剂，从而简化制造过程。另外，本发明是为了将形成半导体的电极的剥离层转印为规定的基板的时机。特别地，特征在于，在大尺寸基板上形成有多个半导体元件的状态下进行剥离的情况下，通过使用压差来进行剥离。

68. 发明授权

US06617183B2 Method for forming p-type semiconductor film and light emitting device using the same 失效
标题翻译：用于形成p型半导体膜的方法和使用其的发光器件
公开(公告)号：US06617183B2
公开(公告)日：2003-09-09
申请号：US09838031
申请日：2001-04-19
申请人： Michio Kadota , Yasuhiro Negoro , Yoshinori Miura
发明人： Michio Kadota , Yasuhiro Negoro , Yoshinori Miura
IPC分类号： H01L21265
CPC分类号： H01L21/425 , C30B23/02 , C30B29/16 , H01L33/0087 , H01L33/0095
摘要： A method for forming a p-type semiconductor film comprises the steps of: providing on a substrate a group II-VI compound semiconductor film which is doped with a p-type impurity and comprises either MgXZn1−XO (0≦X≦1) or CdXZn1−XO (0≦X≦1) and activating the p-type impurity by annealing the doped semiconductor film.
摘要翻译：一种形成p型半导体膜的方法包括以下步骤：在衬底上提供掺杂有p型杂质的II-VI族化合物半导体膜，其包含MgXZn1-XO（0≤x≤1））或CdXZn1-XO（0 <= X <= 1），并通过退火掺杂的半导体膜激活p型杂质。

69. 发明申请

US20010034115A1 Method for forming p-type semiconductor film and light emitting device using the same 失效
标题翻译：用于形成p型半导体膜的方法和使用其的发光器件
公开(公告)号：US20010034115A1
公开(公告)日：2001-10-25
申请号：US09838031
申请日：2001-04-19
申请人： Murata Manufacturing Co., Ltd.
发明人： Michio Kadota , Yasuhiro Negoro , Toshinori Miura
IPC分类号： H01L029/06 , H01L031/0328
CPC分类号： H01L21/425 , C30B23/02 , C30B29/16 , H01L33/0087 , H01L33/0095
摘要： A method for forming a p-type semiconductor film comprises the steps of: providing on a substrate a group II-VI compound semiconductor film which is doped with a p-type impurity and comprises either MgxZn1-xO (0nullXnull1) or CdxZn1-xO (0nullXnull1) and activating the p-type impurity by annealing the doped semiconductor film.
摘要翻译：一种形成p型半导体膜的方法包括以下步骤：在衬底上提供掺杂有p型杂质的II-VI族化合物半导体膜，其包含Mg x Zn 1-x O（0 <= X 1 = ）或CdxZn1-xO（0 <= X <= 1），并通过退火掺杂的半导体膜激活p型杂质。

70. 发明授权

US4004342A Fabrication of ion implanted P-N junction devices 失效
标题翻译：离子注入P-N结器件的制造
公开(公告)号：US4004342A
公开(公告)日：1977-01-25
申请号：US660521
申请日：1976-02-23
申请人： Yoon Soo Park , Phil Won Yu
发明人： Yoon Soo Park , Phil Won Yu
IPC分类号： H01L21/425 , H01L31/032 , H01L31/068 , H01L33/00 , H01L33/26 , B01J17/00
CPC分类号： H01L33/26 , H01L21/425 , H01L31/0323 , H01L31/068 , Y02E10/541 , Y02E10/547
摘要： Light emitters and photovoltaic detectors are fabricated by ion implantation of cadmium, zinc, bromine or chlorine ions into a p-type CuInSe.sub.2 substrate so as to form a p-n semiconductor junction.
摘要翻译：通过将镉，锌，溴或氯离子离子注入到p型CuInSe 2衬底中来制造发光体和光电探测器，以形成p-n半导体结。

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