专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明申请

US20060141372A1 Mask pattern and method for forming resist pattern using mask pattern thereof 审中-公开
公开(公告)号：US20060141372A1
公开(公告)日：2006-06-29
申请号：US11350743
申请日：2006-02-10
申请人： Shinji Kobayashi
发明人： Shinji Kobayashi
IPC分类号： G03C5/00 , G03F1/00
CPC分类号： G03F1/30 , G03F1/32 , G03F7/203
摘要： A mask pattern for multiple exposure for forming a resist pattern with an unvarying pattern pitch on a semiconductor wafer, which is utilized as in case where a mask pattern under a design having the width of an aperture pattern smaller than the width of a light-shielding pattern is used at one exposure, wherein the mask pattern for multiple exposure has a pattern pitch that is the same as that of the mask pattern under design and has the width of an aperture pattern greater than the width of a light-shielding pattern.

62. 发明授权

US07032209B2 Mask pattern and method for forming resist pattern using mask pattern thereof 失效
标题翻译：掩模图案和使用其掩模图案形成抗蚀剂图案的方法
公开(公告)号：US07032209B2
公开(公告)日：2006-04-18
申请号：US10632850
申请日：2003-08-04
申请人： Shinji Kobayashi
发明人： Shinji Kobayashi
IPC分类号： G06F17/50
CPC分类号： G03F1/30 , G03F1/32 , G03F7/203
摘要： A mask pattern for multiple exposure for forming a resist pattern with an unvarying pattern pitch on a semiconductor wafer, which is utilized as in case where a mask pattern under a design having the width of an aperture pattern smaller than the width of a light-shielding pattern is used at one exposure, wherein the mask pattern for multiple exposure has a pattern pitch that is the same as that of the mask pattern under design and has the width of an aperture pattern greater than the width of a light-shielding pattern.
摘要翻译：用于在半导体晶片上形成具有不变图案间距的抗蚀剂图案的多次曝光的掩模图案，其被利用为在具有小于光屏蔽宽度的孔径图案的宽度的设计下的掩模图案的情况下在一次曝光中使用图案，其中用于多次曝光的掩模图案具有与设计下的掩模图案的图案间距相同的图案间距，并且具有大于遮光图案的宽度的孔径图案的宽度。

63. 发明申请

US20050215161A1 Plasma display panel manufacturing method 失效
标题翻译：等离子显示屏制造方法
公开(公告)号：US20050215161A1
公开(公告)日：2005-09-29
申请号：US10511749
申请日：2004-02-23
申请人： Daisuke Adachi
发明人： Daisuke Adachi
IPC分类号： H01J11/44 , G03F7/20 , H01J9/02 , H01J9/24 , H01J11/26 , H01J11/34 , H01J11/02
CPC分类号： G03F7/203 , G03F7/70466 , G03F7/70791 , H01J9/02 , H01J9/241 , H01J2217/492 , H01J2217/49207
摘要： The present invention provides a method of manufacturing a PDP that prevents defects due to dust adhering to a photomask, for example, from occurring in a structure of the PDP. In photolithography, exposure is performed twice in a same process, and photomask (22) is moved within an allowable range of displacement in an exposure pattern, between a first and a second exposures. Photomask (22) is exposed twice in total before and after moving photomask (22). Region (21a), an unexposed region due to interruption of dust (22b) attached to photomask (22), can be suppressed, enabling pattern exposure on photosensitive Ag paste film (21) to be favorably performed.
摘要翻译：本发明提供一种PDP的制造方法，其能够防止例如在PDP的结构中发生由于尘埃附着在光掩模上而引起的缺陷。在光刻中，在相同的工艺中进行两次曝光，并且光掩模（22）在第一和第二曝光之间的曝光图案的允许移动范围内移动。光掩模（22）在移动光掩模（22）之前和之后总共曝光两次。可以抑制由于粘附在光掩模（22）上的灰尘中断而导致的未曝光区域（21a），能够有利地进行感光性Ag糊状物（21）上的图案曝光。

64. 发明申请

US20050196701A1 Process for preparing a flexographic printing plate 失效
标题翻译：柔版印刷版的制备方法
公开(公告)号：US20050196701A1
公开(公告)日：2005-09-08
申请号：US11069607
申请日：2005-03-01
申请人： Sabine Rapp , Thies Knudsen
发明人： Sabine Rapp , Thies Knudsen
IPC分类号： G03F7/00 , G03F1/00 , G03F7/20 , G03F7/26 , G03F7/34 , G03F7/36 , G03F7/38
CPC分类号： G03F7/203 , G03F1/68 , G03F7/2004 , G03F7/202
摘要： A process for preparing a flexographic printing plate comprising providing a photosensitive element comprising a support and at least one photopolymerizable layer, providing a photomask adjacent the photopolymerizable layer opposite the support, exposing the photosensitive element with ultraviolet radiation between 200 and 300 nm through the photomask, exposing the photosensitive element with ultraviolet radiation between 310 and 400 nm through the photomask to photopolymerize areas of the photopolymerizable layer, and treating the exposed photosensitive element to remove unpolymerized areas, thereby forming a relief surface suitable for printing.
摘要翻译：一种制备柔版印刷版的方法，包括提供包括载体和至少一个可光聚合层的光敏元件，提供与支持体相对的可光聚合层附近的光掩模，通过光掩模将光敏元件暴露于200和300nm之间的紫外线辐射，通过光掩模将感光元件暴露在310和400nm之间的紫外线辐射，以光聚合可光聚合层的区域，并处理曝光的感光元件以除去未聚合的区域，从而形成适于印刷的浮雕表面。

65. 发明申请

US20050164129A1 Photomask and manufacturing method of semiconductor device 有权
标题翻译：半导体器件的光掩模和制造方法
公开(公告)号：US20050164129A1
公开(公告)日：2005-07-28
申请号：US11084017
申请日：2005-03-21
申请人： Takayoshi Minami
发明人： Takayoshi Minami
IPC分类号： G03F1/30 , G03F1/32 , G03F1/68 , G03F7/00 , G03F7/20 , G03F9/00 , H01L21/027 , H01L21/28 , H01L29/423 , H01L29/49
CPC分类号： G03F1/30 , G03F1/32 , G03F1/36 , G03F1/70 , G03F7/203
摘要： A double exposure process is performed using a halftone phase shift mask (11) including gate patterns (1), assist patterns (2a) and (2b) with different resoluble line widths, and an assist pattern (2c) with a line width equal to or smaller than a resolution limit which are respectively inserted into portions in each of which a distance between the gate patterns (1) is large, and a Levenson phase shift mask (11) including shifter patterns (3) corresponding to the gate patterns (1) of the photomask 11. On this occasion, the assist patterns (2a), (2b), and (2c) are erased and only the gate patterns (1) are transferred. Consequently, when patterns are transferred by the double exposure process, a common depth of focus of the patterns is improved and highly uniform line widths are realized, which makes it possible to manufacture a highly reliable semiconductor device.
摘要翻译：使用包括具有不同可分解线宽度的栅极图案（1），辅助图案（2a）和（2b）的半色调相移掩模（11）和具有线的辅助图案（2c）来执行双曝光处理宽度等于或小于分辨率限制，其分别插入到栅极图案（1）之间的距离大的部分中，并且包括对应于栅极的移位器图案（3）的莱文森相移掩模（11）在这种情况下，辅助图案（2a），（2b）和（2c）被擦除，并且只有栅极图案（1）被转印。因此，当通过双重曝光处理传送图案时，图案的共同的深度焦点被改善并且实现了高度均匀的线宽，这使得可以制造高可靠性的半导体器件。

66. 发明授权

US06864185B2 Fine line printing by trimming the sidewalls of pre-developed resist image 有权
标题翻译：通过修剪预制抗蚀剂图像的侧壁进行细线印刷
公开(公告)号：US06864185B2
公开(公告)日：2005-03-08
申请号：US10643000
申请日：2003-08-18
申请人： Ta-Hung Yang , Chin-Cheng Yang , Ching-Yu Chang
发明人： Ta-Hung Yang , Chin-Cheng Yang , Ching-Yu Chang
IPC分类号： G03F7/20 , G03F7/26 , H01L21/302 , H01L21/461
CPC分类号： G03F7/70466 , G03F7/203
摘要： A method of forming a feature pattern in a photosensitive layer includes forming the photosensitive layer on a substrate, providing a first mask having a first opaque area thereon, and performing a first exposure process with a first dose to form a first unexposed image in the photosensitive layer. The method further includes performing a second exposure process with a second dose to expose sidewalls of the first unexposed image so that the sidewalls of the first unexposed image receive at least a portion of the second dose thus forming a second unexposed image in the photosensitive layer, and developing the photosensitive layer with a developing process to form the feature pattern and to create features having smaller widths than those which would result in developing the photosensitive layer of the first unexposed image.
摘要翻译：在感光层中形成特征图案的方法包括在基底上形成感光层，提供其上具有第一不透明区域的第一掩模，并且以第一剂量进行第一曝光处理以在感光层中形成第一未曝光图像层。该方法还包括用第二剂量进行第二曝光处理以暴露第一未曝光图像的侧壁，使得第一未曝光图像的侧壁接收第二剂量的至少一部分，从而在感光层中形成第二未曝光图像，并用显影工艺显影感光层以形成特征图案，并产生具有比导致显影第一未曝光图像的感光层的那些宽度小的特征。

67. 发明授权

US06807662B2 Performance of integrated circuit components via a multiple exposure technique 有权
标题翻译：集成电路组件通过多重曝光技术的性能
公开(公告)号：US06807662B2
公开(公告)日：2004-10-19
申请号：US10192186
申请日：2002-07-09
申请人： Olivier Toublan , Serdar Manakli , Yorick Trouiller
发明人： Olivier Toublan , Serdar Manakli , Yorick Trouiller
IPC分类号： G06F1750
CPC分类号： G03F7/203 , G03F1/32 , G03F1/36 , G03F1/70
摘要： An initial layout of an integrated circuit device is separated into a set of definitions for use in a multiple exposure fabrication process. The separation begins with reading a portion of the initial layout and identifying one or more target features within the initial layout. Further, a first revised layout definition is created for a first mask and a second revised layout definition is created for a second mask. The first revised layout definition includes the target features inside the dark-field content. In addition, in one embodiment, the first revised layout definition includes clear areas around each target feature. The second layout definition includes one or more dark features inside the bright-field content. These dark features, when used in the multiple exposure fabrication process, will overlap the target features. The first and second masks may be binary masks, attenuated phase-shifting masks (PSMs) or a combination of a binary mask and an attenuated PSM.
摘要翻译：将集成电路器件的初始布局分成用于多次曝光制造工艺中的一组定义。分离开始于读取初始布局的一部分并且识别初始布局中的一个或多个目标特征。此外，为第一掩模创建第一修订的布局定义，并为第二掩模创建第二修订布局定义。第一个修订的布局定义包括暗场内容中的目标特征。此外，在一个实施例中，第一修订布局定义包括围绕每个目标特征的清晰区域。第二布局定义包括明场内容内的一个或多个暗特征。当在多重曝光制造过程中使用时，这些黑暗特征将与目标特征重叠。第一和第二掩模可以是二进制掩模，衰减相移掩模（PSM）或二进制掩码和衰减PSM的组合。

68. 发明申请

US20040010768A1 Performance of integrated circuit components via a multiple exposure technique 有权
标题翻译：集成电路组件通过多重曝光技术的性能
公开(公告)号：US20040010768A1
公开(公告)日：2004-01-15
申请号：US10192186
申请日：2002-07-09
发明人： Olivier Toublan , Serdar Manakli , Yorick Trouiller
IPC分类号： G06F017/50
CPC分类号： G03F7/203 , G03F1/32 , G03F1/36 , G03F1/70
摘要： An initial layout of an integrated circuit device is separated into a set of definitions for use in a multiple exposure fabrication process. The separation begins with reading a portion of the initial layout and identifying one or more target features within the initial layout. Further, a first revised layout definition is created for a first mask and a second revised layout definition is created for a second mask. The first revised layout definition includes the target features inside the dark-field content. In addition, in one embodiment, the first revised layout definition includes clear areas around each target feature. The second layout definition includes one or more dark features inside the brightfield content. These dark features, when used in the multiple exposure fabrication process, will overlap the target features. The first and second masks may be binary masks, attenuated phase-shifting masks (PSMs) or a combination of a binary mask and an attenuated PSM.
摘要翻译：将集成电路器件的初始布局分成用于多次曝光制造工艺中的一组定义。分离开始于读取初始布局的一部分并且识别初始布局中的一个或多个目标特征。此外，为第一掩模创建第一修订的布局定义，并为第二掩模创建第二修订布局定义。第一个修订的布局定义包括暗场内容中的目标特征。此外，在一个实施例中，第一修订布局定义包括围绕每个目标特征的清晰区域。第二种布局定义包括明场内容中的一个或多个暗特征。当在多重曝光制造过程中使用时，这些黑暗特征将与目标特征重叠。第一和第二掩模可以是二进制掩模，衰减相移掩模（PSM）或二进制掩码和衰减PSM的组合。

69. 发明授权

US06623911B1 Method to form code marks on mask ROM products 有权
标题翻译：在掩码ROM产品上形成代码标记的方法
公开(公告)号：US06623911B1
公开(公告)日：2003-09-23
申请号：US09953524
申请日：2001-09-17
申请人： Yu-Chang Jong , Tai-Yuan Wu
发明人： Yu-Chang Jong , Tai-Yuan Wu
IPC分类号： G03F720
CPC分类号： H01L23/544 , G03F7/203 , H01L2223/54433 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a clear code mark that is independent of backend planarization by adding an extra exposing step to the normal photolithography process is described. A layer to be patterned is provided on a substrate. A photoresist layer is coated overlying the layer to be patterned. The photoresist layer is first exposed through a code mask and second exposed through a patterning mask. The photoresist layer is developed to form a photoresist mask having a code mark pattern from the code mask and a device pattern from the patterning mask. The layer to be patterned is etched away where it is not covered by the photoresist mask to form simultaneously device structures and a code mark in the fabrication of an integrated circuit device.
摘要翻译：描述了通过向普通光刻工艺添加额外的暴露步骤来形成独立于后端平面化的清晰代码标记的方法。待图案化的层设置在基板上。将光致抗蚀剂层涂覆在待图案化的层上。光致抗蚀剂层首先通过代码掩模曝光，并通过图案掩模曝光。显影光致抗蚀剂层以形成具有来自编码掩模的码标图案和来自图案化掩模的器件图案的光致抗蚀剂掩模。要被图案化的层被蚀刻掉，其不被光致抗蚀剂掩模覆盖，以在集成电路器件的制造中同时形成器件结构和代码标记。

70. 发明授权

US06621553B2 Apparatus and method for exposing substrates 失效
公开(公告)号：US06621553B2
公开(公告)日：2003-09-16
申请号：US09823253
申请日：2001-03-30
申请人： Gregory R. Baxter , Victor M. Jacobo , William J. Pappas
发明人： Gregory R. Baxter , Victor M. Jacobo , William J. Pappas
IPC分类号： G03B2732
CPC分类号： C23F1/02 , G03F7/2022 , G03F7/203
摘要： An apparatus and method for double-sided imaging of a plurality of photoresist-coated substrates is provided. The apparatus includes a first and second substrate holder comprising at least three extendable chucks, each adapted to hold the substrate. The first substrate holder is mounted about a first axis and the second substrate holder is mounted about a second axis such that the at least three chucks are capable of rotation about the first axis between at least a first, second and third chuck positions. A first transfer arm is disposed adjacent the first substrate holder and adapted to transfer the substrate to a chuck of the first substrate holder when the chuck is in the first chuck position. A first mask is positioned adjacent the chuck in the second chuck position of the first substrate holder. A second mask is provided adjacent the chuck in the second chuck position of the second substrate holder. At least one radiation source is provided for emitting radiation through the first and second masks toward the chucks in the second chuck position of each of the first and second substrate holders. A second transfer arm adjacent the second substrate holder and adapted to transfer a substrate from the third chuck position of the second substrate holder.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式