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61. 发明授权

US09511991B2 Encapsulation structure including a mechanically reinforced cap and with a getter effect 有权
标题翻译：封装结构包括机械加强盖和吸气剂效应
公开(公告)号：US09511991B2
公开(公告)日：2016-12-06
申请号：US14331285
申请日：2014-07-15
申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
发明人： Xavier Baillin , Bernard Diem , Jean-Philippe Polizzi , Andre Rouzaud
IPC分类号： B81B7/00 , B81C1/00
CPC分类号： B81B7/0058 , B81B7/0038 , B81B7/0077 , B81B2201/0228 , B81B2207/096 , B81C1/00285 , B81C1/00301 , B81C1/00682 , B81C2201/053 , B81C2203/0136 , B81C2203/0163 , H01L2224/16145 , H01L2224/16225
摘要： A microdevice encapsulation structure arranged in at least one cavity formed between a substrate and a cap rigidly attached to the substrate is provided, the cap including one layer of a first material, one face of which forms an inner wall of the cavity, and mechanical reinforcement portions rigidly attached at least to and partly covering said face, having gas absorption and/or adsorption properties, in which the Young's modulus of a second material of the mechanical reinforcement portions is higher than that of the first material, wherein each of said portions includes at least one first layer of the second material, and at least one second layer of a third metallic getter material such that the first layer of the second material is arranged between the layer of the first material and the second layer of the third material and/or is covered by the second layer of the third material.
摘要翻译：提供了一种微型装置封装结构，其设置在形成在基板和刚性地附接到基板的盖之间的至少一个空腔中，所述盖包括一层第一材料，其一个面形成所述空腔的内壁，并且机械加强至少部分地覆盖所述表面的部分，具有气体吸收和/或吸附性能，其中机械加强部分的第二材料的杨氏模量高于第一材料的杨氏模量，其中每个部分包括第二材料的至少一个第一层和第三金属吸气剂材料的至少一个第二层，使得第二材料的第一层布置在第一材料的层和第三材料的第二层之间和/ 或被第三材料的第二层覆盖。

62. 发明授权

US09487396B2 Release chemical protection for integrated complementary metal-oxide-semiconductor (CMOS) and micro-electro-mechanical (MEMS) devices 有权
标题翻译：释放用于集成的互补金属氧化物半导体（CMOS）和微机电（MEMS）器件的化学保护
公开(公告)号：US09487396B2
公开(公告)日：2016-11-08
申请号：US14477451
申请日：2014-09-04
申请人： INVENSENSE, INC.
发明人： Michael J. Daneman , Fariborz Assaderaghi
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00246 , B81B7/0025 , B81B7/007 , B81B2207/015 , B81C1/00531 , B81C1/00539 , B81C1/00801 , B81C2201/0132 , B81C2201/0133 , B81C2201/053 , B81C2203/0735
摘要： Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.
摘要翻译：提供了保护CMOS层免于暴露于释放化学品的系统和方法。释放化学品用于释放与CMOS晶片集成的微机电（MEMS）器件。在互补金属氧化物半导体（CMOS）晶片中产生的钝化开口的侧壁暴露了CMOS释放化学品接触时可能损坏的CMOS晶片的电介质层。在一个方面，为了保护CMOS晶片并防止电介质层的暴露，钝化开口的侧壁可以被抵抗释放化学品的金属阻挡层覆盖。另外或可选地，可以在CMOS晶片的表面上沉积绝缘阻挡层，以保护钝化层免于暴露于释放化学品。

63. 发明申请

US20160244323A1 Integrated MEMS Device 有权
标题翻译：集成MEMS器件
公开(公告)号：US20160244323A1
公开(公告)日：2016-08-25
申请号：US15144896
申请日：2016-05-03
申请人： Asia Pacific Microsystems, Inc.
发明人： Jerwei Hsieh
IPC分类号： B81B7/00
CPC分类号： B81B7/0038 , B81B7/0058 , B81B2201/032 , B81C1/00238 , B81C1/00817 , B81C1/00825 , B81C2201/053 , B81C2201/056 , B81C2203/0785
摘要： An integrated MEMS device is provided. The integrated MEMS device comprises a circuit chip and a device chip. The circuit chip has a patterned first bonding layer disposed thereon, the bonding layer being composed of a conductive material/materials. The device chip has a first structural layer and a second structural layer, the first structural layer being connected to the second structural layer and the first bonding layer of the circuit chip, and being sandwiched between the second structural layer and the circuit chip. A plurality of hermetic spaces are enclosed by the first structural layer, the second structural layer, the first bonding layer and the circuit chip.
摘要翻译：提供集成的MEMS器件。集成MEMS器件包括电路芯片和器件芯片。电路芯片具有设置在其上的图案化第一接合层，接合层由导电材料/材料构成。器件芯片具有第一结构层和第二结构层，第一结构层连接到电路芯片的第二结构层和第一结合层，并夹在第二结构层和电路芯片之间。第一结构层，第二结构层，第一结合层和电路芯片包围多个封闭空间。

64. 发明授权

US09359193B2 Method for manufacturing an integrated MEMS device 有权
标题翻译：集成MEMS器件的制造方法
公开(公告)号：US09359193B2
公开(公告)日：2016-06-07
申请号：US14165752
申请日：2014-01-28
申请人： Asia Pacific Microsystems, Inc.
发明人： Jerwei Hsieh
IPC分类号： H01L21/4763 , B81C1/00 , B81B7/00
CPC分类号： B81B7/0038 , B81B7/0058 , B81B2201/032 , B81C1/00238 , B81C1/00817 , B81C1/00825 , B81C2201/053 , B81C2201/056 , B81C2203/0785
摘要： An integrated MEMS device and its manufacturing method are provided. In the manufacturing method, the sacrificial layer is used to integrate the MEMS wafer and the circuit wafer. The advantage of the present invention comprises preventing films on the circuit wafer from being damaged during process. By the manufacturing method, a mechanically and thermally stable structure material, for example: monocrystalline silicon and polysilicon, can be used. The integrated MEMS device manufactured can also possess the merit of planar top-surface topography with high fill factor. The manufacturing method is especially suitable for manufacturing MEMS array device.
摘要翻译：提供集成的MEMS器件及其制造方法。在制造方法中，牺牲层用于集成MEMS晶片和电路晶片。本发明的优点包括防止电路晶片上的膜在加工过程中被损坏。通过制造方法，可以使用机械和热稳定的结构材料，例如：单晶硅和多晶硅。制造的集成MEMS器件也可以具有高填充因子的平面顶表面形貌的优点。该制造方法特别适用于制造MEMS阵列器件。

65. 发明申请

US20160157038A1 Structure and Method for Integrated Microphone 有权
标题翻译：集成麦克风的结构和方法
公开(公告)号：US20160157038A1
公开(公告)日：2016-06-02
申请号：US15018625
申请日：2016-02-08
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Jung-Huei Peng , Chia-Hua Chu , Chun-wen Cheng , Chin-Yi Cho , Li-Min Hung , Yao-Te Huang
IPC分类号： H04R31/00 , B81C1/00
CPC分类号： H04R31/003 , B81C1/00158 , B81C2201/0125 , B81C2201/013 , B81C2201/053 , B81C2203/036 , H04R19/005 , H04R19/04 , H04R31/006 , H04R2201/003 , H04R2307/027
摘要： The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.
摘要翻译：本公开提供了集成麦克风结构的一个实施例。集成麦克风结构包括图案化为第一板的第一硅衬底。形成在第一硅衬底的一侧上的氧化硅层。第二硅衬底通过氧化硅层与第一衬底结合，使得氧化硅层夹在第一和第二硅衬底之间。一个膜片，其固定在氧化硅层上并且设置在第一和第二硅衬底之间，使得第一板和隔膜被配置成形成电容式麦克风。

66. 发明申请

US20160068388A1 RELEASE CHEMICAL PROTECTION FOR INTEGRATED COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) AND MICRO-ELECTRO-MECHANICAL (MEMS) DEVICES 有权
标题翻译：用于集成的补充金属氧化物半导体（CMOS）和微机电（MEMS）器件的化学保护
公开(公告)号：US20160068388A1
公开(公告)日：2016-03-10
申请号：US14477451
申请日：2014-09-04
申请人： INVENSENSE, INC.
发明人： Michael J. Daneman , Fariborz Assaderaghi
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00246 , B81B7/0025 , B81B7/007 , B81B2207/015 , B81C1/00531 , B81C1/00539 , B81C1/00801 , B81C2201/0132 , B81C2201/0133 , B81C2201/053 , B81C2203/0735
摘要： Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.
摘要翻译：提供了保护CMOS层免于暴露于释放化学品的系统和方法。释放化学品用于释放与CMOS晶片集成的微机电（MEMS）器件。在互补金属氧化物半导体（CMOS）晶片中产生的钝化开口的侧壁暴露了CMOS释放化学品接触时可能损坏的CMOS晶片的电介质层。在一个方面，为了保护CMOS晶片并防止电介质层的暴露，钝化开口的侧壁可以被抵抗释放化学品的金属阻挡层覆盖。另外或可选地，可以在CMOS晶片的表面上沉积绝缘阻挡层，以保护钝化层免于暴露于释放化学品。

67. 发明授权

US09235046B2 Low-voltage MEMS shutter assemblies 有权
标题翻译：低压MEMS快门组件
公开(公告)号：US09235046B2
公开(公告)日：2016-01-12
申请号：US13754548
申请日：2013-01-30
申请人： Pixtronix, Inc.
发明人： Javier Villarreal , Timothy J. Brosnihan , Jasper L. Steyn , Richard S. Payne , Stephen R. Lewis
IPC分类号： G06F3/038 , G09G5/00 , G02B26/02 , G09G3/22 , B81B3/00
CPC分类号： G02B26/02 , B81B3/007 , B81B2201/045 , B81B2203/0163 , B81B2203/051 , B81C2201/053 , B81C2201/112 , G02B26/023 , G09G3/22
摘要： This disclosure provides systems, methods and apparatus for providing relatively thinner and less stiff compliant beams for a shutter assembly. A protective coating is deposited and patterned over the shutter assembly before it is released from a sacrificial mold over which the shutter assembly is formed. Because some primary surfaces of the compliant beams are in contact with the sacrificial mold, these primary surfaces are not coated with the protective coating. Therefore, when the shutter assembly is finally released, the resulting compliant beams are relatively thinner and less stiff providing a reduction in an actuation voltage used to operate the shutter assembly. In some instances, the protective coating is patterned into discontinuous segments before release.
摘要翻译：本公开提供了用于为快门组件提供相对较薄且较不硬的柔性梁的系统，方法和装置。在从快门组件形成的牺牲模具释放之前，将保护涂层沉积并在其上形成图案。由于柔性梁的一些主表面与牺牲模具接触，所以这些主表面没有涂覆保护涂层。因此，当快门组件最终被释放时，所产生的柔性梁相对较薄并且较不硬，从而降低用于操作闸板组件的致动电压。在一些情况下，保护性涂层在释放之前被图案化成不连续段。

68. 发明授权

US09199837B2 Acoustic sensor and method of manufacturing the same 有权
标题翻译：声传感器及其制造方法
公开(公告)号：US09199837B2
公开(公告)日：2015-12-01
申请号：US13104387
申请日：2011-05-10
申请人： Takashi Kasai , Nobuyuki Iida , Tomofumi Nakamura
发明人： Takashi Kasai , Nobuyuki Iida , Tomofumi Nakamura
IPC分类号： B81B7/00 , H04R19/00 , H04R31/00
CPC分类号： B81B7/0016 , B81B2201/0257 , B81B2207/012 , B81C2201/053 , H01L2224/48091 , H01L2224/48137 , H01L2224/8592 , H01L2924/16151 , H04R19/005 , H04R31/00 , H01L2924/00014
摘要： In an acoustic sensor, a diaphragm arranged on an upper side of a silicon substrate includes a back chamber, and an anchor supports the diaphragm. An insulating plate portion fixed to an upper surface of the silicon substrate covers the diaphragm with a gap. A conductive fixed electrode film arranged on a lower surface of the plate portion configures a back plate. The change in electrostatic capacitance between the fixed electrode film and the diaphragm outputs to the outside from a fixed side electrode pad and a movable side electrode pad as an electric signal. A protective film is arranged continuously with the plate portion at an outer periphery of the plate portion. The protective film covers the outer peripheral part of the upper surface of the silicon substrate, and the outer periphery of the protective film coincides with the outer periphery of the upper surface of the silicon substrate.
摘要翻译：在声学传感器中，布置在硅衬底的上侧的隔膜包括后室，并且锚固件支撑隔膜。固定在硅基板的上表面的绝缘板部分以间隙覆盖隔膜。布置在板部的下表面上的导电固定电极膜构成背板。固定电极膜和隔膜之间的静电电容的变化从固定侧电极焊盘和可动侧电极焊盘作为电信号输出到外部。保持膜在板部的外周与板部连续配置。保护膜覆盖硅基板的上表面的外周部，保护膜的外周与硅基板的上表面的外周重合。

69. 发明申请

US20150274514A1 Integrated Mems Device and Its Manufacturing Method 有权
标题翻译：集成存储器件及其制造方法
公开(公告)号：US20150274514A1
公开(公告)日：2015-10-01
申请号：US14165752
申请日：2014-01-28
申请人： Asia Pacific Microsystems, Inc.
发明人： Jerwei Hsieh
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81B7/0038 , B81B7/0058 , B81B2201/032 , B81C1/00238 , B81C1/00817 , B81C1/00825 , B81C2201/053 , B81C2201/056 , B81C2203/0785
摘要： An integrated MEMS device and its manufacturing method are provided. In the manufacturing method, the sacrificial layer is used to integrate the MEMS wafer and the circuit wafer. The advantage of the present invention comprises preventing films on the circuit wafer from being damaged during process. By the manufacturing method, a mechanically and thermally stable structure material, for example: monocrystalline silicon and polysilicon, can be used. The integrated MEMS device manufactured can also possess the merit of planar top-surface topography with high fill factor. The manufacturing method is especially suitable for manufacturing MEMS array device.
摘要翻译：提供集成的MEMS器件及其制造方法。在制造方法中，牺牲层用于集成MEMS晶片和电路晶片。本发明的优点包括防止电路晶片上的膜在加工过程中被损坏。通过制造方法，可以使用机械和热稳定的结构材料，例如：单晶硅和多晶硅。制造的集成MEMS器件也可以具有高填充因子的平面顶表面形貌的优点。该制造方法特别适用于制造MEMS阵列器件。

70. 发明申请

US20150097215A1 MECHANISMS FOR FORMING MICRO-ELECTRO MECHANICAL SYSTEM DEVICE 有权
标题翻译：用于形成微电子机械系统装置的机构
公开(公告)号：US20150097215A1
公开(公告)日：2015-04-09
申请号：US14049988
申请日：2013-10-09
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Chia-Hua CHU , Chun-Wen CHENG
IPC分类号： B81B7/00 , B81C3/00
CPC分类号： B81C1/00238 , B81B7/0035 , B81B7/0041 , B81C1/00793 , B81C2201/013 , B81C2201/053 , B81C2203/0118 , B81C2203/0792
摘要： Embodiments of mechanisms for forming a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a CMOS substrate and a MEMS substrate bonded with the CMOS substrate. The CMOS substrate includes a semiconductor substrate, a first dielectric layer formed over the semiconductor substrate, and a plurality of conductive pads formed in the first dielectric layer. The MEMS substrate includes a semiconductor layer having a movable element and a second dielectric layer formed between the semiconductor layer and the CMOS substrate. The MEMS substrate also includes a closed chamber surrounding the movable element. The MEMS substrate further includes a blocking layer formed between the closed chamber and the first dielectric layer of the CMOS substrate. The blocking layer is configured to block gas, coming from the first dielectric layer, from entering the closed chamber.
摘要翻译：提供了用于形成微机电系统（MEMS）装置的机构的实施例。 MEMS器件包括CMOS衬底和与CMOS衬底结合的MEMS衬底。 CMOS衬底包括半导体衬底，形成在半导体衬底上的第一介电层和形成在第一介电层中的多个导电焊盘。 MEMS衬底包括具有可移动元件的半导体层和形成在半导体层和CMOS衬底之间的第二电介质层。 MEMS基板还包括围绕可移动元件的封闭室。 MEMS基板还包括形成在封闭室和CMOS基板的第一介电层之间的阻挡层。阻挡层被构造成阻挡来自第一介电层的气体进入封闭室。

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