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61. 发明授权

US4984033A Thin film semiconductor device with oxide film on insulating layer 失效
标题翻译：绝缘层上具有氧化膜的薄膜半导体器件
公开(公告)号：US4984033A
公开(公告)日：1991-01-08
申请号：US287146
申请日：1988-12-21
申请人： Akira Ishizu , Tadashi Nishimura , Yasuo Inoue
发明人： Akira Ishizu , Tadashi Nishimura , Yasuo Inoue
IPC分类号： H01L27/12 , H01L21/20 , H01L21/205 , H01L21/263 , H01L21/336 , H01L21/77 , H01L21/84 , H01L29/78 , H01L29/786
CPC分类号： H01L21/0262 , H01L21/0242 , H01L21/02491 , H01L21/02532 , H01L21/02639 , H01L27/1214 , H01L29/66757 , H01L29/78633 , Y10S148/091 , Y10S148/093
摘要： A thin film semiconductor device is formed by preparing a substrate, forming a pattern of metal thin film on the substrate, forming an insulating layer on the metal thin film, and forming a pattern of a semiconductor thin film active layer over the pattern of the metal thin film by laser CVD.

62. 发明授权

US4914628A Semiconductor memory device having substrate isolation of a switching transistor and storage capacitor 失效
标题翻译：具有开关晶体管和存储电容器的衬底隔离的半导体存储器件
公开(公告)号：US4914628A
公开(公告)日：1990-04-03
申请号：US124429
申请日：1987-11-18
申请人： Tadashi Nishimura
发明人： Tadashi Nishimura
IPC分类号： H01L27/10 , H01L21/8242 , H01L27/108
CPC分类号： H01L27/10841
摘要： A semiconductor memory has a first insulating layer formed on one major surface of a silicon single crystal substrate having a hole portion. The hole portion is filled with a material of a first conductivity type up to the depth of the first insulating layer. A first single crystal silicon layer is formed on the first insulating layer and a diffused region of the first single crystal silicon layer is formed on the first insulating layer and on the material of a first conductivity type. Source and drain regions are formed by doping the first single crystal silicon layer with a first impurity up to high degree of concentration. A second insulating layer is then formed on the first single crystal silicon layer with a low resistive portion formed on this second insulating layer to form source and drain regions. A second single crystal silicon layer is formed along the wall surfaces of the second insulating layer and the low resistive portion. A gate insulating film is formed along wall surfaces of the second single crystal silicon layer and the diffused region on the low resistive portion and having the hole portion on the material of a first conductivity type. Finally, a gate electrode is formed by filling the hole portion of the gate insulating film with the material of a first conductivity type.
摘要翻译：半导体存储器具有形成在具有孔部分的硅单晶衬底的一个主表面上的第一绝缘层。孔部分填充有直到第一绝缘层的深度的第一导电类型的材料。在第一绝缘层上形成第一单晶硅层，并且在第一绝缘层和第一导电类型的材料上形成第一单晶硅层的扩散区域。源极和漏极区通过以高浓度浓度掺杂第一杂质的第一单晶硅层而形成。然后在第一单晶硅层上形成第二绝缘层，在该第二绝缘层上形成低电阻部分以形成源区和漏区。沿着第二绝缘层和低电阻部分的壁表面形成第二单晶硅层。栅极绝缘膜沿着第二单晶硅层的壁表面和低电阻部分上的扩散区域形成，并且在第一导电类型的材料上具有孔部分。最后，通过用第一导电类型的材料填充栅极绝缘膜的孔部分来形成栅电极。

63. 发明授权

US4861418A Method of manufacturing semiconductor crystalline layer 失效
标题翻译：半导体晶体层的制造方法
公开(公告)号：US4861418A
公开(公告)日：1989-08-29
申请号：US22402
申请日：1987-03-06
申请人： Tadashi Nishimura , Yasuo Inoue , Kazuyuki Sugahara , Shigeru Kusunoki
发明人： Tadashi Nishimura , Yasuo Inoue , Kazuyuki Sugahara , Shigeru Kusunoki
IPC分类号： H01L21/20 , H01L21/263 , H01L21/268 , H01L21/762 , H01L29/04
CPC分类号： H01L29/045 , H01L21/2026 , H01L21/268 , H01L21/76248 , Y10S117/904
摘要： A method of manufacturing a semiconductor crystalline layer comprising the following steps: a step of forming, on a single crystalline substrate composed of a semiconductor having a main face on face and having a diamond-type crystal structure, an orientation flat face in which the direction of the intersection with the main face makes a predetermined angle relative to the direction on the main face and which serves as a reference for defining the direction of arranging semiconductor chips formed on the substrate; a step of forming, on the main face of the substrate, an insulation layer at least a portion of which has an opening reaching the main face and which insulates the substrate at the region other than the opening; a step of forming a semiconductor layer composed of a polycrystalline or amorphous semiconductor on the surface of the opening and the insulation layer; a step of forming a reflectivity varying layer which is in the direction in parallel with or vertical to the intersection between the orientation flat face and the main face, has the width and the distance in a predetermined period and is set so as to show periodical reflectivity variation to the argon laser beams; and a step of scanning the argon laser beams under continuous irradiation by way of the reflectivity varying layer to the semiconductor layer in the direction identical with or at an angle within a certain permissible range to the direction of the main face or the direction equivalent thereto.
摘要翻译：一种制造半导体结晶层的方法，包括以下步骤：在由具有主面的具有金刚石型晶体结构的半导体构成的单晶衬底上形成取向平面其与主面的交点的方向相对于主面上的方向<110>成预定角度，并且作为用于限定形成在基板上的半导体芯片的排列方向的基准; 在所述基板的主面上形成绝缘层的步骤，所述绝缘层的至少一部分具有到达所述主面的开口，并且使所述基板与所述开口以外的区域绝缘; 在开口和绝缘层的表面上形成由多晶或非晶半导体构成的半导体层的步骤; 在与定向平面和主面之间的交叉部分平行或垂直的方向上形成反射率变化层的步骤具有在预定时间段内的宽度和距离，并且被设置为显示周期性反射率对氩激光束的变化; 以及通过所述反射率变化层在与所述主面或所述主面的方向<110>的一定允许范围内相同或成一定角度的方向将所述氩激光束扫描到所述半导体层的步骤相当于此。

64. 发明授权

US4797723A Stacked semiconductor device 失效
标题翻译：堆叠半导体器件
公开(公告)号：US4797723A
公开(公告)日：1989-01-10
申请号：US96212
申请日：1987-09-08
申请人： Tadashi Nishimura , Yoichi Akasaka
发明人： Tadashi Nishimura , Yoichi Akasaka
IPC分类号： H01L27/00 , H01L25/065 , H01L27/14 , H01L27/02 , H01L29/04 , H01L29/06 , H01L29/78
CPC分类号： H01L25/0657 , H01L2225/06589 , H01L2924/0002 , Y10S148/164
摘要： A stacked semiconductor device includes a first integrated circuit formed on the principal surface of a semiconductor layer and containing active elements, and a second integrated circuit formed on the first integrated circuit through an insulation layer and containing active elements. The second integrated circuit is formed on that part of the surface of the first integrated circuit which is exclusive of selected active elements, to establish an open space for heat dissipation.
摘要翻译：叠层半导体器件包括形成在半导体层的主表面上并包含有源元件的第一集成电路，以及通过绝缘层形成在第一集成电路上并包含有源元件的第二集成电路。第二集成电路形成在第一集成电路的除选择的有源元件之外的部分表面上，以建立用于散热的开放空间。

65. 发明授权

US4514895A Method of forming field-effect transistors using selectively beam-crystallized polysilicon channel regions 失效
标题翻译：使用选择性束结晶多晶硅沟道区形成场效应晶体管的方法
公开(公告)号：US4514895A
公开(公告)日：1985-05-07
申请号：US586861
申请日：1984-03-06
申请人： Tadashi Nishimura
发明人： Tadashi Nishimura
IPC分类号： H01L27/00 , H01L21/02 , H01L21/20 , H01L21/263 , H01L21/336 , H01L27/12 , H01L29/78 , H01L29/786 , H01L21/265 , H01L21/306 , H01L21/268
CPC分类号： H01L29/78 , H01L21/2026 , H01L21/2636 , H01L29/78654
摘要： A method of manufacturing MOS field-effect transistors using a wafer (40) having a polycrystal or amorphous semiconductor layer formed on an insulator comprises a step in which an energy beam (44) is applied to the semiconductor layer by scanning the beam intermittently and correlatively to the wafer so as to heat locally the semiconductor layer whereby only a plurality of portions (41) contained in the semiconductor layer and assigned for forming channel regions of MOS field-effect transistors are monocrystallized or the crystalline grains in the above described positions are made large. According to the present invention, a strain occurring in a recrystallized semiconductor can be mitigated by the selective heating.
摘要翻译：使用在绝缘体上形成多晶体或非晶半导体层的晶片（40）制造MOS场效应晶体管的方法包括以下步骤：通过间歇地并相关地扫描光束将能量束（44）施加到半导体层以便半导体层局部加热，由此只有包含在半导体层中并被分配用于形成MOS场效应晶体管的沟道区的多个部分（41）被单晶化或者在上述位置中形成晶粒大。根据本发明，通过选择性加热可以减轻再结晶半导体中产生的应变。

66. 发明授权

US4414242A Process for fabricating a semiconductor device 失效
标题翻译：制造半导体器件的工艺
公开(公告)号：US4414242A
公开(公告)日：1983-11-08
申请号：US444095
申请日：1982-11-24
申请人： Tadashi Nishimura , Yoji Mashiko
发明人： Tadashi Nishimura , Yoji Mashiko
IPC分类号： H01L27/12 , H01L21/02 , H01L21/20 , H01L21/263 , H01L21/268 , H01L21/336 , H01L21/762 , H01L21/86 , H01L29/786 , B05D3/06
CPC分类号： H01L21/86 , H01L21/2026 , H01L21/2636 , H01L21/268 , H01L21/76264 , H01L21/76272 , H01L21/76281 , Y10S117/904 , Y10S148/091 , Y10S148/093
摘要： A process for producing a semiconductor device includes the step of locally heating and fusing an island of a polycrystalline or amorphous semiconductor layer which is formed on and surrounded by an insulator. In the process, at least one ridge is formed on the underlying insulator before the formation of the semiconductor layer.
摘要翻译：制造半导体器件的方法包括：局部加热和熔融形成在绝缘体上并被绝缘体包围的多晶或非晶半导体层的岛。在该过程中，在形成半导体层之前，在下面的绝缘体上形成至少一个脊。

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