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1. 发明授权

US06489222B2 Method of manufacturing a semiconductor device 有权
公开(公告)号：US06489222B2
公开(公告)日：2002-12-03
申请号：US09866743
申请日：2001-05-30
申请人： Satoshi Yoshimoto
发明人： Satoshi Yoshimoto
IPC分类号： H01L2146
CPC分类号： H01L21/02686 , H01L21/02422 , H01L21/02488 , H01L21/02532 , H01L21/2026 , H01L29/4908 , H01L29/66757 , H01L29/78675 , H01L29/78684 , Y10S148/093
摘要： A first insulating layer is embedded within a semiconductor film formed on a base insulating film, a second insulating layer is formed on a portion of the semiconductor film, and a laser beam is irradiated from the top side (or from both the top side and the bottom side) of the substrate. A thermal gradient develops in the semiconductor film due to the thermal insulating effect of the base insulating film, due to the thermal insulating effect of the first insulating layer, and due to the antireflection effect and thermal insulating effect of the second insulating layer. The location and direction of lateral growth of crystal nuclei are controlled by utilizing these effects, and large size crystal grains can be obtained.

2. 发明申请

US20020022350A1 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20020022350A1
公开(公告)日：2002-02-21
申请号：US09120244
申请日：1998-07-22
发明人： HISASHI OHTANI , TAMAE TAKANO , CHIHO KOKUBO
IPC分类号： H01L021/00 , H01L021/84 , C30B001/00 , H01L021/20 , H01L021/36
CPC分类号： H01L21/02672 , C30B1/023 , H01L21/02422 , H01L21/02532 , H01L21/2022 , H01L27/12 , H01L27/1277 , H01L29/04 , Y10S148/09 , Y10S148/091 , Y10S148/093
摘要： To effectively crystallize an amorphous semiconductor film comprising silicon by utilizing nickel element and remove nickel element contributed to the crystallization, a mask 103 is provided on an amorphous silicon film 102, oxide film patterns 107 and 108 including nickel are formed, phosphorus is doped in a region 109, thereafter, heating is performed, nickel element is diffused via paths 110 and 111 and nickel element diffuses in the amorphous silicon film and gettered by phosphorus at the region 109 by which crystallization of diffusion of nickel and gettering of nickel can be carried out simultaneously.
摘要翻译：为了通过利用镍元素有效地结晶包含硅的非晶半导体膜，并除去有助于结晶的镍元素，在非晶硅膜102上提供掩模103，形成包括镍的氧化物膜图案107和108，磷掺杂在区域109之后，进行加热，镍元素通过路径110和111扩散，镍元素在非晶硅膜中扩散并在区域109被磷吸收，由此可以进行镍的扩散和镍的吸杂的结晶化同时。

3. 发明授权

US5877526A Semiconductor device having polysilicon thin-film 失效
标题翻译：具有多晶硅薄膜的半导体器件
公开(公告)号：US5877526A
公开(公告)日：1999-03-02
申请号：US851404
申请日：1997-05-05
申请人： Michiya Yamaguchi
发明人： Michiya Yamaguchi
IPC分类号： H01L21/20 , H01L21/336 , H01L29/786 , H01L29/792
CPC分类号： H01L21/2026 , H01L29/66757 , H01L29/78675 , Y10S148/093
摘要： In the crystal structure of a polysilicon thin film having a field effect mobility .mu..sub.FE of about 80 cm.sup.2 /V.sec, a grain size is about 200 nm and a crystallite size on the (111) plane is about 180 nm. The crystal size corresponds to the size of a completely monocrystallized portion of a grain. The condition of obtaining a field effect mobility .mu..sub.FE of about 80 cm.sup.2 /V.sec is that the crystallite size on the (111) plane is at least 180 nm (measured value). By taking the crystallite size into consideration, it becomes possible to achieve a high field effect mobility .mu..sub.FE which cannot be obtained merely by increasing the grain size.
摘要翻译：在具有约80cm 2 / V·sec的场效应迁移率μFE的多晶硅薄膜的晶体结构中，晶粒尺寸为约200nm，（111）面上的微晶尺寸为约180nm。晶体尺寸对应于颗粒的完全单晶化部分的尺寸。获得约80cm 2 / V·sec的场效应迁移率μFE的条件是（111）面上的微晶尺寸为至少180nm（测量值）。通过考虑微晶尺寸，可以实现仅通过增加晶粒尺寸而不能获得的高场效应迁移率μFE。

4. 发明授权

US5756364A Laser processing method of semiconductor device using a catalyst 失效
标题翻译：使用催化剂的半导体器件的激光加工方法
公开(公告)号：US5756364A
公开(公告)日：1998-05-26
申请号：US562274
申请日：1995-11-22
申请人： Koichiro Tanaka , Naoaki Yamaguchi
发明人： Koichiro Tanaka , Naoaki Yamaguchi
IPC分类号： G02F1/1362 , G03F7/00 , G03F7/20 , H01L21/20 , H01L21/77 , H01L21/84 , H01L21/268
CPC分类号： H01L21/2026 , G03F7/0007 , G03F7/2006 , G03F7/704 , G03F7/70425 , H01L27/1214 , G02F1/13454 , Y10S117/904 , Y10S148/09 , Y10S148/093
摘要： It is intended to provide a technique of separately forming thin-film transistors disposed in a peripheral circuit area and those disposed in a pixel area in accordance with characteristics required therefor in a manufacturing process of semiconductor devices to constitute a liquid crystal display device. In an annealing step by laser light illumination, laser light is selectively applied to a semiconductor thin-film by partially masking it. For example, to illuminate the peripheral circuit area and the pixel area with laser light under different conditions in manufacture of an active matrix liquid crystal display device, laser light is applied at necessary illumination energy densities by using a mask. In this manner, a crystalline silicon film having a necessary degree of crystallinity in a selective manner can be obtained.
摘要翻译：旨在提供一种在半导体器件的制造工艺中根据所需的特性分别形成设置在外围电路区域中的薄膜晶体管和设置在像素区域中的技术，以构成液晶显示装置。在通过激光照射的退火步骤中，通过部分地掩蔽激光将半导体薄膜选择性地施加激光。例如，为了在有源矩阵型液晶显示装置的制造中，在不同条件下用激光照射外围电路区域和像素区域，通过使用掩模以必要的照射能量密度施加激光。以这种方式，可以获得具有选择性的必需结晶度的结晶硅膜。

5. 发明授权

US5492861A Process for applying structured layers using laser transfer 失效
标题翻译：使用激光转印应用结构化层的工艺
公开(公告)号：US5492861A
公开(公告)日：1996-02-20
申请号：US112711
申请日：1993-08-26
申请人： Hans Opower
发明人： Hans Opower
IPC分类号： C23C14/00 , C23C14/22 , G03F7/16 , H01L21/203 , H01L21/268 , H01L21/283 , H01L21/285 , C23C14/14
CPC分类号： C23C14/048 , C23C14/28 , G03F7/16 , H01L21/2855 , Y10S148/093 , Y10S438/94
摘要： In order to provide a process for applying structured layers of a functional structure of a semiconductor component, with which structured layers of a functional structure of a semiconductor component can be produced as simply as possible and with as little susceptibility as possible with respect to the quality of the semiconductor components, it is suggested that a material film be arranged above a surface region of a process substrate to be provided with the structured layer, that the material film be acted upon on its side remote from the process substrate by a focus of a laser beam located in a defined position corresponding to the structured layer to be produced and that with the laser beam in the region of the focus the material from the material film migrate to the surface region.
摘要翻译：为了提供一种用于施加半导体部件的功能结构的结构层的工艺，半导体部件的功能结构的结构层可以尽可能简单地制造，并且在质量上尽可能少的敏感性的半导体部件，建议将材料膜布置在处理基板的表面区域之上，以提供结构化层，使材料膜通过焦点位于远离处理基板的一侧激光束位于对应于要产生的结构化层的限定位置，并且激光束在聚焦区域中，材料膜的材料迁移到表面区域。

6. 发明授权

US5455203A Method of adjusting the pressure detection value of semiconductor pressure switches 失效
标题翻译：调整半导体压力开关压力检测值的方法
公开(公告)号：US5455203A
公开(公告)日：1995-10-03
申请号：US16767
申请日：1993-02-11
申请人： Osamu Koseki , Yoshifumi Yoshida
发明人： Osamu Koseki , Yoshifumi Yoshida
IPC分类号： B81B3/00 , H01H1/00 , H01H35/26 , H01H35/34 , H01L21/465
CPC分类号： H01H35/34 , H01H1/0036 , H01H35/2607 , Y10S148/093
摘要： A method of adjusting a semiconductor pressure switch of the type having a silicon substrate having a pressure receiving diaphragm includes mounting and pressurizing the semiconductor pressure switch in a pressure chamber and measuring the pressure of the switch to determine if the pressure is above or below the predetermined pressure detection value. If the measured pressure is above the predetermined pressure detection value, the thickness of the diaphragm is adjusted by thinning the diaphragm to adjust the measured pressure to the predetermined pressure detection value. If the measured pressure is below the predetermined pressure detection value, the thickness of the diaphragm is adjusted by thickenning the diaphragm to adjust the measured pressure to the predetermined pressure detection value.
摘要翻译：一种调节具有具有压力接收膜的硅衬底的半导体压力开关的方法包括：在压力室中安装并加压半导体压力开关并测量开关的压力，以确定压力是否高于或低于预定值压力检测值。如果测量的压力高于预定压力检测值，则通过使隔膜变薄来调节隔膜的厚度，以将测量的压力调节到预定压力检测值。如果测量的压力低于预定的压力检测值，则通过增厚隔膜来调节隔膜的厚度，以将测量的压力调节到预定的压力检测值。

7. 发明授权

US5371381A Process for producing single crystal semiconductor layer and semiconductor device produced by said process 失效
标题翻译：通过所述方法制造单晶半导体层和半导体器件的制造方法
公开(公告)号：US5371381A
公开(公告)日：1994-12-06
申请号：US587500
申请日：1990-09-24
申请人： Kazuyuki Sugahara , Tadashi Nishimura , Shigeru Kusunoki , Yasuo Inoue
发明人： Kazuyuki Sugahara , Tadashi Nishimura , Shigeru Kusunoki , Yasuo Inoue
IPC分类号： H01L21/20 , H01L21/268 , H01L21/822 , H01L29/04 , H01L27/04
CPC分类号： H01L21/8221 , H01L21/2026 , H01L21/268 , H01L29/045 , Y10S117/904 , Y10S148/09 , Y10S148/091 , Y10S148/093
摘要： Disclosed herein is a process for producing a single crystal layer of a semiconductor device, which comprises the steps of providing an oxide insulator layer separated by an opening part for seeding, on a major surface of a single crystal semiconductor substrate of the cubic system, providing a polycrystalline or amorphous semiconductor layer on the entire surface of the insulator layer inclusive of the opening part, then providing a protective layer comprising at least a reflective or anti-reflection film comprising stripes of a predetermined width, in a predetermined direction relative to the opening part and at a predetermined interval, the protective layer capable of controlling the temperature distributions in the semiconductor layer at the parts corresponding to the stripes or the parts not corresponding to the stripes, thereby completing a base for producing a semiconductor device, thereafter the surface of the base is irradiated with an energy beam through the striped reflective or anti-reflection film to melt the polycrystalline or amorphous semiconductor and scanning the energy beam in a predetermined direction such that the direction of the crystal of the semiconductor re-solidified and converted into a single crystal accords with a {111} plane, to produce the single crystal of the semiconductor device. Also disclosed is a semiconductor device produced by the method, which comprises a single crystal layer having a wide range of a crystal in a predetermined direction relative to the facial orientation of the major surface of the substrate, and has a three-dimensional semiconductor circuit element construction.
摘要翻译：本发明公开了一种制造半导体器件的单晶层的方法，其包括以下步骤：在立方晶系的单晶半导体衬底的主表面上提供由用于接种的开口部分开的氧化物绝缘体层，提供在包括开口部分的绝缘体层的整个表面上的多晶或非晶半导体层，然后提供保护层，该保护层至少包括反射膜或防反射膜，该反射膜或防反射膜包含预定宽度的条，相对于开口部分并且以预定间隔，保护层能够控制对应于条纹的部分或不对应于条纹的部分的半导体层中的温度分布，从而完成用于制造半导体器件的基底，之后，通过条纹反射照射能量束 e或抗反射膜，以熔化多晶或非晶半导体并沿预定方向扫描能量束，使得半导体晶体的方向重新固化并转换成单晶符合{111}面，至产生半导体器件的单晶。还公开了一种通过该方法制造的半导体器件，该半导体器件包括相对于衬底的主表面的面取向在预定方向上具有宽范围的晶体的单晶层，并且具有三维半导体电路元件施工。

8. 发明授权

US5326709A Wafer testing process of a semiconductor device comprising a redundancy circuit 失效
标题翻译：包括冗余电路的半导体器件的晶片测试过程
公开(公告)号：US5326709A
公开(公告)日：1994-07-05
申请号：US993007
申请日：1992-12-18
申请人： Hong-bae Moon , Bon-youl Ku , Gi-seung Song , Tae-wook Seo
发明人： Hong-bae Moon , Bon-youl Ku , Gi-seung Song , Tae-wook Seo
IPC分类号： H01L21/66 , H01L23/544 , G01R31/26
CPC分类号： H01L22/22 , H01L22/20 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , Y10S148/093
摘要： A wafer testing process of a semiconductor device provided with a redundancy circuit. The process comprises a step of removing a passivation film above a pad and link portion, pre-laser testing, laser-repairing, and final quality marking using an off-line inking method. Therefore, fabrication-test processes are simplified to one step by adopting the off-line inking method, thereby achieving productivity improvement, quality enhancement, and reduction of throughput time.
摘要翻译：具有冗余电路的半导体器件的晶片测试工艺。该方法包括使用离线上墨方法去除衬垫和连接部分上方的钝化膜，预激光测试，激光修复和最终质量标记的步骤。因此，通过采用离线上墨方法将制造试验过程简化为一步，从而实现生产率提高，质量提高和生产时间的缩短。

9. 发明授权

US5281553A Method for controlling the state of conduction of an MOS transistor of an integrated circuit 失效
标题翻译：控制集成电路的MOS晶体管的导通状态的方法
公开(公告)号：US5281553A
公开(公告)日：1994-01-25
申请号：US658465
申请日：1991-02-22
申请人： Alain Boudou , Marie-Francois Bonnal , Martine Rouillon-Martin
发明人： Alain Boudou , Marie-Francois Bonnal , Martine Rouillon-Martin
IPC分类号： H01L21/768 , H01L23/525 , H01L21/00 , H01L21/02 , H01L21/26 , H01L21/268
CPC分类号： H01L21/76888 , H01L23/5254 , H01L2924/0002 , Y10S148/091 , Y10S148/093
摘要： The state of conduction of an MOS transistor 11 is definitively controlled by a laser beam 21, by forming an electrical connection 22 between the gate 16 and the subjacent portion d of the source region 14 or drain region 15. The invention is applicable in particular to the correction (reconfiguration, redundancy) of integrated circuits and to the programming of integrated PROMs.
摘要翻译：通过在源极区域14或漏极区域15的栅极16与下部d之间形成电连接22，由激光束21确定地控制MOS晶体管11的导通状态。本发明特别适用于集成电路的校正（重新配置，冗余）和集成PROM的编程。

10. 发明授权

US5231050A Method of laser connection of a conductor to a doped region of the substrate of an integrated circuit 失效
标题翻译：将导体激光连接到集成电路的衬底的掺杂区域的方法
公开(公告)号：US5231050A
公开(公告)日：1993-07-27
申请号：US506995
申请日：1990-04-10
申请人： Alain Boudou , Marie-Francoise Bonnal , Marine Rouillon-Martin
发明人： Alain Boudou , Marie-Francoise Bonnal , Marine Rouillon-Martin
IPC分类号： H01L21/60 , H01L21/768 , H01L23/525
CPC分类号： H01L24/80 , H01L21/76894 , H01L23/5254 , H01L2924/01005 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01033 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , Y10S148/093
摘要： The conductor 15 to be connected to the doped region 12 of the substrate 11 has an edge 15a at which the laser beam 20 is aimed, regulated such as to definitively create a zone of low electrical resistance 19 in the dielectric layer 13 that separates the conductor from the doped region. The invention is particularly applicable to programming by laser of read only memories and defective integrated circuits with a view to correcting them.
摘要翻译：要连接到基板11的掺杂区域12的导体15具有边缘15a，激光束20被瞄准，边缘15a被限制，以在电介质层13中明确地形成低电阻区域19，从掺杂区域。本发明特别适用于仅读存储器和有缺陷的集成电路的激光编程，以便校正它们。

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