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    • 64. 发明授权
    • Method of manufacturing semiconductor device
    • 制造半导体器件的方法
    • US06913976B2
    • 2005-07-05
    • US10659814
    • 2003-09-11
    • Seung Cheol LeeSang Wook Park
    • Seung Cheol LeeSang Wook Park
    • H01L21/8247H01L21/28H01L27/115H01L29/788H01L29/792H10L21/336
    • H01L29/7881H01L21/28247H01L21/28273
    • Disclosed is a method of manufacturing the semiconductor devices. The method comprising the steps of forming a gate electrode on a semiconductor substrate, depositing an oxide film for a spacer on the gate electrode, implementing an anisotropic dry etch process for the oxide film for the spacer to form spacers at the sidewalls of the gate electrode, and implementing a rapid thermal annealing process for the spacers under an oxygen atmosphere in order to segregate hydrogen contained within the spacers toward the surface. Therefore, hydrogen contained within the spacer oxide film is not diffused into the tunnel oxide film and the film quality of the tunnel oxide film is thus improved. As a result, program or erase operation characteristics of the flash memory device and a retention characteristic of the flash memory device could be improved.
    • 公开了半导体器件的制造方法。 该方法包括以下步骤:在半导体衬底上形成栅电极,在栅电极上沉积用于间隔物的氧化物膜,实现用于间隔物的氧化膜的各向异性干蚀刻工艺,以在栅电极的侧壁处形成间隔物 并且在氧气氛下实施用于间隔物的快速热退火工艺,以便将包含在间隔物内的氢气朝向表面分离。 因此,间隔氧化膜中所含的氢不会扩散到隧道氧化膜中,因此隧道氧化膜的膜质量得到改善。 结果,可以提高闪速存储器件的编程或擦除操作特性以及闪速存储器件的保持特性。
    • 67. 发明授权
    • Method for fabricating semiconductor device
    • 制造半导体器件的方法
    • US06753232B2
    • 2004-06-22
    • US10139329
    • 2002-05-07
    • Noh-Yeal KwakSang Wook Park
    • Noh-Yeal KwakSang Wook Park
    • H01L21336
    • H01L21/265H01L21/2236H01L21/2652H01L21/26586H01L29/4941
    • The present invention discloses a method for fabricating a semiconductor device. A stabilized junction is formed by simultaneously adjusting diffusion in a channel direction and a depth direction by restricting transient enhanced diffusion and oxidation enhanced diffusion, and reducing a short channel effect and diffusion in the depth direction, by positioning a nitrified oxide film between a gate electrode and a nitride film spacer formed at side walls of the gate electrode in order to remove defects generated due to stress differences between the gate electrode and the nitride film spacer in a formation process of a PMOS transistor. It is thus possible to form a device having an ultra shallow junction which is not influenced by miniaturization.
    • 本发明公开了一种半导体器件的制造方法。 通过在栅电极之间定位硝化氧化膜,通过同时调节通道方向和深度方向上的扩散,通过限制瞬时增强的扩散和氧化增强的扩散以及减小短沟道效应和深度方向的扩散来形成稳定的结 以及形成在栅电极的侧壁处的氮化物膜间隔物,以便在PMOS晶体管的形成过程中消除由于栅电极和氮化物膜间隔物之间​​的应力差而产生的缺陷。 因此,可以形成不受小型化影响的具有超浅结的装置。
    • 69. 发明授权
    • Method for forming isolation layer in semiconductor device
    • 在半导体器件中形成隔离层的方法
    • US06479367B2
    • 2002-11-12
    • US09893570
    • 2001-06-29
    • Sang Wook Park
    • Sang Wook Park
    • H01L2176
    • H01L21/76237H01L21/31612H01L21/3185
    • A method for forming an isolation layer in a semiconductor device, to avoid the occurrence of an angular formation phenomenon at the edge portions of the upper and lower portions of the trench during formation of a shallow trench isolation layer (STI), so that malfunction of the device and the deterioration of its performance due to a parasitic transistor and leakage current, can be prevented. Advantageously, silicon nitride films are formed at the side wall of the pad oxide film and the surface of trench silicon through a nitrogen (N+) plasma nitrification process, after a trench etching process, for formation of STI, so that the generation of a moat is inhibited and deterioration of the device is prevented. The isolation layer in a semiconductor device is formed by forming a pad oxide film in a wet oxidation process on a silicon substrate, forming a pad nitride film in a low pressure chemical vapor deposition process on the pad oxide film, forming a shallow trench by etching the pad nitride film, the pad oxide film and the silicon substrate to a predetermined depth, forming a silicon nitride film in a nitrogen plasma nitrification process on the inner wall of the trench, filling the trench where the silicon nitride film is formed with an oxide film, and planarizing the pad nitride film and the pad oxide film in a chemical mechanical polishing process so that the silicon substrate can be exposed.
    • 一种用于在半导体器件中形成隔离层的方法,以避免在形成浅沟槽隔离层(STI)期间在沟槽的上部和下部的边缘部分产生角度形成现象,使得故障 可以防止由于寄生晶体管和漏电流引起的器件性能劣化。 有利地,在沟槽蚀刻工艺之后,通过氮(N +)等离子体硝化工艺在衬垫氧化膜的侧壁和沟槽硅的表面上形成氮化硅膜,以形成STI,从而产生护城河 被抑制,并且防止了装置的劣化。 半导体器件中的隔离层通过在硅衬底上形成湿式氧化工艺中的衬垫氧化膜形成,在衬底氧化膜上形成低压化学气相沉积工艺中的衬垫氮化物膜,通过蚀刻形成浅沟槽 衬垫氮化物膜,衬垫氧化物膜和硅衬底到预定深度,在氮等离子体硝化过程中在沟槽的内壁上形成氮化硅膜,填充形成氮化硅膜的沟槽,其中形成氧化物 膜,并且在化学机械抛光工艺中平坦化衬垫氮化物膜和衬垫氧化物膜,使得硅衬底可以暴露。