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    • 65. 发明授权
    • Logic circuit
    • 逻辑电路
    • US4396829A
    • 1983-08-02
    • US204928
    • 1980-11-07
    • Takanori SugiharaMakoto Yoshida
    • Takanori SugiharaMakoto Yoshida
    • G11C19/00H03K21/00H03M9/00H03K21/36H03K23/00
    • H03K23/54G11C19/00
    • A logical circuit which is capable of serving not only as a shift register but also as counter, comprises a cascade-connection of flip-flops of the same number as the number of bits required. The flip-flops have an input connected to a logical gate group composed of gates which are opened and closed by a shift signal and a count signal. The logical circuit does not require that a flip-flop be included for each shift register part and counter part for each bit, but only requires one flip-flop to perform both the count and shift function. The logical circuit is capable of performing an independent operation of a shift register, an independent operation of a counter and a compound operation of inputting data in a serial fashion for initialization and outputting counted data in a serial fashion. With the logical circuit of the present invention, the number of gates used is greatly reduced as compared with the prior art shift register/counter circuit; accordingly, the circuit of the present invention is of particular utility when formed as a large scale integrated circuit.
    • 能够不仅用作移位寄存器而且还用作计数器的逻辑电路包括与所需位数相同数量的触发器的级联连接。 触发器具有连接到由通过移位信号和计数信号打开和​​关闭的门组成的逻辑门组的输入。 逻辑电路不需要为每个位的每个移位寄存器部分和计数器部分包括触发器,但是仅需要一个触发器来执行计数和移位功能。 逻辑电路能够执行移位寄存器的独立操作,计数器的独立操作和以串行方式输入数据的复合操作,用于初始化并以串行方式输出计数数据。 利用本发明的逻辑电路,与现有技术的移位寄存器/计数器电路相比,所使用的门数大大减少; 因此,当形成为大规模集成电路时,本发明的电路特别有用。