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    • 67. 发明授权
    • Dicing tape thermal management by wafer frame support ring cooling during plasma dicing
    • 切割胶带通过晶片框架进行热管理,支持等离子体切割期间的环形冷却
    • US09112050B1
    • 2015-08-18
    • US14276683
    • 2014-05-13
    • Wei-Sheng LeiPrabhat KumarBrad EatonAjay Kumar
    • Wei-Sheng LeiPrabhat KumarBrad EatonAjay Kumar
    • H01L21/00H01L21/82H01L21/3065H01L21/67H01L21/78
    • H01L21/82H01L21/3065H01L21/67H01L21/67069H01L21/67092H01L21/67109H01L21/67207H01L21/78
    • Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves introducing a substrate supported by a substrate carrier into a plasma etch chamber. The substrate has a patterned mask thereon covering integrated circuits and exposing streets of the substrate. The substrate carrier has a backside. The method also involves supporting at least a portion of the backside of the substrate carrier on a chuck of the plasma etch chamber. The method also involves cooling substantially all of the backside of the substrate carrier, the cooling involving cooling at least a first portion of the backside of the substrate carrier by the chuck. The method also involves plasma etching the substrate through the streets to singulate the integrated circuits while performing the cooling substantially all of the backside of the substrate carrier.
    • 对具有多个集成电路的各晶片的切割半导体晶片的方法和装置进行说明。 在一个实例中,对具有多个集成电路的半导体晶片进行切割的方法包括将由衬底载体支撑的衬底引入等离子体蚀刻室。 衬底上具有图案化掩模,其覆盖集成电路并暴露衬底的街道。 衬底载体具有背面。 该方法还涉及将衬底载体的背侧的至少一部分支撑在等离子体蚀刻室的卡盘上。 该方法还包括冷却基板载体的基本上所有背面,冷却涉及通过卡盘冷却基板载体的背面的至少第一部分。 该方法还涉及通过街道等离子体蚀刻衬底以对集成电路进行单片化,同时基本上全部衬底载体的背面进行冷却。