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61. 发明授权

US07822445B2 Hand held apparatus and flip device thereof 有权
标题翻译：手持式装置及其翻转装置
公开(公告)号：US07822445B2
公开(公告)日：2010-10-26
申请号：US11604757
申请日：2006-11-28
申请人： Yung-Fa Cheng , Hsin-Hung Chen
发明人： Yung-Fa Cheng , Hsin-Hung Chen
IPC分类号： H04M1/00
CPC分类号： H04M1/0214
摘要： A hand held apparatus includes a base, a foldable cover, a positioning seat, an elastic surface and a cam. The positioning seat is mounted on the base. The elastic surface is mounted on the base. The cam is mounted on the foldable cover and touches the elastic surface. The cam further has a positioning pin at one end thereof, and the positioning pin is pivotally coupled to the positioning seat, such that the foldable cover has the ability to be elastically rotated relative to the base.
摘要翻译：手持设备包括基座，可折叠盖，定位座，弹性表面和凸轮。定位座安装在底座上。弹性表面安装在基座上。凸轮安装在可折叠盖上并接触弹性表面。凸轮在其一端还具有定位销，并且定位销枢转地联接到定位座，使得可折叠盖具有相对于底座弹性旋转的能力。

62. 发明申请

US20100253401A1 SIGNAL PROCESSING CIRCUIT AND SIGNAL PROCESSING METHOD 有权
标题翻译：信号处理电路和信号处理方法
公开(公告)号：US20100253401A1
公开(公告)日：2010-10-07
申请号：US12511971
申请日：2009-07-29
申请人： Hsin-Hung Chen , Chun-Pang Wu , Ping-Ying Wang
发明人： Hsin-Hung Chen , Chun-Pang Wu , Ping-Ying Wang
IPC分类号： H03L7/06
CPC分类号： H04L27/361
摘要： A signal processing circuit includes: a first operation circuit for receiving a phase component of an input signal, and generating an adjusted phase component and at least one weighting factor according to the phase component of the input signal; a second operation circuit, coupled to the first operation circuit, for receiving the adjusted phase component and converting the adjusted phase component into a frequency component corresponding to the adjusted phase component; a third operation circuit, coupled to the first operation circuit, for receiving an amplitude component of the input signal, and adjusting the amplitude component according to the at least one weighting factor to generate an adjusted amplitude component; and a fourth operation circuit, coupled to the second operation circuit and the third operation circuit, for generating an output signal according to the frequency component and the adjusted amplitude component.
摘要翻译：信号处理电路包括：第一操作电路，用于接收输入信号的相位分量，并根据输入信号的相位分量产生经调整的相位分量和至少一个加权因子; 第二操作电路，耦合到第一操作电路，用于接收经调整的相位分量，并将调整后的相位分量转换成对应于经调整的相位分量的频率分量; 耦合到所述第一操作电路的第三操作电路，用于接收所述输入信号的幅度分量，以及根据所述至少一个加权因子调整所述幅度分量以产生调整的幅度分量; 以及耦合到所述第二操作电路和所述第三操作电路的第四操作电路，用于根据所述频率分量和所述调整的振幅分量来产生输出信号。

63. 发明申请

US20100151802A1 AMPLITUDE MODULATION CIRCUIT IN POLAR TRANSMITTER AND METHOD FOR CALIBRATING AMPLITUDE OFFSET IN POLAR TRANSMITTER 有权
标题翻译：极坐标放大器中的振幅调制电路和用于校准极坐标放大器中的振幅偏移的方法
公开(公告)号：US20100151802A1
公开(公告)日：2010-06-17
申请号：US12335540
申请日：2008-12-16
申请人： Hsin-Hung Chen , Hsiang-Hui Chang , Chun-Pang Wu , Yung-Yu Lin , Jong-Woei Chen
发明人： Hsin-Hung Chen , Hsiang-Hui Chang , Chun-Pang Wu , Yung-Yu Lin , Jong-Woei Chen
IPC分类号： H04B1/02
CPC分类号： H04B1/04 , H03C5/00 , H04B2001/0491
摘要： An amplitude modulation circuit in a polar transmitter and a method for calibrating amplitude offset in the polar transmitter are provided. The amplitude modulation circuit includes a digital-to-analog converter (DAC), a low pass filter (LPF), a gm stage, and a calibration module. The DAC is coupled to an amplitude modulation signal input. The LPF is coupled to the DAC, and the gm stage is coupled to the LPF. The calibration module has an input coupled to the gm stage, and an output coupled to a node on a path between the DAC and the gm stage. The method includes: generating an amplitude offset calibration signal according to an amplitude modulation signal generated from the gm stage; and transmitting the amplitude offset calibration signal via the output of the calibration module to a node on a path between the DAC and the gm stage so as to calibrate the amplitude offset.
摘要翻译：提供极性发射机中的幅度调制电路和用于校准极性发射机中的振幅偏移的方法。幅度调制电路包括数模转换器（DAC），低通滤波器（LPF），gm级和校准模块。 DAC耦合到幅度调制信号输入端。 LPF耦合到DAC，并且gm级耦合到LPF。校准模块具有耦合到gm级的输入，以及耦合到DAC和gm级之间路径上的节点的输出。该方法包括：根据从gm级产生的幅度调制信号产生振幅偏移校准信号; 以及经由校准模块的输出将幅度偏移校准信号发送到DAC和gm级之间的路径上的节点，以便校准振幅偏移。

64. 发明申请

US20070146182A1 Self-calibrating current source arrays 有权
标题翻译：自校准电流源阵列
公开(公告)号：US20070146182A1
公开(公告)日：2007-06-28
申请号：US11318188
申请日：2005-12-23
申请人： Hsin-Hung Chen , Jaesik Lee
发明人： Hsin-Hung Chen , Jaesik Lee
IPC分类号： H03M1/10
CPC分类号： H03M1/1061 , H03M1/742
摘要： One apparatus includes an array of current sources, a digital memory, and a calibration circuit. The digital memory is configured to store one set of digital calibration values for each of the current sources and to apply each stored set of digital calibration values to the corresponding current source to set the output current of the corresponding output current source. The calibration circuit is configured to update each set of digital calibration values in the memory in a manner that reduces mismatches between output currents of different ones of the current sources.
摘要翻译：一种装置包括电流源阵列，数字存储器和校准电路。数字存储器被配置为存储用于每个电流源的一组数字校准值，并且将每个存储的数字校准值集合应用于相应的电流源以设置相应的输出电流源的输出电流。校准电路被配置为以减少不同电流源的输出电流之间的不匹配的方式更新存储器中的每组数字校准值。

65. 发明申请

US20070146181A1 DIGITAL BACKGROUND CALIBRATION FOR TIME-INTERLACED ANALOG-TO-DIGITAL CONVERTERS 有权
标题翻译：用于时间互连的模拟数字转换器的数字背景校准
公开(公告)号：US20070146181A1
公开(公告)日：2007-06-28
申请号：US11315640
申请日：2005-12-22
申请人： Hsin-Hung Chen , Jaesik Lee
发明人： Hsin-Hung Chen , Jaesik Lee
IPC分类号： H03M1/10
CPC分类号： H03M1/1004 , H03M1/1215
摘要： The present invention provides for background calibration of a time-interleaved analog-to-digital converter (TIADC). In one embodiment, a background calibrator includes a TIADC having a parallel array of time-interleaved main signal processors, each main signal processor including an ADC connected to a corresponding output FIR filter. The background calibrator also includes an auxiliary signal processor having an ADC connected to at least one corresponding output FIR filter. Additionally, the background calibrator further includes a timing calibration circuit, wherein the timing calibration circuit is configured to select one of the main signal processors, exchange the auxiliary signal processor with the selected main signal processor in the TIADC and connect the selected main signal processor to the timing calibration circuit. In an alternative embodiment, the timing calibration circuit is further configured to reduce a timing mismatch of the selected main signal processor.
摘要翻译：本发明提供了时间交织的模数转换器（TIADC）的背景校准。在一个实施例中，背景校准器包括具有时间交错的主信号处理器的并行阵列的TIADC，每个主信号处理器包括连接到对应的输出FIR滤波器的ADC。背景校准器还包括辅助信号处理器，其具有连接到至少一个对应的输出FIR滤波器的ADC。此外，背景校准器还包括定时校准电路，其中定时校准电路被配置为选择主信号处理器中的一个，将辅助信号处理器与TIADC中选择的主信号处理器交换，并将所选择的主信号处理器连接到定时校准电路。在替代实施例中，定时校准电路还被配置为减少所选主信号处理器的定时失配。

66. 发明申请

US20060249079A1 WAFER HEATER AND WAFER CHUCK INCLUDING THE SAME 审中-公开
标题翻译：加热器和加热器包括相同的加热器
公开(公告)号：US20060249079A1
公开(公告)日：2006-11-09
申请号：US10908338
申请日：2005-05-09
申请人： Ping-Hua Yao , Hsin-Hung Chen
发明人： Ping-Hua Yao , Hsin-Hung Chen
IPC分类号： C23F1/00 , C23C16/00
CPC分类号： C30B25/10 , C30B31/12 , C30B31/14 , H01L21/67103
摘要： A wafer heater is provided, including a body also serving as a heat source, a ceramic ring on the body, and a buffer ring on the body. The buffer ring contacts with the ceramic ring, and has a top surface higher than that of the ceramic ring so that a wafer can be placed on the top surface of the buffer ring without contacting the ceramic ring. The thermal conductivity coefficient of the buffer ring is smaller than that of the ceramic ring. The product of thermal conductivity coefficient and top surface area of the buffer ring is also smaller than that of the ceramic ring.
摘要翻译：提供了一种晶片加热器，其包括也用作热源的主体，主体上的陶瓷环和主体上的缓冲环。缓冲环与陶瓷环接触，并且具有高于陶瓷环的顶表面，使得晶片可以放置在缓冲环的顶表面上而不接触陶瓷环。缓冲环的导热系数小于陶瓷环的导热系数。缓冲环的导热系数和顶面积的乘积也小于陶瓷环的导热系数。

67. 发明申请

US20060238992A1 Fastening device for interface card 有权
公开(公告)号：US20060238992A1
公开(公告)日：2006-10-26
申请号：US11393722
申请日：2006-03-31
申请人： Hsin-Hung Chen
发明人： Hsin-Hung Chen
IPC分类号： H05K7/14
CPC分类号： H05K7/1404 , G06F1/186
摘要： A fastening device for fastening an interface card of a computer. The computer has a motherboard, a casing and the interface card. The motherboard has a motherboard slot, and the casing includes a casing opening and a locking portion. The interface card has a fastening part. When the interface card is inserted into the motherboard slot, the fastening part disposed on the interface card is exposed outside the casing opening and adjacent to the locking portion. The fastening device comprises a positioning box and a securing member. The positioning box disposed on the casing has a box opening and a positioning slot. The securing member is movably disposed within the positioning box and has a pushing part and a securing part. When the pushing part is drawn back into the positioning box, the interface card is dissembled from the motherboard slot.

68. 发明申请

US20060109893A1 Inphase/quadrature phase imbalance compensation 审中-公开
标题翻译：同相/正交相位不平衡补偿
公开(公告)号：US20060109893A1
公开(公告)日：2006-05-25
申请号：US10998122
申请日：2004-11-24
申请人： Hsin-Hung Chen , Jiunn-Tsair Chen , Young-Kai Chen , Po-Chiun Huang , Kun-Yii Tu
发明人： Hsin-Hung Chen , Jiunn-Tsair Chen , Young-Kai Chen , Po-Chiun Huang , Kun-Yii Tu
IPC分类号： H04L5/16
CPC分类号： H04L27/364 , H04B1/30 , H04L27/3863 , H04L2027/0016 , H04L2027/0022
摘要： A transceiver includes a transmitter, a receiver, and an electrical feedback line. The transmitter has a quadrature-modulator and is configurable to compensate inphase/quadrature phase imbalances produced by hardware of the transmitter. The quadrature-modulator is configured to quadrature-modulate a carrier wave. The receiver has a quadrature-demodulator and is configurable to compensate for inphase/quadrature phase imbalances produced by hardware in the receiver. The quadrature-demodulator is configured to demodulate a quadrature-demodulated carrier. The electrical feedback line connects an output of the transmitter to an input of the receiver.
摘要翻译：收发器包括发射器，接收器和电反馈线。发射机具有正交调制器，可配置为补偿发射机硬件产生的同相/正交相位不平衡。正交调制器被配置为对载波进行正交调制。接收机具有正交解调器，可配置为补偿接收机中由硬件产生的同相/正交相位不平衡。正交解调器被配置为解调正交解调载波。电反馈线将发射机的输出连接到接收机的输入。

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