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    • 62. 发明申请
    • Disk brake device
    • 盘式制动装置
    • US20070017756A1
    • 2007-01-25
    • US11484712
    • 2006-07-12
    • Yuichi TakeoTakahiro ItoJunichi Takeuchi
    • Yuichi TakeoTakahiro ItoJunichi Takeuchi
    • F16D65/38
    • F16D65/0977F16D55/226F16D65/095
    • A disk brake has a mount and a pad. The pad has a guide portion and outer and inner push bearing portions on a disk rotor rotation outlet side. The mount has a support portion to support the guide portion movably in a rotor axial direction. The outer and inner push bearing portions are provided on each position outwardly or inwardly of the rotor rotation outlet side guide portion in the radial direction of the rotor, and project toward the mount in the radial direction of the rotor to abut against the mount. The outer push bearing portion has an abutment surface to abut against the mount on a tangent to an outer peripheral side in a central position of the outer peripheral side of a friction surface of the pad radially outwardly in the radial direction of the rotor, or in a position outwardly of the tangent.
    • 盘式制动器具有安装座和衬垫。 垫片在盘形转子旋转出口侧具有引导部分和外部和内部推力轴承部分。 安装座具有支撑部分,用于在转子轴向方向上可移动地支撑引导部分。 外推力轴承部分和内推力轴承部分在转子的径向方向上设置在转子旋转出口侧引导部分的外侧或内侧的每个位置上,并且在转子的径向方向上朝安装件突出以抵靠安装件。 外推力轴承部分具有邻接表面,该邻接表面在转子的径向方向上径向向外的垫的摩擦表面的外周侧的中心位置处与外周侧相切地抵接安装件,或者在 切线外面的一个位置。
    • 65. 发明授权
    • Operational amplifier circuit including folded cascode circuit
    • 运算放大器电路包括折叠共源共栅电路
    • US06236270B1
    • 2001-05-22
    • US09460980
    • 1999-12-15
    • Junichi Takeuchi
    • Junichi Takeuchi
    • H03F345
    • H03F3/45192H03F3/3023H03F2203/45301H03F2203/45398
    • The operational amplifier circuit of the present invention includes a first pair of NMOS which receives a first and a second input voltages to respective gate electrodes and has the source electrodes connected in common, a first pair of PMOS whose gate electrodes are connected in common and whose respective source electrodes are connected to respective drain electrodes of the first pair of NMOSs, a second pair of NMOSs whose gate electrodes are connected in common, whose respective source electrodes are connected to respective drain electrodes of the first PMOS, and whose drain electrodes are connected to a current mirror composed of a second pair of PMOS which is based on the first power supply voltage, and another PMOS whose gate electrode is connected to the drain electrode of one of the second pair of NMOS transistor, whose source electrode receives the first power supply voltage, and whose drain electrode is connected to a constant current source composed of another NMOS transistor whose one end is connected to the second power supply voltage.
    • 本发明的运算放大器电路包括:第一对NMOS,其接收相应的栅电极的第一和第二输入电压,并且源电极共同连接;第一对PMOS,栅电极共同连接, 各个源电极连接到第一对NMOS的各个漏电极,第二对NMOS的栅极共同连接,其各个源电极连接到第一PMOS的各个漏电极,并且其漏电极连接 涉及由基于第一电源电压的第二对PMOS构成的电流镜,以及另一PMOS,其栅电极连接到第二对NMOS晶体管之一的漏电极,源电极接收第一电源 电源电压,并且其漏电极连接到由另一个NMOS跨接元件组成的恒流源 r的一端连接到第二电源电压。