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    • 63. 发明授权
    • Display device and display system using the same
    • 显示设备和显示系统使用相同
    • US07791610B2
    • 2010-09-07
    • US11687449
    • 2007-03-16
    • Yoshiyuki KurokawaTakayuki Ikeda
    • Yoshiyuki KurokawaTakayuki Ikeda
    • G06F13/00G09G5/36G06F15/00
    • G09G3/3648G09G3/3659G09G2300/0809G09G2300/0828G09G2300/0842G09G2300/0857G09G2330/021
    • Provided are a display device with low power consumption which enables reduction of an operation processing amount of a GPU and which does not require a storage device for storing image data corresponding to one screen, and a display system using the display device. The display device is constituted by pixels each including storage circuits, an operation processing circuit, and a display processing circuit and circuits each having a function of storing image data in arbitrary storage circuits. The display system is constituted by the display device and an image processing device including the GPU. Image data is formed for each structural component through operation processing in the GPU in the display system. The formed image data is stored in the corresponding storage circuit for each pixel. The stored image data is subjected to composition processing by the operation processing circuit for each pixel. Then, the image data is converted into an image signal in the display processing circuit.
    • 提供了一种低功耗的显示装置,其能够降低GPU的操作处理量,并且不需要用于存储与一个屏幕相对应的图像数据的存储装置,以及使用该显示装置的显示系统。 显示装置由各自包括存储电路,操作处理电路和显示处理电路的像素构成,并且每个具有将图像数据存储在任意存储电路中的功能的电路构成。 显示系统由显示装置和包括GPU的图像处理装置构成。 通过GPU在显示系统中的操作处理,为每个结构部件形成图像数据。 形成的图像数据被存储在每个像素的对应的存储电路中。 存储的图像数据通过操作处理电路对每个像素进行合成处理。 然后,在显示处理电路中将图像数据转换为图像信号。
    • 65. 发明申请
    • Clock Generation Circuit and Semiconductor Device Including the Same
    • 时钟发生电路和包括其的半导体器件
    • US20080054976A1
    • 2008-03-06
    • US11845391
    • 2007-08-27
    • Masami EndoTakayuki IkedaDaisuke KawaeYoshiyuki Kurokawa
    • Masami EndoTakayuki IkedaDaisuke KawaeYoshiyuki Kurokawa
    • H03K3/283
    • H04L7/0331H03L7/00
    • Objects of the invention are to provide a clock generation circuit, in which, even when different clock signals are used among a plurality of circuits such as a transmitting circuit and a receiving circuit, stabilized communication is possible; and to provide a semiconductor device including the clock generation circuit. The clock generation circuit includes an edge detection circuit, a reference clock generation circuit, a reference clock counter circuit, and a frequency-divider circuit. The reference clock counter circuit is a circuit which outputs a counter value, which is obtained by counting the number of waves of a reference clock signal outputted from the reference clock generation circuit, in a period of time from when the edge detection circuit detects an edge of a signal which is externally inputted to the edge detection circuit to when the edge detection circuit detects the next edge, to the frequency-divider circuit. The frequency-divider circuit is a circuit which frequency-divides the reference clock signal based on the counter value.
    • 本发明的目的是提供一种时钟发生电路,其中即使在诸如发送电路和接收电路的多个电路中使用不同的时钟信号,也可以进行稳定的通信; 并提供包括时钟发生电路的半导体器件。 时钟产生电路包括边缘检测电路,参考时钟产生电路,参考时钟计数器电路和分频器电路。 参考时钟计数器电路是在从边缘检测电路检测到边缘的时间段内输出计数值的电路,该计数值是从基准时钟产生电路输出的基准时钟信号的波数来计算的 将外部输入到边缘检测电路的信号当边缘检测电路检测到下一个边沿时,分配给分频器电路。 分频器电路是基于计数器值对参考时钟信号进行分频的电路。