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61. 发明申请

US20080178058A1 Decoding apparatus and method 审中-公开
标题翻译：解码装置和方法
公开(公告)号：US20080178058A1
公开(公告)日：2008-07-24
申请号：US12009413
申请日：2008-01-17
申请人： Shieh-Hsing Kuo , Chien-Chih Chen
发明人： Shieh-Hsing Kuo , Chien-Chih Chen
IPC分类号： H03M13/00
CPC分类号： G11B20/1833 , G11B2020/1823 , G11B2020/1836 , G11B2020/1853
摘要： A decoding apparatus includes a decoding unit and an updated erasure data generating unit. The decoding unit receives read data and updated erasure data, and generates decoding data including flag information according to the read data and the updated erasure data. The updated erasure data generating unit is coupled to the decoding unit, receives the flag information and original erasure data, and generates the updated erasure data according to the flag information and the original erasure data. The original erasure data is generated by a reading device that reads a storage medium. A decoding method performed by the decoding apparatus is also disclosed.
摘要翻译：解码装置包括解码单元和更新擦除数据生成单元。解码单元接收读取数据和更新的擦除数据，并且根据读取的数据和更新的擦除数据生成包括标志信息的解码数据。更新的擦除数据生成单元耦合到解码单元，接收标志信息和原始擦除数据，并根据标志信息和原始擦除数据生成更新的擦除数据。原始擦除数据由读取存储介质的读取装置产生。还公开了一种由解码装置执行的解码方法。

62. 发明授权

US07308190B2 Device for decoding disc read signal and method thereof 有权
标题翻译：用于解码盘读信号的装置及其方法
公开(公告)号：US07308190B2
公开(公告)日：2007-12-11
申请号：US10710371
申请日：2004-07-06
申请人： Kuang-Yu Yen , Shieh-Hsing Kuo
发明人： Kuang-Yu Yen , Shieh-Hsing Kuo
IPC分类号： H04N5/91
CPC分类号： G11B20/18 , G11B20/10009 , H04N5/85
摘要： A device for decoding a disc read signal generated by accessing data stored in a disc storage medium. The device includes: a multi-level analog-to-digital converter (ADC) for digitizing the disc read signal to generate a digitized disc read signal; a confidence index generating circuit for generating a plurality of confidence indexes according to the magnitude of the digitalized disc read signal; a demodulator coupled to the multi-level ADC for demodulating the digitalized disc read signal to generate a demodulated disc read signal; and an Error Correction Code (ECC) decoder coupled to the demodulator for decoding the demodulated disc read signal according to the confidence indexes.
摘要翻译：一种用于解码通过访问存储在盘存储介质中的数据而生成的盘读信号的装置。该装置包括：用于数字化盘读取信号以产生数字化盘读信号的多电平模数转换器（ADC）; 置信指标产生电路，用于根据数字化盘读信号的大小产生多个置信指标; 耦合到多电平ADC的解调器，用于解调数字化盘读取信号以产生解调的盘读信号; 以及耦合到解调器的纠错码（ECC）解码器，用于根据置信指数对解调的盘读信号进行解码。

63. 发明授权

US07188302B2 Parallel decision-feedback decoder and method for joint equalizing and decoding of incoming data stream 有权
标题翻译：并行决策反馈解码器和联合均衡解码输入数据流的方法
公开(公告)号：US07188302B2
公开(公告)日：2007-03-06
申请号：US10709099
申请日：2004-04-14
申请人： Hou-Wei Lin , Shieh-Hsing Kuo , Kuang-Yu Yen , Jung-Feng Ho
发明人： Hou-Wei Lin , Shieh-Hsing Kuo , Kuang-Yu Yen , Jung-Feng Ho
IPC分类号： H03M13/03
CPC分类号： H03M13/4107 , H03M13/6502 , H04L25/03235 , H04L2025/03363 , H04L2025/03369 , H04L2025/03426
摘要： A P-tap parallel decision-feedback decoder (PDFD) is also disclosed. The PDFD includes a plurality of state shift registers. For each state of a code utilized by an incoming data stream, a survivor metric for a state is shifted into the first shift register for the state. Each first shift register has M cells. A decision device is coupled to the first shift registers for outputting a first survivor metric according to survivor metrics in the first shift registers. A second shift register has N delay cells, and the first survivor metric is shifted into the second shift register.
摘要翻译：还公开了P抽头并行判决反馈解码器（PDFD）。 PDFD包括多个状态移位寄存器。对于由输入数据流使用的代码的每个状态，状态的幸存度量被移位到该状态的第一移位寄存器中。每个第一移位寄存器具有M个单元。决定装置耦合到第一移位寄存器，用于根据第一移位寄存器中的幸存度量输出第一存活器度量。第二移位寄存器具有N个延迟单元，并且第一存储器度量被移入第二移位寄存器。

64. 发明申请

US20050078746A1 SIGNAL PROCESSING DEVICE CAPABLE OF ENHANCING CORRECTNESS OF FEEDBACK SIGNALS 有权
标题翻译：信号处理装置可以提高反馈信号的正确性
公开(公告)号：US20050078746A1
公开(公告)日：2005-04-14
申请号：US10709462
申请日：2004-05-07
申请人： Hou-Wei Lin , Shieh-Hsing Kuo , Yi-Lin Li , Kuang-Yu Yen
发明人： Hou-Wei Lin , Shieh-Hsing Kuo , Yi-Lin Li , Kuang-Yu Yen
IPC分类号： H03K5/159 , H04L25/03 , H04L25/06
CPC分类号： H04L25/03057 , H04L25/061 , H04L2025/0349
摘要： A signal processing device for processing a passband signal to generate an equalized signal includes a passband adaptive equalizer for generating the equalized signal according to the passband signal, including at least one feed-forward equalizer (FFE) and one feedback equalizer (FBE), and a multilevel quantizer coupled with the passband adaptive equalizer for selectively utilizing a single predetermined threshold or a plurality of multiple predetermined thresholds to quantize the equalized signal in order to generate a sliced signal.
摘要翻译：用于处理通带信号以产生均衡信号的信号处理装置包括通带自适应均衡器，用于根据通带信号产生包括至少一个前馈均衡器（FFE）和一个反馈均衡器（FBE）的均衡信号，以及与通带自适应均衡器耦合的多电平量化器，用于选择性地利用单个预定阈值或多个多个预定阈值来量化均衡信号以产生分片信号。

65. 发明授权

US08464307B2 Integrated digital broadcasting receiver system 有权
标题翻译：综合数字广播接收机系统
公开(公告)号：US08464307B2
公开(公告)日：2013-06-11
申请号：US12080203
申请日：2008-04-01
申请人： Wei-Hung He , Chin-Tai Chen , Shieh-Hsing Kuo
发明人： Wei-Hung He , Chin-Tai Chen , Shieh-Hsing Kuo
IPC分类号： H04N7/173
CPC分类号： H04N21/6112 , H04N21/4263 , H04N21/4382
摘要： An audiovisual processing system comprises a signal receiving circuit and a host device. The signal receiving circuit comprises a tuner and a demodulator. The tuner generates a tuned signal based on a radio frequency signal. The demodulator generates a digital signal based on the tuned signal, generates a frequency down-converted signal based on the digital signal, generates an audio processing signal based on the frequency down-converted signal in an audio processing mode, generates a demodulated video signal based on the frequency down-converted signal in a video processing mode, generates an output signal based on the audio processing signal in the audio processing mode, and generates the output signal based on the demodulated video signal in the video processing mode. The host device receives the output signal, and generates a demodulated audio signal based on the output signal in the audio processing mode.
摘要翻译：视听处理系统包括信号接收电路和主机设备。信号接收电路包括调谐器和解调器。调谐器基于射频信号产生调谐信号。解调器基于调谐信号生成数字信号，根据数字信号产生降频转换信号，根据音频处理模式中的降频变换信号生成音频处理信号，生成基于解调的视频信号在视频处理模式中的降频转换信号上，根据音频处理模式中的音频处理信号生成输出信号，并根据视频处理模式中的解调视频信号生成输出信号。主机装置接收输出信号，并根据音频处理模式中的输出信号产生解调音频信号。

66. 发明授权

US08326975B2 Power-saving network apparatus having physical layer circuit capable of entering low power state 有权
标题翻译：具有能够进入低功率状态的物理层电路的省电网络装置
公开(公告)号：US08326975B2
公开(公告)日：2012-12-04
申请号：US12354786
申请日：2009-01-16
申请人： Shieh-Hsing Kuo , Ta-Chin Tseng , Ming-Je Li , Ting-Fa Yu
发明人： Shieh-Hsing Kuo , Ta-Chin Tseng , Ming-Je Li , Ting-Fa Yu
IPC分类号： G06F15/16 , G06F1/26 , G06F1/32
CPC分类号： G06F1/3209 , H04L69/323
摘要： A power-saving network apparatus includes a MAC and a PHY. The PHY includes a transmitter and a receiver. The transmitter executes the operations of: transmitting a data signal to a remote network apparatus according to output packets of the MAC when the transmitter enters a normal state; transmitting an idle signal to the remote network apparatus when the transmitter enters an idle state; transmitting an indication signal to the remote network apparatus to notify it to enter a low power state, wherein the indication signal is different from the idle signal; entering the idle state or the normal state from the low power state in response to at least one of a predetermined period and a transmitting enable signal.
摘要翻译：省电网络装置包括MAC和PHY。 PHY包括发射机和接收机。发射机执行以下操作：当发射机进入正常状态时，根据MAC的输出分组向远程网络设备发送数据信号; 当发射机进入空闲状态时，向远程网络设备发送空闲信号; 向所述远程网络装置发送指示信号以通知其进入低功率状态，其中所述指示信号与所述空闲信号不同; 响应于预定周期和发送使能信号中的至少一个，从低功率状态进入空闲状态或正常状态。

67. 发明授权

US08185806B2 EDC generating circuit and EDC generating method correcting EDC generated from main data according to header 有权
标题翻译： EDC生成电路和根据头部从主数据生成的EDC生成方法校正EDC
公开(公告)号：US08185806B2
公开(公告)日：2012-05-22
申请号：US12023048
申请日：2008-01-31
申请人： Chien-Chih Chen , Shieh-Hsing Kuo
发明人： Chien-Chih Chen , Shieh-Hsing Kuo
IPC分类号： H03M13/00
CPC分类号： G11B20/1833 , G11B2220/2537 , H03M13/09
摘要： An EDC generating circuit includes a memory unit, an EDC generating module, a header generator and an EDC correcting circuit. The EDC generating module, which is coupled to the memory unit, is used for generating a first EDC according to at least one main data, and for storing the first EDC to the memory unit. The header generator, which is coupled to the memory unit, is used for generating a header according to header information. The EDC correcting circuit, which is coupled to the memory unit, is used for reading the first EDC from the memory unit and for correcting the first EDC according to the header to generate a second EDC.
摘要翻译： EDC生成电路包括存储单元，EDC生成模块，标题生成器和EDC校正电路。耦合到存储器单元的EDC生成模块用于根据至少一个主数据产生第一EDC，并用于将第一EDC存储到存储器单元。耦合到存储器单元的标题生成器用于根据报头信息生成报头。耦合到存储器单元的EDC校正电路用于从存储器单元读取第一EDC并根据标题校正第一EDC以产生第二EDC。

68. 发明申请

US20110314359A1 ERROR DETECTION CODE GENERATING CIRCUIT AND ENCODING CIRCUIT UTILIZING WHICH AND METHOD THEREOF 有权
标题翻译：使用其错误检测代码生成电路和编码电路及其方法
公开(公告)号：US20110314359A1
公开(公告)日：2011-12-22
申请号：US13214249
申请日：2011-08-22
申请人： Chien-Chih Chen , Shieh-Hsing Kuo
发明人： Chien-Chih Chen , Shieh-Hsing Kuo
IPC分类号： H03M13/09 , G06F11/10
CPC分类号： G11B20/1833 , G11B2220/2537 , H03M13/09
摘要： An encoding circuit comprising: a memory unit; an EDC generating circuit, a scrambler, a header generator, an EDC correcting circuit and an decoder. The EDC generating circuit is used for generating a first EDC according to at least one main data, and for storing the first EDC to the memory unit. The scrambler is used for generating a scrambled main data according to the main data, and for storing the scrambled main data to the memory unit. The header generator is used for generating a header according to header information. The EDC correcting circuit is used for reading the first EDC from the memory unit and for correcting the first EDC according to the header to generate a second EDC. The encoder is used for encoding optical data according to the second EDC and the scrambled main data.
摘要翻译：一种编码电路，包括：存储单元; EDC生成电路，加扰器，标题生成器，EDC校正电路和解码器。 EDC生成电路用于根据至少一个主数据产生第一EDC，并用于将第一EDC存储到存储器单元。扰频器用于根据主数据产生加扰的主数据，并将加扰的主数据存储到存储器单元。标题生成器用于根据标题信息生成报头。 EDC校正电路用于从存储器单元读取第一EDC并根据标题校正第一EDC以产生第二EDC。编码器用于根据第二EDC和加扰的主数据对光数据进行编码。

69. 发明申请

US20090327693A1 NETWORK TASK OFFLOAD APPARATUS AND METHOD THEREOF 有权
标题翻译：网络任务卸载装置及其方法
公开(公告)号：US20090327693A1
公开(公告)日：2009-12-31
申请号：US12491219
申请日：2009-06-24
申请人： Li-Han Liang , Tao-Chun Wang , Kuo-Nan Yang , Shieh-Hsing Kuo
发明人： Li-Han Liang , Tao-Chun Wang , Kuo-Nan Yang , Shieh-Hsing Kuo
IPC分类号： G06F9/312 , H04L9/28 , G06F9/50
CPC分类号： H04L49/90 , G06F21/6218 , G06F2221/2107 , H04L49/9057 , H04L63/0428 , H04L63/0442 , H04L63/0485
摘要： A network task offload apparatus includes an offload circuit and a buffer scheduler. The offload circuit performs corresponding network task processing on a plurality of packets in parallel according to an offload command. The buffer scheduler includes a buffer control unit and a plurality of buffer units. The plurality of buffer units are controlled by the buffer control unit and are scheduled to store the processed packets.
摘要翻译：网络任务卸载装置包括卸载电路和缓冲器调度器。卸载电路根据卸载命令并行地对多个分组进行相应的网络任务处理。缓冲器调度器包括缓冲器控制单元和多个缓冲单元。多个缓冲单元由缓冲器控制单元控制，并被调度以存储经处理的分组。

70. 发明授权

US07342982B2 Demodulation apparatus for a network transceiver and method thereof 有权
标题翻译：网络收发机解调装置及其方法
公开(公告)号：US07342982B2
公开(公告)日：2008-03-11
申请号：US10687771
申请日：2003-10-20
申请人： Hou-Wei Lin , Shieh-Hsing Kuo , Meng-Han Hsieh , Kuang-Yu Yen
发明人： Hou-Wei Lin , Shieh-Hsing Kuo , Meng-Han Hsieh , Kuang-Yu Yen
IPC分类号： H04B1/10
CPC分类号： H04L25/03038 , H03H21/0012 , H04L7/0062 , H04L25/03235 , H04L2025/03363 , H04L2025/03477
摘要： A transceiver of a communication system is disclosed. The transceiver is implemented by a demodulation apparatus including a front-end receiver, a noise canceller, a feedforward equalizer (FFE) and a decoding system. The front-end receiver receives a remote signal and converts it into a first signal with a pre-cursor and a post-cursor in digital form. The noise canceller is coupled to the front-end receiver for subtracting a noise signal from the first signal and thus generates a second signal. The FFE is coupled to the noise canceller for eliminating the pre-cursor in the second signal and thus generates a third signal. The decoding system is coupled to the FFE for decoding the third signal and eliminating the post-cursor in the third signal.
摘要翻译：公开了一种通信系统的收发器。收发器由包括前端接收机，噪声消除器，前馈均衡器（FFE）和解码系统的解调装置来实现。前端接收器接收远程信号，并以数字形式将其转换为具有前置光标和后置光标的第一信号。噪声消除器耦合到前端接收器，用于从第一信号中减去噪声信号，从而产生第二信号。 FFE耦合到噪声消除器，以消除第二信号中的前置光标，从而产生第三信号。解码系统耦合到FFE，用于对第三信号进行解码，并消除第三信号中的后置光标。

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