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    • 62. 发明授权
    • Method, system and program storage device for modeling the capacitance associated with a diffusion region of a silicon-on-insulator device
    • 用于对与绝缘体上硅器件的扩散区域相关联的电容进行建模的方法,系统和程序存储装置
    • US08631371B2
    • 2014-01-14
    • US13171528
    • 2011-06-29
    • Ning Lu
    • Ning Lu
    • G06F17/50
    • G06F17/5036G06F17/5081
    • Disclosed are embodiments of a method, system and program storage device for accurately modeling parasitic capacitance(s) associated with a diffusion region of a silicon-on-insulator (SOI) device and doing so based, at least in part, on proximity to adjacent conductive structures. In these embodiments, the layout of an integrated circuit design can be analyzed to determine, for the diffusion region, shape, dimension and proximity information. Then, a formula can be developed and used for determining the parasitic capacitance between the diffusion region and the substrate below (CD-S). This formula can have a perimeter component, including a side edge component and, if applicable, a corner component, both of which account for the fact that CD-S is generally dependent on the distances between the diffusion region and any adjacent conductive structures. Additionally, the parasitic capacitance between the diffusion region and any adjacent conductive structure (CD-D) can be determined based on such distances.
    • 公开了一种用于精确地建模与绝缘体上硅(SOI)器件的扩散区域相关联的寄生电容的方法,系统和程序存储设备的实施例,并且至少部分地基于邻近的绝缘体上硅 导电结构。 在这些实施例中,可以分析集成电路设计的布局以确定扩散区域的形状,尺寸和邻近信息。 然后,可以开发公式并用于确定扩散区域和下面的衬底(CD-S)之间的寄生电容。 该公式可以具有周边部件,包括侧边缘部件,以及(如果适用的话)拐角部件,这两个部件考虑到CD-S通常取决于扩散区域和任何相邻导电结构之间的距离的事实。 此外,可以基于这样的距离来确定扩散区域和任何相邻的导电结构(CD-D)之间的寄生电容。
    • 65. 发明申请
    • METHOD OF MODELING SPATIAL CORRELATIONS AMONG INTEGRATED CIRCUITS WITH RANDOMLY GENERATED SPATIAL FREQUENCIES
    • 用随机生成的空间频率对集成电路建立空间相关的方法
    • US20130179127A1
    • 2013-07-11
    • US13343753
    • 2012-01-05
    • Ning Lu
    • Ning Lu
    • G06F17/10
    • G06F17/5072G06F17/5036G06F2217/10
    • A computer-implemented method, computer system, and computer program for modeling spatial correlations among a set of devices. A method includes: assigning a set of physical coordinates to each device in the set of devices; representing one of a process parameter or an electric parameter for each device as a sum of at least two stochastic terms, wherein the at least two stochastic terms are chosen to satisfy the spatial correlations; simulating formation of the set of devices using the physical coordinates and the at least one of the process parameter or the electric parameter; and obtaining statistical properties of the set of devices from the simulation.
    • 一种计算机实现的方法,计算机系统和用于建模一组设备之间的空间相关性的计算机程序。 一种方法包括:为一组设备中的每个设备分配一组物理坐标; 将每个设备的过程参数或电参数之一表示为至少两个随机项的和,其中选择所述至少两个随机项以满足所述空间相关性; 使用所述物理坐标和所述过程参数或所述电参数中的所述至少一个来模拟所述一组装置的形成; 并从仿真中获得该组设备的统计特性。
    • 66. 发明授权
    • Method, a system and a program storage device for modeling the resistance of a multi-contacted diffusion region
    • 方法,系统和程序存储装置,用于对多接触扩散区域的电阻进行建模
    • US08381147B2
    • 2013-02-19
    • US13151313
    • 2011-06-02
    • Ning Lu
    • Ning Lu
    • G06F17/50G06F17/11G06F17/17
    • G06F17/5036
    • Disclosed are embodiments of a method and program storage device for modeling the resistance of a multi-contacted diffusion region of a semiconductor device, such as a metal oxide semiconductor field effect transistor (MOSFET), a metal oxide semiconductor capacitor (MOS capacitor), a bipolar transistor, etc. The embodiments provide a formula for determining the total parasitic resistance (Rtot) of the diffusion region based on a sum of contributions of wire resistance, contact resistance, diffusion resistance and electric current flow from each of multiple partitions of the diffusion region. This formula allows the position of each dividing line separating adjacent partitions (i.e., between adjacent contacts) to be arbitrary. The embodiments adjust the position of each dividing line to minimize the total parasitic resistance (Rtot). This minimized total parasitic resistance (Rtot) value can then be used to more accurately model semiconductor device performance.
    • 公开了一种用于对诸如金属氧化物半导体场效应晶体管(MOSFET),金属氧化物半导体电容器(MOS电容器),半导体场效应晶体管(MOS)的半导体器件的多接触扩散区域的电阻进行建模的方法和程序存储装置的实施例。 双极晶体管等。这些实施例提供了一种用于基于导线电阻,接触电阻,扩散电阻和来自扩散的多个分区中的每一个的电流流量的总和来确定扩散区域的总寄生电阻(Rtot)的公式 地区。 该公式允许将相邻分区(即,相邻触点之间)分开的每个分割线的位置是任意的。 这些实施例调整每个分界线的位置以最小化总寄生电阻(Rtot)。 因此,最小化的总寄生电阻(Rtot)值可用于更准确地模拟半导体器件的性能。
    • 67. 发明申请
    • METHOD OF CALCULATING FET GATE RESISTANCE
    • 计算FET栅极电阻的方法
    • US20120226456A1
    • 2012-09-06
    • US13038460
    • 2011-03-02
    • Ning Lu
    • Ning Lu
    • G06F19/00
    • G06F17/5036
    • A method and device determine FET gate resistance based on both polysilicon resistance and the resistance values of wires and contacts connected to the gate node, plus the fraction of the electric current in each wire segment and in each contact and the path length of electric current in polysilicon. A new gate resistance expression (i.e., a master equation) is used for total gate resistance, which is the sum of core gate resistance and the resistance of wires and contacts connecting polysilicon and a gate node. When there are two or more paths for electric current going from polysilicon to the gate node, the total resistance also depends on the direction and path length of electric current in polysilicon, and the method and device next determine the fraction of electric current in each path by minimizing total resistance with respect to the fractions of the electric current in each path.
    • 一种方法和装置基于多晶硅电阻和连接到栅极节点的导线和触点的电阻值以及每个线段和每个接触中的电流的分数以及电流的路径长度来确定FET栅极电阻 多晶硅 总栅极电阻用新的栅极电阻表达式(即主方程式)用作总栅极电阻,其是芯栅极电阻和连接多晶硅和栅极节点的导线和触点的电阻之和。 当从多晶硅到栅极节点的电流有两条或更多条路径时,总电阻也取决于多晶硅中的电流的方向和路径长度,并且该方法和装置接下来确定每条路径中的电流分数 通过相对于每个路径中的电流的分数来最小化总电阻。
    • 68. 发明授权
    • Method and computer program product for finding statistical bounds, corresponding parameter corners, and a probability density function of a performance target for a circuit
    • 用于查找电路的性能目标的统计边界,相应参数角以及概率密度函数的方法和计算机程序产品
    • US08204714B2
    • 2012-06-19
    • US12713210
    • 2010-02-26
    • Ning Lu
    • Ning Lu
    • G06F17/18G06F19/00
    • G06F17/18G06F17/504G06F2217/10
    • Disclosed are embodiments of a method and an associated computer program product for finding the statistical bounds, the corresponding parameter corners and the probability density function of one or more performance targets for a circuit without requiring Monte Carlo simulation runs. To accomplish this, a joint probability density function for independent parameters that affect the performance target can be constructed. Then, based on the joint probability density function, the statistical bounds of the performance target can be found by constructing an equal-probability-density surface of the joint probability density function and solving a constrained optimization problem on that equal-probability-density surface. Once the statistical bounds are determined, the corresponding parameter corners for the performance target can also be determined. After obtaining multiple statistical bounds corresponding to different accumulated probability density, the probability density function of the performance target can also be obtained.
    • 公开了一种方法和相关联的计算机程序产品的实施例,用于在不需要蒙特卡罗模拟运行的情况下找到用于电路的一个或多个性能目标的统计边界,相应参数角和概率密度函数。 为了实现这一点,可以构建影响性能目标的独立参数的联合概率密度函数。 然后,基于联合概率密度函数,可以通过构建联合概率密度函数的等概率密度表面,并在等概率密度面上求解约束优化问题,找出性能目标的统计边界。 一旦确定了统计界限,也可以确定性能目标的相应参数角。 在获得对应于不同累积概率密度的多个统计边界之后,也可以获得性能目标的概率密度函数。
    • 69. 发明申请
    • NETWORK COPOLYMER CROSSLINKED EMULSIONS AND DEMULSIFYING COMPOSITIONS COMPRISING THE SAME
    • 网络共聚物交联乳液和包含它们的组合物
    • US20110152423A1
    • 2011-06-23
    • US12646364
    • 2009-12-23
    • Ning LuSigfredo GonzalezEmie M. SilvestreGeng Wang
    • Ning LuSigfredo GonzalezEmie M. SilvestreGeng Wang
    • C08K5/541C08L43/02
    • C08F220/26A61K8/8152A61K2800/54A61Q1/02A61Q5/12C08F220/38C08F230/02
    • The present invention is directed to a network composition the reaction product of: (i) at least one anionic polymerizable ethylenically unsaturated monomer (I) selected from the group consisting of [CH2═C(R3)C(O)OXa(C2H4O)b(C3H6O)c(C4H8O)d]pP(O)(OY)q(OZ)r where R3═H or alkyl of 1 to about 6 carbon atoms; X=alkyl, aryl, or alkaryl diradical connecting group of 0 to about 9 carbon atoms; a is 0 to about 100; b is 0 to about 100;c is 0 to about 100; d is 0 to about 100; q is 0 to about 2; r is 0 to about 2; p is 1 to about 3 subject to the limitation that p+q+r=3; and Y and Z is H, or metal ion; and CH2═C(R3)C(O)OXa′(C2H4O)b′(C3H6O)c′(C4H8O)d′—SO3—Y) where R3═H or alkyl of from 1 to about 6 carbon atoms; X=alkyl, aryl, or alkaryl diradical connecting group of 0 to about 9 carbon atoms; a′ is 0 to about 100; b′ is 0 to about 100; c′ is 0 to about 100; d′ is 0 to about 100; Y is H, or metal ion; and (ii) one or more additional monomers (II) selected from the group consisting of acrylic acid/acrylate, methacrylic acid/methacrylate, acrylamides, vinyl acetate and styrene, which are copolymerizable with (I); and (iii) a cross-linking agent (III), capable of copolymerizing with (I) and (II).
    • 本发明涉及一种网络组合物,其反应产物为:(i)至少一种选自[CH 2 = C(R 3)C(O)O X a(C 2 H 4 O)b的阴离子可聚合烯属不饱和单体(I) (C 3 H 6 O)c(C 4 H 8 O)d] pP(O)(OY)q(OZ)r其中R 3 = H或1至约6个碳原子的烷基; X = 0至约9个碳原子的烷基,芳基或烷芳基双基连接基团; a为0〜100; b为0至约100; c为0至约100; d为0至约100; q为0〜2; r为0〜2; p为1至约3,但受限于p + q + r = 3; Y和Z是H或金属离子; (C 3 H 6 O)c'(C 4 H 8 O)d-SO 3-Y)其中R 3 = H或1至约6个碳原子的烷基; X = 0至约9个碳原子的烷基,芳基或烷芳基双基连接基团; a'为0至约100; b'为0至约100; c'为0至约100; d'为0至约100; Y是H或金属离子; 和(ii)可与(I)共聚的一种或多种选自丙烯酸/丙烯酸酯,甲基丙烯酸/甲基丙烯酸酯,丙烯酰胺,乙酸乙烯酯和苯乙烯的另外的单体(II); 和(iii)能够与(I)和(II)共聚的交联剂(III)。
    • 70. 发明授权
    • Dimmable, high power factor ballast for gas discharge lamps
    • 用于气体放电灯的可调光,高功率因数镇流器
    • US07750580B2
    • 2010-07-06
    • US11867935
    • 2007-10-05
    • Ning LuJun LiuVenugopal Ashokkumar
    • Ning LuJun LiuVenugopal Ashokkumar
    • H05B37/00H05B37/02
    • H05B41/282H05B41/2986H05B41/392Y02B20/183Y02B20/19
    • A ballast for operating a compact fluorescent lamp includes a power factor correction circuit and an energy storage capacitor coupled to the output thereof. The power factor correction circuit is configured to draw current from an AC power source during substantially more than half of the cycle of the input AC voltage waveform; i.e., when operated such that full power is supplied to the lamp. Energy transfer elements in the power factor correction circuit extract energy from the AC power source via an input rectifier, even when the peak voltage of the AC voltage waveform is substantially lower than the voltage of the energy storage capacitor, and transfer the energy to the energy storage capacitor a sufficient number of times during for each cycle of the input AC voltage waveform (e.g., at least 500 times for each full cycle of a 60 Hz input AC voltage waveform for a lamp operated at a frequency of 30 kHz), such that the energy storage capacitor remains substantially fully charged during steady-state ballast operation. The power factor circuit additionally provides for improved dimming capability, specifically, dimming the discharge to low levels, while maintaining steady, non-flickering operation.
    • 用于操作紧凑型荧光灯的镇流器包括功率因数校正电路和耦合到其输出的储能电容器。 功率因数校正电路被配置为在输入AC电压波形的大约一半的周期内从AC电源抽取电流; 即当操作使得全部功率被供应到灯时。 功率因数校正电路中的能量转移元件即使当交流电压波形的峰值电压基本上低于储能电容器的电压,也能够将能量转移到能量时,通过输入整流器从交流电源提取能量 存储电容器在输入AC电压波形的每个周期期间的足够次数(例如,对于以30kHz的频率操作的灯的60Hz输入AC电压波形的每个完整周期的至少500次),使得 在稳态镇流器操作期间,储能电容器基本上完全充电。 功率因数电路还提供改进的调光能力,特别是将放电调光到低电平,同时保持稳定的非闪烁操作。