会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 65. 发明申请
    • Method and apparatus for reducing clock jitter in a clock recovery circuit
    • 用于减少时钟恢复电路中的时钟抖动的方法和装置
    • US20040066872A1
    • 2004-04-08
    • US10266426
    • 2002-10-08
    • MEDIA TEK INC.
    • Tse-Hsiang Hsu
    • H03D003/24
    • H03L7/093H03L7/0891H03L7/18H04L7/0083H04L7/033
    • In a method and apparatus for reducing clock jitter in a clock recovery circuit, a control signal having first and second potentials is generated from ascending and descending pulses of a phase detector that receives an input data signal and a clock signal. The current output of a charge controller is used to charge and discharge a capacitor when the control signal has the first potential such that the capacitor has a floating voltage. The capacitor is connected to a loop filter to enable the latter to generate a control voltage corresponding to the floating voltage when the control signal has the second potential. The control voltage is used to control an oscillator circuit for synchronizing the clock signal with the input data signal.
    • 在用于减少时钟恢复电路中的时钟抖动的方法和装置中,具有第一和第二电位的控制信号由接收输入数据信号和时钟信号的相位检测器的上升和下降脉冲产生。 当控制信号具有第一电位使得电容器具有浮置电压时,充电控制器的电流输出用于对电容器进行充电和放电。 电容器连接到环路滤波器,使得后者可以在控制信号具有第二电位时产生与浮动电压相对应的控制电压。 控制电压用于控制振荡器电路,以使时钟信号与输入数据信号同步。
    • 66. 发明申请
    • Method and device for jitter enhancement in an optical disc system
    • 用于光盘系统抖动增强的方法和装置
    • US20040057358A1
    • 2004-03-25
    • US10358529
    • 2003-02-05
    • MEDIA TEK INC.
    • Tse-Hsiang HsuChih-Cheng Chen
    • G11B007/00
    • G11B7/0053G11B20/24
    • A method and device are provided for jitter enhancement in an optical disc system. The optical disc system generates a signal that includes an effective component having a first slew rate, and a pre-pit component having a second slew rate larger than the first slew rate. The signal is fed to a slew rate control module having a predetermined slew rate that is larger than the first slew rate and smaller than the second slew rate. The slew rate control module outputs a component of the signal having a slew rate not larger than the predetermined slew rate, and suppresses a component of the information signal having a slew rate larger than the predetermined slew rate.
    • 提供了一种用于光盘系统中的抖动增强的方法和装置。 光盘系统产生包括具有第一压摆率的有效部件和具有大于第一压摆率的第二转换速率的预凹陷部件的信号。 信号被馈送到具有大于第一转换速率并小于第二转换速率的预定转换速率的转换速率控制模块。 转换速率控制模块输出具有不大于预定转换速率的转换速率的信号的分量,并且抑制具有大于预定转换速率的转换速率的信息信号的分量。
    • 68. 发明申请
    • Method and apparatus for calibrating laser write power for writing data onto an optical storage medium
    • 用于校准用于将数据写入光存储介质的激光写入功率的方法和装置
    • US20040017750A1
    • 2004-01-29
    • US10389370
    • 2003-03-14
    • MEDIA TEK INC.
    • Ching-Chuan HsuMing-Yang Chao
    • G11B007/00
    • G11B7/1267
    • In method and apparatus for calibrating laser write power for writing data onto an optical storage medium, test data is written onto a test area of the optical storage medium at a number (N) of laser power levels. The test data written onto the test area is read and processed so as to generate a number (N) of processed signals corresponding to the number (N) of laser power levels, respectively. A jitter value associated with each of the processed signals is determined. Finally, one of the laser power levels that corresponds to one of the processed signals having the jitter value that is at a relative minimum is selected. The laser write power is set to the selected one of the laser power levels.
    • 在用于校准用于将数据写入光存储介质的激光写入功率的方法和装置中,以数量(N)个激光功率电平将测试数据写入光存储介质的测试区域。 读取和处理写入测试区域的测试数据,以产生分别对应于激光功率电平数量(N)的数量(N)个处理信号。 确定与每个处理的信号相关联的抖动值。 最后,选择与具有处于相对最小值的抖动值的处理信号之一相对应的激光功率电平之一。 激光写入功率设置为所选择的激光功率电平之一。
    • 69. 发明申请
    • Method and apparatus for reducing data dependent phase jitter in a clock recovery circuit
    • 用于在时钟恢复电路中减少数据相关相位抖动的方法和装置
    • US20030227990A1
    • 2003-12-11
    • US10266913
    • 2002-10-08
    • MEDIA TEK INC.
    • Tse-Hsiang HsuChih-Cheng Chen
    • H03D003/24
    • H04L7/033H03L7/0891
    • In a method and apparatus for reducing data dependent phase jitter in a clock recovery circuit, a time delay component is connected between the phase detector and the charge controller to cause consecutive ones of ascending and descending pulses from a phase detector to overlap in the time domain. The time delay component cooperates with the phase detector to simultaneously provide the overlapping ascending and descending pulses to a charge controller such that ripples in a control voltage generated by a loop filter and attributed to a current output of the charge controller can be reduced in order to minimize phase jitter of a clock signal from an oscillator circuit.
    • 在用于减少时钟恢复电路中与数据相关的相位抖动的方法和装置中,时间延迟分量连接在相位检测器和充电控制器之间,以使来自相位检测器的上升和下降脉冲中的连续的一个在时域中重叠 。 时延分量与相位检测器配合以同时向充电控制器提供重叠的上升和下降脉冲,使得由环路滤波器产生的归因于充电控制器的电流输出的控制电压中的波纹可以减少,以便 最小化来自振荡​​电路的时钟信号的相位抖动。