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61. 发明授权

US5617508A Speech detection device for the detection of speech end points based on variance of frequency band limited energy 失效
标题翻译：基于频带限制能量方差检测语音终点的语音检测装置
公开(公告)号：US5617508A
公开(公告)日：1997-04-01
申请号：US105755
申请日：1993-08-12
申请人： Benjamin K. Reaves
发明人： Benjamin K. Reaves
IPC分类号： G10L11/02 , G10L15/04 , G10L9/00
CPC分类号： G10L25/87 , G10L25/78
摘要： The device detects the beginning and ending portions of speech contained within an input signal based on the variance of frequency band limited energy within the signal. The use of the variance allows detection which is relatively independent of an absolute signal-to-noise ratio with the signal, and allows accurate detection within a wide variety of backgrounds such as music, motor noise, and background noise, such as other speakers. The device can be easily implemented using off-the-shelf hardware along with a high-speed special purpose digital signal processor integrated circuit.
摘要翻译：该装置基于信号内的频带限制能量的变化来检测包含在输入信号内的语音的开始和结束部分。使用方差允许与信号相对独立于绝对信噪比的检测，并且允许诸如音乐，电机噪声和背景噪声的各种背景（例如其他扬声器）中的精确检测。该设备可以使用现成的硬件以及高速专用数字信号处理器集成电路轻松实现。

62. 发明授权

US5613084A Interpolation filter selection circuit for sample rate conversion using phase quantization 失效
标题翻译：插值滤波器选择电路，采用相位量化进行采样率转换
公开(公告)号：US5613084A
公开(公告)日：1997-03-18
申请号：US317474
申请日：1994-10-04
申请人： Clarence J. Hau , Jerome D. Shields
发明人： Clarence J. Hau , Jerome D. Shields
IPC分类号： H04N7/01 , H03H17/02 , H03H17/06 , H04N5/14 , H04N5/44 , G06F12/00
CPC分类号： H03H17/0225 , H03H17/0294 , H03H17/0657 , H03H17/0664 , H04N7/0122 , H04N5/14
摘要： A filter selector generates a filter address value to select one of a number of frequency characteristics of a filter to resample a first data signal from a first segment of data in order to generate second sampled data signal in a second segment of data. The filter selector includes an adder which adds a resampling factor to a previous address value to generate a current address value if the previous address value is less than a comparator value and which subtracts the comparator value from the previous address value to generate the current address value if the previous address value is greater than or equal to the comparator value. The current address value is shifted by n bits, where n is an integer, to generate the filter address value.
摘要翻译：滤波器选择器生成滤波器地址值以选择滤波器的多个频率特性之一，以从第一数据段重新采样第一数据信号，以便在第二数据段中生成第二采样数据信号。滤波器选择器包括加法器，该加法器将先前地址值的重采样因子加到当前地址值小于比较器值时生成当前地址值，并从前一地址值中减去比较器值以产生当前地址值如果先前的地址值大于或等于比较器值。当前地址值移位n位，其中n是整数，以生成过滤器地址值。

63. 发明授权

US5592625A Apparatus for providing shared virtual memory among interconnected computer nodes with minimal processor involvement 失效
标题翻译：用于在相互连接的计算机节点之间提供共享的虚拟存储器的装置，其处理器受到最少限制
公开(公告)号：US5592625A
公开(公告)日：1997-01-07
申请号：US461390
申请日：1995-06-05
申请人： Jonathan Sandberg
发明人： Jonathan Sandberg
IPC分类号： G06F12/08 , G06F12/02 , G06F12/06 , G06F12/10 , G06F15/17 , H04L12/56 , H04L29/06 , G06F13/00
CPC分类号： G06F12/1081 , G06F12/1072 , H04L29/06 , H04L49/103 , H04L49/90 , H04L49/3009 , H04L49/3018 , H04L49/3027
摘要： The invention relates to general purpose interprocessor communication implemented through a distributed shared memory network connecting a plurality of processors, computers, multiprocessors, and electronic and optical devices. The invention teaches an apparatus for shared memory based data transfer between a multiplicity of asynchronously operating devices (processors, computers, multiprocessors, etc.) each using possibly distinct memory address translation architectures. The invention further teaches shared virtual memory network communication and administration based on a unique network memory address translation architecture. This architecture is compatible with and augments the address translation and cache block replacement mechanisms of existing devices. More particularly, the invention teaches an adapter card having input/output buffers, page tables and control/status registers for insertion into an operating device, or node, whereby all address translation, memory mapping and packet generation can be implemented. The invention teaches that all network activities can be completed with only write and control operations. An interconnecting switch part and bus arrangement facilitates communication among the network adapters.
摘要翻译：本发明涉及通过连接多个处理器，计算机，多处理器以及电子和光学设备的分布式共享存储器网络实现的通用处理器通信。本发明教导了一种用于在各种使用可能不同的存储器地址转换架构的多个异步操作设备（处理器，计算机，多处理器等）之间进行基于共享存储器的数据传输的装置。本发明还基于独特的网络存储器地址转换架构来教导共享的虚拟存储器网络通信和管理。该架构与现有设备的地址转换和缓存块替换机制兼容并增强其功能。更具体地，本发明教导了具有输入/输出缓冲器，页表和用于插入到操作设备或节点中的控制/状态寄存器的适配器卡，由此可以实现所有地址转换，存储器映射和分组生成。本发明教导了所有网络活动只能通过写入和控制操作完成。互连开关部分和总线布置有助于网络适配器之间的通信。

64. 发明授权

US5581704A System for maintaining data coherency in cache memory by periodically broadcasting invalidation reports from server to client 失效
标题翻译：通过从服务器到客户端周期性地广播无效报告来保持高速缓冲存储器中的数据一致性的系统
公开(公告)号：US5581704A
公开(公告)日：1996-12-03
申请号：US163335
申请日：1993-12-06
申请人： Daniel Barbara , Tomasz Imielinski
发明人： Daniel Barbara , Tomasz Imielinski
IPC分类号： G06F12/08 , G06F13/00
CPC分类号： G06F12/0815 , Y10S707/99952
摘要： A method and system are provided for maintaining coherency between a server processor and a client processor that has a cache memory. The server may, for example, be a fixed location mobile unit support station. The client may, for example, be a palmtop computer. The server stores a plurality of data values, and the client stores a subset of the plurality of data values in the cache. The server processor periodically broadcasts invalidation reports to the client processor. Each respective invalidation report includes information identifying which, if any, of the plurality of data values have been updated within a predetermined period of time before the server processor broadcasts the respective invalidation report. The client processor determines, based on the invalidation reports, whether a selected data value in the cache memory of the client processor has been updated in the server processor since the selected data value was stored in the cache memory. The client processor invalidates the selected data value in the cache memory of the client processor, if the selected data value has been updated in the server processor.
摘要翻译：提供了一种用于维护服务器处理器和具有高速缓存存储器的客户端处理器之间的一致性的方法和系统。服务器可以例如是固定位置的移动单元支持站。客户端可以例如是掌上电脑。服务器存储多个数据值，并且客户端将多个数据值的子集存储在高速缓存中。服务器处理器周期性地向客户端处理器广播无效报告。每个相应的无效报告包括识别在服务器处理器广播相应的无效报告之前在预定时间段内已经更新了多个数据值中的哪一个（如果有的话）的信息。客户处理器基于无效报告确定在服务器处理器中客户端处理器的高速缓冲存储器中的所选择的数据值是否已被更新，因为所选择的数据值被存储在高速缓冲存储器中。如果在服务器处理器中更新了所选择的数据值，则客户端处理器会使客户端处理器的高速缓存中的选定数据值无效。

65. 发明授权

US5577134A Method and apparatus for encoding a segmented image without loss of information 失效
标题翻译：用于编码分割图像而不丢失信息的方法和装置
公开(公告)号：US5577134A
公开(公告)日：1996-11-19
申请号：US215684
申请日：1994-03-22
申请人： Peter Westerink
发明人： Peter Westerink
IPC分类号： H04N5/92 , G06T5/00 , G06T9/00 , G06T9/20 , H03M7/30 , H04N1/41 , H04N5/937 , H04N7/26 , H04N9/804 , H04N9/808 , G06K9/36
CPC分类号： G06T7/0085 , G06T9/20
摘要： An image processing system encodes a segmented or mosaic image into a set of fixed-length data packets, from which the segmented image may be reproduced with no significant loss of detail. The exemplary system includes a chain coder which translates the segmented image into a form in which the image segments are represented as respective sequences of border values, each border value indicating a direction to the next border value. This image is further encoded such that each pair of border values becomes a single further border value and a pair of complementary codes. These further border values are processed in the same manner, to further reduce the number of border values needed to represent the image. When the number of border values has been reduced to a level such that the image may be encoded in a single packet, the encoding system provides these border values and all complementary code values that have been generated as the code representing the segmented image. Both the reduced border values and the complementary codes are variable-length coded before being stored for use by, or transmitted to an image reconstruction system.
摘要翻译：图像处理系统将分割的或马赛克图像编码成一组固定长度的数据分组，从而可以再现分割图像而没有明显的细节损失。该示例性系统包括链式编码器，其将分割的图像转换成其中图像片段被表示为相应的边界值序列的形式，每个边界值指示到下一个边界值的方向。该图像被进一步编码，使得每对边界值变为单个另外的边界值和一对互补码。这些进一步的边界值以相同的方式处理，以进一步减少表示图像所需的边界值的数量。当边界值的数量已经减少到使得图像可以被编码在单个分组中的水平时，编码系统提供这些边界值和已经生成的代表分割图像的代码的所有互补代码值。减少的边界值和互补码都被可变长度编码，然后被存储供图像重建系统使用或传输到图像重建系统。

66. 发明授权

US5562842A Material treatment apparatus combining a laser diode and an illumination light with a video imaging system 失效
标题翻译：将激光二极管和照明光与视频成像系统结合的材料处理装置
公开(公告)号：US5562842A
公开(公告)日：1996-10-08
申请号：US324343
申请日：1994-10-17
申请人： Paul Laferriere
发明人： Paul Laferriere
IPC分类号： B23K26/03 , B23K26/02
CPC分类号： B23K26/032 , B23K26/0648 , B23K26/0665
摘要： Apparatus for laser treatment of a material includes a source that generates a laser beam which a lens focuses into a focused beam having a predetermined cross-sectional diameter defining a spot. A dichroic mirror directs the focused beam along an optical axis such that the spot is produced on the material for treatment. A video camera monitors the treatment of the material and has an optical path extending at least partially along the optical axis of the focused beam. A ring illuminator is disposed around the optical axis to directly illuminate the material.
摘要翻译：用于激光处理材料的装置包括产生激光束的光源，其将透镜聚焦成具有限定斑点的预定横截面直径的聚焦光束。分色镜将聚焦光束沿着光轴引导，使得光斑在待处理的材料上产生。摄像机监视材料的处理，并且具有至少部分地沿聚焦光束的光轴延伸的光路。环形照明器设置在光轴周围以直接照亮材料。

67. 发明授权

US5528195A Selective type quadrature demodulator 失效
标题翻译：选择型正交解调器
公开(公告)号：US5528195A
公开(公告)日：1996-06-18
申请号：US437794
申请日：1995-05-09
申请人： Cheng-Youn Lu , Robert S. Burroughs
发明人： Cheng-Youn Lu , Robert S. Burroughs
IPC分类号： H04L27/38
CPC分类号： H04L27/3827
摘要： A quadrature demodulator for demodulating an input signal which includes respective data signals modulating in-phase and quadrature carriers. The demodulator includes a voltage controlled oscillator responsive to a control signal for generating an oscillatory signal. A demodulator, coupled to receive the oscillatory signal from the voltage controlled oscillator and the input signal, provides the in-phase and quadrature components of the input signal. Phase comparison circuitry, responsive to the in-phase and quadrature components of the input signal generates a phase error signal. The phase error signal represents the difference, in phase and magnitude, between a vector defined by the in-phase and quadrature components of the input signal and reference vectors. Filter circuitry, responsive to the phase error signal, generates a control signal for the voltage controlled oscillator. Phase error correction circuitry selectively applies the error signal to the filter circuitry when the magnitude of a vector defined by the in-phase and quadrature components of the input signal exceeds a first threshold. Another embodiment provides the phase error signal to the filter circuitry when the magnitude of a vector defined by the in-phase and quadrature components of the input signal either exceeds a first threshold or is less than a second threshold.
摘要翻译：一种用于解调输入信号的正交解调器，其包括调制同相和正交载波的各个数据信号。解调器包括响应于用于产生振荡信号的控制信号的压控振荡器。耦合以从压控振荡器和输入信号接收振荡信号的解调器提供输入信号的同相和正交分量。响应于输入信号的同相和正交分量的相位比较电路产生相位误差信号。相位误差信号表示由输入信号和参考矢量的同相和正交分量确定的矢量之间的相位和幅度差。滤波电路响应于相位误差信号，产生压控振荡器的控制信号。当由输入信号的同相和正交分量限定的矢量的大小超过第一阈值时，相位误差校正电路有选择地将误差信号施加到滤波器电路。当由输入信号的同相和正交分量限定的矢量的大小超过第一阈值或小于第二阈值时，另一实施例向滤波器电路提供相位误差信号。

68. 发明授权

US5509597A Apparatus and method for automatic monitoring and control of a soldering process 失效
标题翻译：焊接工艺自动监测和控制的装置和方法
公开(公告)号：US5509597A
公开(公告)日：1996-04-23
申请号：US323822
申请日：1994-10-17
申请人： Paul Laferriere
发明人： Paul Laferriere
IPC分类号： B23K1/005 , H05K1/02 , H05K3/34
CPC分类号： H05K3/3421 , B23K1/0056 , B23K2201/36 , H05K1/0269 , H05K2201/09918 , H05K2201/10689 , H05K2203/0545 , H05K2203/107 , H05K2203/163 , H05K3/3494 , Y02P70/613
摘要： Apparatus and method for soldering a first material to a second material uses a laser and involves applying solder paste over the first material, placing the second material on the solder paste in alignment with the first material to form a sample, and focusing a laser beam onto a predetermined location on the sample to segment the solder paste and form a solder joint between the first material and the second material. During the soldering, optical images of at least one region-of-interest in the solder paste adjacent the solder joint are captured. Formation of the solder joint is monitored by repeatedly calculating pixel value sums in the region-of-interest from the optical images to determine whether the solder paste in the region-of-interest has segmented. Control signals may be generated based on the pixel value sums and used to adjust at least one of the intensity and duration of the laser beam.
摘要翻译：用于将第一材料焊接到第二材料的装置和方法使用激光并且包括将焊膏涂覆在第一材料上，将第二材料放置在与第一材料对准的焊膏上以形成样品，并将激光束聚焦到样品上的预定位置以分割焊膏并在第一材料和第二材料之间形成焊接接头。在焊接期间，捕获与焊料相邻的焊膏中至少一个感兴趣区域的光学图像。通过从光学图像重复计算感兴趣区域中的像素值和来确定感兴趣区域中的焊膏是否已经被分割来监测焊接点的形成。可以基于像素值和生成控制信号，并且用于调整激光束的强度和持续时间中的至少一个。

69. 发明授权

US5418563A Dynamic peaking aperture correction for use with a CCD camera 失效
标题翻译：用于CCD相机的动态峰值孔径校正
公开(公告)号：US5418563A
公开(公告)日：1995-05-23
申请号：US163013
申请日：1993-12-06
申请人： Lee R. Dischert , Robert J. Topper , Thomas J. Leacock , Joseph F. Hacke
发明人： Lee R. Dischert , Robert J. Topper , Thomas J. Leacock , Joseph F. Hacke
IPC分类号： H04N5/208 , H04N5/359 , H04N5/372 , H04N3/14
CPC分类号： H04N5/372 , H04N5/3597
摘要： An apparatus is provided for processing the output signals of a charge transfer device having at least one row of photoelectric elements. The charge transfer device produces output signals with charge levels that are provided to a shift register having a plurality of elements. The successive charge levels from each photoelectric element are provided to respective shift register elements, and the charge levels are transferred within the shift register to a readout terminal. Some of the charge is retained by each element as the charge is transferred. The retained charge is added to the next charge transferred into the element. This adding of residual charges averages the charges transferred, producing undesirable noise. A sample and hold device removes sampling artifacts inherent in the signal provided by the CCD, to produce a signal representing successive image pixel values. A peaking filter emphasizes high frequency components relative to low frequency components, to compensate for low pass filtering effects which may occur in the CCD.
摘要翻译：提供一种用于处理具有至少一行光电元件的电荷转移装置的输出信号的装置。电荷转移装置产生具有提供给具有多个元件的移位寄存器的电荷电平的输出信号。每个光电元件的连续充电电平被提供给各个移位寄存器元件，并且电荷电平在移位寄存器内传送到读出端。当电荷转移时，每个元素保留一些电荷。保留的电荷被添加到转移到元件中的下一个电荷中。剩余费用的增加平均所转移的费用，产生不良的噪音。采样和保持装置去除由CCD提供的信号中固有的采样伪像，以产生表示连续图像像素值的信号。峰值滤波器强调相对于低频分量的高频分量，以补偿CCD中可能发生的低通滤波效应。

70. 发明授权

US5402453A Apparatus and method for reliably clocking a signal with arbitrary phase 失效
标题翻译：用于可靠地计时任意相位信号的装置和方法
公开(公告)号：US5402453A
公开(公告)日：1995-03-28
申请号：US184652
申请日：1994-01-21
申请人： Kenneth E. Vavreck , Lee R. Dischert
发明人： Kenneth E. Vavreck , Lee R. Dischert
IPC分类号： H03L7/00 , H04L7/02 , H04N5/04 , H04N9/44 , H03D1/00 , H04B7/10 , H04L7/00
CPC分类号： H04N9/44 , H03L7/00 , H04N5/04
摘要： A clocking circuit and method for phasing a signal with an unknown phase to a clock signal includes a time requirement duration (TRD) signal which has two states and the duration of one of the states is indicative of a combined setup and hold time requirement for the storage device intended to capture the unknown phase signal. The TRD signal is then clocked as a function of the unknown phase signal and called a toggle clock phase (TCP) signal. The TCP signal is then used to modify the phase of a clock enable for the storage device signal to ensure adequate setup and hold time for the clocking of the unknown phase signal.
摘要翻译：用于将具有未知相位的信号与时钟信号相位的时钟电路和方法包括具有两个状态的时间需求持续时间（TRD）信号，并且一个状态的持续时间表示对于存储设备旨在捕获未知相位信号。然后将TRD信号作为未知相位信号的函数计时，并称为切换时钟相位（TCP）信号。然后，TCP信号用于修改存储设备信号的时钟使能的相位，以确保对未知相位信号的计时的适当建立和保持时间。

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