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51. 发明申请

US20020024399A1 Voltage independent PWM base frequency generating method 有权
标题翻译：电压独立PWM基频产生方法
公开(公告)号：US20020024399A1
公开(公告)日：2002-02-28
申请号：US09925424
申请日：2001-08-10
申请人： PROLIFIC TECHNOLOGY INC.
发明人： Chia-Chang Hsu , Chih-Shih Yang
IPC分类号： H03K007/08
CPC分类号： H03K7/08 , H02P6/08
摘要： A DC brushless motor operation speed control method is disclosed. First, a linearly voltage dependent current source is used to charge a capacitor and the terminal voltage of the capacitor is coupled to a linearly voltage dependent base frequency level detector. When the output voltage of the capacitor reaches the base frequency reference voltage, the signal output from the base frequency level detector will make the capacitor discharge, outputting a series of base frequency triangular waves. Under different supply voltages, all the generated base frequency triangular waves have the same cycle time. The base frequency triangular waves are transmitted to a speed control comparator. Through pulse width modulation, the speed control reference voltage adjusts the output pulse width of the comparator and thereby controls the speed of the motor.
摘要翻译：公开了一种直流无刷电机运行速度控制方法。首先，使用线性电压相关电流源对电容器充电，并且电容器的端子电压耦合到线性电压依赖的基极频率电平检测器。当电容器的输出电压达到基准频率参考电压时，从基频电平检测器输出的信号将使电容放电，输出一系列基频三角波。在不同的电源电压下，所有产生的基频三角波具有相同的周期时间。基频三角波被传送到速度控制比较器。通过脉宽调制，速度控制参考电压调节比较器的输出脉冲宽度，从而控制电机的转速。

52. 发明申请

US20020017962A1 Modulation circuit and image display using the same 失效
标题翻译：调制电路和图像显示使用相同
公开(公告)号：US20020017962A1
公开(公告)日：2002-02-14
申请号：US09873425
申请日：2001-06-05
发明人： Yuichi Takagi
IPC分类号： H03K007/08
CPC分类号： G09G3/2085 , G09G3/2014 , G09G3/2025 , G09G3/32 , H03K7/10
摘要： A modulation circuit and an image display able to be set to match the relation of a luminance data and a luminance of an LED with a null-characteristic of a CRT without increasing the bit length of the luminance data or performing pre-processing such as making corrections to the luminance data. By the A/D converter, the digitalized luminance data is converted into a serial data by the controller, and is output to pulse width modulation circuits in cascade connection. In each pulse width modulation circuit, a pulse current of a pulse width corresponding to the luminance data is generated, and the LED connected to each pulse width modulation circuit is driven by the current to emit light. Further, the amplitude of the pulse current is variable in accordance with the count of a counter for counting clock signals in the period of the pulse current. As a result, the relation of the time-averaged pulse current flowing in the LED and the luminance data can be made to match the null-characteristic of a CRT.
摘要翻译：一种调制电路和图像显示器，其能够被设置为将亮度数据和亮度与CRT的伽马特性的关系匹配，而不增加亮度数据的位长度或执行诸如制作之类的预处理校正亮度数据。通过A / D转换器，数字化亮度数据由控制器转换为串行数据，并且以级联方式输出到脉宽调制电路。在每个脉冲宽度调制电路中，产生与亮度数据相对应的脉冲宽度的脉冲电流，并且连接到每个脉冲宽度调制电路的LED由电流驱动以发光。此外，脉冲电流的振幅根据在脉冲电流的周期中对时钟信号进行计数的计数器的计数而变化。结果，可以使流过LED的时间平均脉冲电流与亮度数据的关系与CRT的伽马特性相匹配。

53. 发明申请

US20040233982A1 Apparatus and method for generating pulse based on time delay and wave transform and transmitter of multi-frequency band communication system using the same 失效
标题翻译：基于时频延迟和波变换的脉冲发生装置及其方法，使用该脉冲的多频段通信系统的发射机
公开(公告)号：US20040233982A1
公开(公告)日：2004-11-25
申请号：US10850614
申请日：2004-05-21
发明人： Seung-Sik Lee , Jae-Young Kim , Hyung-Soo Lee , Chang-Joo Kim
IPC分类号： H03K007/08
CPC分类号： H03K5/06
摘要： Disclosed is an apparatus and method for generating pulse based on time delay and wave transform and transmitter of multi-frequency band communication system using the same. The apparatus includes: an apparatus for generating a pulse based on time delay and wave transform, including: a time delay control unit having a plurality of time delay controller, each for providing time delay information; an amplitude control unit for providing amplitude information; a time delay unit having a plurality of time delayers, each for departing a square wave from a trigger signal, delaying time of the square wave based on the time delay information, and adjusting an amplitude of the square wave based on the amplitude information, to thereby generate a time-delayed signal; a pulse shaping unit for shaping a pulse based on the time-delayed signals; and a wave transforming unit for transforming the pulse to a desired signal.
摘要翻译：公开了一种基于时间延迟和波变换产生脉冲的装置和方法以及使用该脉冲的多频带通信系统的发射机。该装置包括：用于基于时间延迟和波变换产生脉冲的装置，包括：具有多个时间延迟控制器的时延控制单元，每个延时控制单元用于提供时间延迟信息; 幅度控制单元，用于提供幅度信息; 具有多个时间延迟器的时间延迟单元，每个时间延迟器用于从触发信号离开方波，基于时间延迟信息延迟方波的时间，并且基于振幅信息调整方波的幅度，从而产生延时信号; 脉冲整形单元，用于基于所述时间延迟信号对脉冲进行整形; 以及用于将脉冲变换为期望信号的波变换单元。

54. 发明申请

US20040232964A1 DISTRIBUTING CLOCK AND PROGRAMMING PHASE SHIFT IN MULTIPHASE PARALLELABLE CONVERTERS 有权
标题翻译：多相并行转换器中的分配时钟和编程相位切换
公开(公告)号：US20040232964A1
公开(公告)日：2004-11-25
申请号：US10440784
申请日：2003-05-19
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Stefan Wlodzimierz Wiktor , Vladimir Alexander Muratov
IPC分类号： H03K003/017 , H03K005/04 , H03K007/08
CPC分类号： H02J1/102
摘要： A highly efficient multi-phase power system having both reduced size and reduced cost. The multi-phase power system includes a plurality of Pulse Width Modulation (PWM) controllers. A first controller is programmed to function as a nullmasternull controller, and the remaining controller(s) are programmed to function as nullslavenull controllers. Each controller includes a synchronous counter and control logic circuitry. The control logic generates at least one synchronization output signal based on the outputs of the counter and the programming state (i.e., master or slave) of the controller. The master controller generates a master clock signal having a synchronizing state encoded thereon and provides the master clock to the slave controller, which includes synchronization circuitry for receiving the master clock and resetting the counter based on the synchronizing state of the master clock, thereby assuring that appropriate phase relationships are maintained between the controller outputs.
摘要翻译：具有减小尺寸并降低成本的高效多相电力系统。多相电力系统包括多个脉冲宽度调制（PWM）控制器。第一个控制器被编程为用作“主”控制器，其余的控制器被编程为“从”（slave）控制器。每个控制器包括同步计数器和控制逻辑电路。控制逻辑基于计数器的输出和控制器的编程状态（即主机或从机）产生至少一个同步输出信号。主控制器产生具有编码在其上的同步状态的主时钟信号，并将主时钟提供给从控制器，其包括用于接收主时钟的同步电路，并且基于主时钟的同步状态来重置计数器，从而确保在控制器输出之间保持适当的相位关系。

55. 发明申请

US20040222866A1 Digital pulse width modulation 有权
标题翻译：数字脉宽调制
公开(公告)号：US20040222866A1
公开(公告)日：2004-11-11
申请号：US10430099
申请日：2003-05-06
发明人： Robert E. Stengel , Wen Yu
IPC分类号： H03K007/08
CPC分类号： H03L7/0812 , H03K5/131 , H03K5/133 , H03K7/08 , H03L7/0891
摘要： A digital technique for pulse width modulation (PWM) utilizes a tapped delay line 304 receiving a reference clock and generating a plurality of time delayed reference clock transitions having finer time resolution than the reference clock signal. A multiplexer 120 receives the plurality of time delayed reference clock transitions as an input thereto and producing an output when one of the plurality of time delayed reference clock transitions is addressed. An accumulator circuit 524 generates control timing signals associated with the input signal sampling rate Fsample that are used to select outputs from the delay line 304 representing a pulse width modulated output signal.
摘要翻译：用于脉冲宽度调制（PWM）的数字技术利用抽头延迟线304接收参考时钟并产生具有比参考时钟信号更精细的时间分辨率的多个时间延迟的参考时钟转变。多路复用器120接收多个时间延迟的参考时钟转换作为其输入，并且在多个时间延迟的参考时钟转换中的一个被寻址时产生输出。累加器电路524产生与输入信号采样率Fsample相关联的控制定时信号，其用于选择来自表示脉宽调制输出信号的延迟线304的输出。

56. 发明申请

US20040183715A1 Current source modulator 失效
标题翻译：电流源调制器
公开(公告)号：US20040183715A1
公开(公告)日：2004-09-23
申请号：US10455544
申请日：2003-06-05
发明人： Gregory Alan Arlow
IPC分类号： G01S013/00 , H03K007/08
CPC分类号： H03F3/72 , G01S7/282 , H03F1/0205 , H03F2200/78 , H03F2203/7227
摘要： A current source modulator (202; 302, 502) provides power to radar transmitters. The modulator comprises a power supply (210, 310, 510) providing, when enabled, a known current to a storage capacitor (145). A comparator circuit (220) provides a signal (V220) when voltage (VC) across the storage capacitor (145) falls a reference voltage, and an enable circuit (225) responds to the comparator signal (V220) and an ON command signal to enable the power supply (210, 310, 510). The modulator (202, 302, 502) further includes a network (220N) associated with the comparator circuit (220) to retain the value of the signal (provide hysteresis) when the voltage across the storage capacitor is above the reference voltage. The modulator (202, 302, 502) may include a second network (320N) associated with a second comparator circuit, operable to retain a second signal when capacitor (145) voltage VC is above a reference voltage. In this aspect, there is a rapid charge and a trickle charge that reduces any charging overshoot.
摘要翻译：电流源调制器（202; 302,502）为雷达发射机提供功率。调制器包括电源（210,310,510），当使能时，向存储电容器（145）提供已知电流。当存储电容器（145）两端的电压（VC）下降到参考电压时，比较器电路（220）提供信号（V220），使能电路（225）响应于比较器信号（V220）和ON命令信号启用电源（210,310,510）。调制器（202,302,502）还包括与比较器电路（220）相关联的网络（220N），以在保持电容器两端的电压高于参考电压时保持信号值（提供迟滞）。调制器（202,302,502）可以包括与第二比较器电路相关联的第二网络（320N），当电容器（145）电压VC高于参考电压时，该第二网络可操作以保持第二信号。在这方面，有一个快速充电和涓流充电，减少任何充电过冲。

57. 发明申请

US20040146101A1 High resolution digital pulse width modulator for DC-DC voltage converter 有权
标题翻译：用于DC-DC电压转换器的高分辨率数字脉宽调制器
公开(公告)号：US20040146101A1
公开(公告)日：2004-07-29
申请号：US10350599
申请日：2003-01-24
申请人： Intersil Americas Inc.
发明人： Lawrence G. Pearce
IPC分类号： H03K007/08 , H03K009/08
CPC分类号： H03K5/133 , H02M3/157 , H03K7/08 , H03K2005/00058 , H03L7/00
摘要： A digitally-implemented pulse width modulation (PWM) signal generator forms the PWM pulse width as a rational number based on full cycles of a PWM reference clock, and offers a very high effective resolution of the PWM pulse signal that is compatible with multiphase DC-DC converters. Being totally digital allows digital error accumulation and correction to occur at the point of origin of the PWM signal, well upstream of the relatively slow voltage control feedback loop. Quantization errors are corrected before they can accumulate in the converter's DC output voltage.
摘要翻译：数字实现的脉冲宽度调制（PWM）信号发生器基于PWM参考时钟的全周期形成PWM脉冲宽度作为有理数，并提供与多相DC-DC相兼容的PWM脉冲信号的非常高的有效分辨率， DC转换器。完全数字化允许数字错误累积和校正发生在PWM信号的原点，在相对较慢的电压控制反馈回路的上游。量化误差在它们可以在转换器的直流输出电压中积累之前被校正。

58. 发明申请

US20040062303A1 Full bridge integral noise shaping for quantization of pulse width modulation signals 有权
标题翻译：全桥积分噪声整形，用于量化脉宽调制信号
公开(公告)号：US20040062303A1
公开(公告)日：2004-04-01
申请号：US10255213
申请日：2002-09-26
发明人： Pallab Midya , William J. Roeckner
IPC分类号： H03K007/08
CPC分类号： H03M1/0682 , H03F3/2173 , H03F2200/351 , H03M1/504
摘要： Systems and methods are described for full bridge integral noise shaping for quantization of pulse width modulated signals. A method for full bridge integral noise shaping comprises: receiving a first and a second reference PWM signal; summing the first and second reference PWM signals with a quantization error correction; quantizing the sum into a first and a second output PWM signal; differentially integrating the first and second reference PWM signals and the first and second output PWM signals according to a full bridge integral noise shaping algorithm to obtain the quantization error correction. An apparatus for performing a full bridge integral noise shaping quantization of a pulse modulated signal, includes: a single-ended to differential conversion circuit; and a full bridge INS quantizer circuit, coupled to the single-ended to differential conversion circuit.
摘要翻译：描述了用于量化脉冲宽度调制信号的全桥积分噪声整形的系统和方法。一种用于全桥积分噪声整形的方法，包括：接收第一和第二参考PWM信号; 用量化误差校正求和第一和第二参考PWM信号; 将所述和量化为第一和第二输出PWM信号; 根据全桥积分噪声整形算法对第一和第二参考PWM信号以及第一和第二输出PWM信号进行差分积分以获得量化误差校正。一种用于执行脉冲调制信号的全桥积分噪声整形量化的装置，包括：单端到差分转换电路; 和全桥INS量化器电路，耦合到单端到差分转换电路。

59. 发明申请

US20040047413A1 Means and method of data encoding and commuication at rates above the channel bandwidth 有权
标题翻译：数据编码和通信速率高于通道带宽的方法和方法
公开(公告)号：US20040047413A1
公开(公告)日：2004-03-11
申请号：US10656143
申请日：2003-09-08
发明人： Igor Anatolicvich Abrosimov
IPC分类号： H03K007/08 , H03K009/08
CPC分类号： H04L25/4908
摘要： The present invention relates to a coding apparatus for encoding data represented by 8 bit input symbols into 12 bit output codes for serially transmitting the codes along a communication channel, the codes being represented in the channel by signals having a limited minimum and maximum pulse width and sampled by a receiver at each receiver's clock period. The invention reduces artifacts introduced by sending data at a higher payload rate than the bandwidth of the communication channel, such as the voltage and current offsets introduced in the data at the receiver as a function of the preceding data.
摘要翻译：本发明涉及一种用于将由8位输入符号表示的数据编码为用于沿通信信道串行发送码的12位输出码的编码装置，该码在通道中由具有有限的最小和最大脉冲宽度的信号表示，在每个接收机的时钟周期由接收机采样。本发明减少了以比通信信道的带宽更高的有效载荷速率发送数据而引入的伪像，例如作为前面数据的函数在接收机处的数据中引入的电压和电流偏移。

60. 发明申请

US20040001542A1 Method and apparatus for measuring the rotational speed of a fan 有权
标题翻译：用于测量风扇旋转速度的方法和装置
公开(公告)号：US20040001542A1
公开(公告)日：2004-01-01
申请号：US10188257
申请日：2002-07-01
发明人： Wayne A. Miller JR.
IPC分类号： H03K007/08 , H03K009/08
CPC分类号： H02P6/06 , H02P6/17
摘要： A system may include a PWM (Pulse Width Modulator) configured to generate a PWM signal, a signal modifier configured to generate a modified PWM signal that includes a sampling activation signal having a different frequency than the PWM signal, fan drive circuitry configured to provide power to a fan in response to the modified PWM signal; and a sampling unit configured to sample a fan tachometer signal in response to an indication that the fan is currently powered.
摘要翻译：系统可以包括被配置为产生PWM信号的PWM（脉宽调制器），被配置为产生修改的PWM信号的信号修改器，该修改的PWM信号包括具有与PWM信号不同的频率的采样激活信号，风扇驱动电路被配置为提供功率响应于修改的PWM信号到风扇; 以及采样单元，其被配置为响应于风扇当前被供电的指示来采样风扇转速计信号。

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