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    • 52. 发明授权
    • Track while scan operation on scintillating point targets
    • 跟踪闪烁点目标上的扫描操作
    • US3987440A
    • 1976-10-19
    • US596687
    • 1975-07-16
    • Paul M. Danzer
    • Paul M. Danzer
    • G01S13/72G01S7/30G01S9/02
    • G01S13/72
    • In a track while scan radar system having a tracking processor for providing range and azimuth tracking gates for automatic range and azimuth cursor tracking of a designated target in response to the magnitudes of target return signals received within the tracking gates, circuitry is provided for predicting the magnitudes of succeeding designated target return signals as a function of the actual magnitudes of preceding designated target return signals, and for providing through accumulator circuits to the tracking processor a signal manifestation of each succeeding target return signal occurring within the tracking gates, the magnitude of the signal manifestation being a function of the comparative magnitudes of the predicted and actual target return signal.
    • 在具有跟踪处理器的扫描雷达系统的轨道中,响应于在跟踪门内接收的目标返回信号的大小,提供用于指定目标的自动范围和方位角光标跟踪的距离和方位跟踪门,提供电路用于预测 随后的指定目标返回信号的大小作为先前指定目标返回信号的实际幅度的函数,并且通过累加器电路向跟踪处理器提供在跟踪门内发生的每个后续目标返回信号的信号表现, 信号表现是预测和实际目标返回信号的比较幅度的函数。
    • 54. 发明授权
    • Multi-level digital coincidence detection
    • 多级数字一致检测
    • US3887918A
    • 1975-06-03
    • US35861773
    • 1973-05-09
    • ITT
    • BAILEY JOHN SHAMMERS DAVID E
    • G01S13/28G01S7/30
    • G01S13/288
    • A multi-level coincidence detector for use in a radar system which transmits relatively long pulses each divided into a plurality of successive subpulses, each discretely digitally phase coded. In order to effect pulse compression on reception, the transmitted codes are stored, and received bipolar video is hard limited and examined by a delay-line or shift register coincidence detector arrangement against the stored code in groups, each containing a fraction of the subpulses of the total transmitted pulse duration. Each of the detectors at this first level coincidence detection operates to provide a first or second digital output level based on affirmative comparison of received vs. stored codes during that group (fraction of the subpulses). A second level coincidence detector examines the output of each coincidence detector of this first level and provides a digital output, for example, corresponding to presence of signal when a predetermined fraction of the first level coincidence detectors have indicated presence of signal.
    • 一种在雷达系统中使用的多级重合检测器,其发送相对较长的脉冲,每个脉冲被分成多个连续的子脉冲,每个离散数字相位编码。 为了在接收时进行脉冲压缩,存储发送的代码,并且接收的双极视频被硬限制,并且通过延迟线或移位寄存器重合检测器装置对组中存储的代码进行检查,每组包含一部分子脉冲 总传输脉冲持续时间。 在该第一级重合检测中的每个检测器基于在该组(子脉冲的一部分)期间的接收到存储的代码的肯定比较来提供第一或第二数字输出电平。 第二电平重合检测器检查该第一电平的每个重合检测器的输出,并且当第一电平重合检测器的预定分数指示存在信号时,提供数字输出,例如对应于信号的存在。
    • 55. 发明授权
    • Time compression signal processor
    • 时间压缩信号处理器
    • US3786504A
    • 1974-01-15
    • US3786504D
    • 1971-03-29
    • RAYTHEON CO
    • COLLINS J
    • G01S7/292G01S13/72G01S7/30G01S9/02
    • G01S13/72G01S7/2923
    • A time compression system used for spectrum analysis of multichannel digital systems in which there are X identical input channels and Y identical filters. Each input is sampled in parallel and then quantized with an analog-to-digital converter. The inputs are then stored channel by channel in a random access memory. Readout begins at the end of the sample interval and each channel is read out serially. The stored digital signals are converted back to serial analog signals and fed to a single bank of filters for spectrum analysis.
    • 用于多通道数字系统频谱分析的时间压缩系统,其中有X个相同的输入通道和Y个相同的滤波器。 每个输入并行采样,然后用模拟 - 数字转换器进行量化。 然后,输入随机存取存储器逐个存储。 读数从采样间隔结束开始,每个通道串行读出。 存储的数字信号被转换回串行模拟信号,并馈送到单个滤波器以进行频谱分析。