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51. 发明申请

US20110025537A1 ACTIVE RESISTANCE-CAPACITOR INTEGRATOR AND CONTINUOUS-TIME SIGMA-DELTA MODULATOR WITH GAIN CONTROL FUNCTION 有权
标题翻译：具有增益控制功能的主动电阻电容器积分器和连续时间信号调制器
公开(公告)号：US20110025537A1
公开(公告)日：2011-02-03
申请号：US12843591
申请日：2010-07-26
申请人： Yi Gyeong KIM , Min Hyung CHO , Jong Kee KWON
发明人： Yi Gyeong KIM , Min Hyung CHO , Jong Kee KWON
IPC分类号： H03M3/00 , G06G7/18
CPC分类号： G06G7/186 , H03M3/43 , H03M3/454 , H03M3/486
摘要： Provided are an active resistance-capacitance (RC) integrator and a continuous-time sigma-delta modulator, which have a gain control function. The active RC integrator includes an amplifier, a first base resistor connected between a first input node and a positive input port of the amplifier, a second base resistor connected between a second input node and a negative input port of the amplifier, a first resistor unit connected between the second input node and the positive input port of the amplifier, and a second resistor unit connected between the first input node and the negative input port of the amplifier. A resistor network including resistors and switches is configured to vary an input resistance, so that an active RC integrator may have a gain control function.
摘要翻译：提供了具有增益控制功能的有源电阻 - 电容（RC）积分器和连续时间Σ-Δ调制器。有源RC积分器包括放大器，连接在放大器的第一输入节点和正输入端口之间的第一基极电阻器，连接在放大器的第二输入节点和负输入端口之间的第二基极电阻器，第一电阻器单元连接在放大器的第二输入节点和正输入端口之间，以及连接在放大器的第一输入节点和负输入端口之间的第二电阻器单元。包括电阻器和开关的电阻器网络被配置为改变输入电阻，使得有源RC积分器可以具有增益控制功能。

52. 发明申请

US20100283648A1 DeltaSigma Modulator 失效
标题翻译： DeltaSigma调制器
公开(公告)号：US20100283648A1
公开(公告)日：2010-11-11
申请号：US12662463
申请日：2010-04-19
申请人： Atsumi Niwa , Tomohiro Matsumoto , Takashi Moue
发明人： Atsumi Niwa , Tomohiro Matsumoto , Takashi Moue
IPC分类号： H03M3/00
CPC分类号： H03M3/37 , H03M3/43 , H03M3/454
摘要： Disclosed herein is a ΔΣ modulator including: at least one integrator; a quantizer for quantizing a signal output by the integrator and outputting the quantized signal as a digital signal; and a compensation section configured to compensate the ΔΣ modulator for a non-ideal characteristic caused by an internal loop delay, wherein the compensation section is a feedback path formed to start at the output node of the quantizer and end at the input node of the integrator immediately preceding the quantizer, and the feedback path formed to start at the output node of the quantizer and end at the input node of the integrator realizes a frequency-independent part in combination with the integrator and an internal DA converter which adopts the NRZ technique to suppress the signal amplitude at the quantizer input.
摘要翻译：本文所披露的是＆Dgr＆调制器，包括：至少一个积分器; 量化器，用于量化积分器输出的信号并输出量化信号作为数字信号; 以及补偿部分，用于补偿＆Dgr＆amp; 调制器，用于由内部环路延迟引起的非理想特性，其中补偿部分是形成为在量化器的输出节点处开始并在紧邻量化器之前的积分器的输入节点处结束的反馈路径，并且反馈路径形成为在量化器的输出节点处开始并在积分器的输入节点结束，实现与积分器和内部DA转换器的频率无关部分，其采用NRZ技术来抑制量化器输入处的信号幅度。

53. 发明授权

US07817075B2 Apparatus for converting MEMS inductive capacitance 有权
标题翻译：用于转换MEMS感应电容的装置
公开(公告)号：US07817075B2
公开(公告)日：2010-10-19
申请号：US12364526
申请日：2009-02-03
申请人： Chih-Shiun Lu
发明人： Chih-Shiun Lu
IPC分类号： H03M3/02
CPC分类号： H03M3/454 , H03M3/43
摘要： An apparatus for converting MEMS inductive capacitance to digital is provided, for converting the induced analog voltage of MEMS element into digital signal. The apparatus includes an ADC, a reference voltage circuit and a controller. With the integral circuit and the comparator of the ADC and the reference voltages generated by the reference voltage circuit, the apparatus of the present invention uses the switch signals generated by the controller to generate digital signals. The present invention can also be integrated with MEMS element into a single chip to achieve single-chip MEMS.
摘要翻译：提供了一种用于将MEMS感应电容转换为数字的装置，用于将MEMS元件的感应模拟电压转换为数字信号。该装置包括ADC，参考电压电路和控制器。利用积分电路和ADC的比较器和参考电压电路产生的参考电压，本发明的装置使用由控制器产生的开关信号来产生数字信号。本发明还可以将MEMS元件集成到单个芯片中以实现单芯片MEMS。

54. 发明申请

US20100214143A1 deltasigma MODULATION CIRCUIT AND SYSTEM 有权
标题翻译：三角洲调制电路和系统
公开(公告)号：US20100214143A1
公开(公告)日：2010-08-26
申请号：US12686973
申请日：2010-01-13
申请人： Hiroyuki NAKAMOTO
发明人： Hiroyuki NAKAMOTO
IPC分类号： H03M3/00
CPC分类号： H03M3/454 , H03M3/43
摘要： A ΔΣ modulation circuit that includes a first integrator and second integrator coupled in series, a quantizer coupled to an output of the second integrator, a delay device disposed in a feedback path from an output of the quantizer to an input of the first and second integrators, an adder which generates a difference between an output and an input of the quantizer, and a feedback circuit including a delay device which couples an output of the adder to an output of one of the first and second integrators.
摘要翻译： A＆Dgr＆＆调制电路，包括串联耦合的第一积分器和第二积分器，耦合到第二积分器的输出的量化器，设置在从量化器的输出到第一和第二积分器的输入的反馈路径中的延迟器件，加法器，其产生量化器的输出和输入之间的差;以及反馈电路，包括将加法器的输出耦合到第一和第二积分器之一的输出的延迟器件。

55. 发明申请

US20100117723A1 ACTIVE FILTER, DELTA-SIGMA MODULATOR, AND SYSTEM 失效
标题翻译：主动滤波器，DELTA-SIGMA调制器和系统
公开(公告)号：US20100117723A1
公开(公告)日：2010-05-13
申请号：US12610605
申请日：2009-11-02
申请人： Moo-Yeol CHOI
发明人： Moo-Yeol CHOI
IPC分类号： H03K5/00
CPC分类号： H03K3/0231 , H03M3/354 , H03M3/43 , H03M3/454
摘要： An active filter includes a first filter and a second filter. The first filter receives an input signal, and generates a first output signal by filtering the input signal. The second filter receives the first output signal during a time period adjusted based on a variation of a time constant of the first filter, and generates a second output signal by filtering the first output signal received during the time period. Therefore, a variation of a time constant is compensated by using post integration time control.
摘要翻译：有源滤波器包括第一滤波器和第二滤波器。第一滤波器接收输入信号，并通过滤波输入信号产生第一输出信号。第二滤波器在基于第一滤波器的时间常数的变化调整的时间段期间接收第一输出信号，并且通过对在该时间段期间接收的第一输出信号进行滤波来产生第二输出信号。因此，通过使用后积分时间控制来补偿时间常数的变化。

56. 发明申请

US20100066578A1 BANDPASS MULTI-BIT SIGMA-DELTA ANALOG TO DIGITAL CONVERSION 有权
标题翻译： BANDPASS多位SIGMA-DELTA模拟到数字转换
公开(公告)号：US20100066578A1
公开(公告)日：2010-03-18
申请号：US12560288
申请日：2009-09-15
申请人： Kevin William Glass , Craig A. Hornbuckle , C. Gary Nilsson
发明人： Kevin William Glass , Craig A. Hornbuckle , C. Gary Nilsson
IPC分类号： H03M3/00
CPC分类号： H03M3/348 , H03M3/424 , H03M3/454
摘要： Examples of a system and method for sigma-delta analog-to-digital conversion of an electrical input signal are disclosed. A bandpass-filtered signal based on an electrical input signal and an analog feedback signal may be provided. A multi-bit digital representation of the bandpass-filtered signal may be provided. An analog representation of the multi-bit digital representation may be provided. A return-to-zero (RTZ) carving operation may be performed on the analog representation to obtain the analog feedback signal.
摘要翻译：公开了用于电输入信号的Σ-Δ模数转换的系统和方法的示例。可以提供基于电输入信号和模拟反馈信号的带通滤波信号。可以提供带通滤波信号的多位数字表示。可以提供多比特数字表示的模拟表示。可以对模拟表示执行归零（RTZ）雕刻操作以获得模拟反馈信号。

57. 发明授权

US07609188B2 Multi-standard analog-to-digital data conversion 失效
标题翻译：多标准模数转换
公开(公告)号：US07609188B2
公开(公告)日：2009-10-27
申请号：US11944174
申请日：2007-11-21
申请人： Antonio Di Giandomenico , David San Segundo Bello , Andreas Wiesbauer , Susana Paton Alvarez , Jorg Hauptmann
发明人： Antonio Di Giandomenico , David San Segundo Bello , Andreas Wiesbauer , Susana Paton Alvarez , Jorg Hauptmann
IPC分类号： H03M3/02
CPC分类号： H03M3/398 , H03M3/416 , H03M3/454
摘要： Implementations related to multi-standard digital subscriber line analog-to-digital data conversion are described.
摘要翻译：描述与多标准数字用户线模数转换相关的实现。

58. 发明申请

US20090219185A1 Adjusting an Input Signal Level of a Sigma-Delta Converter 有权
标题翻译：调整Sigma-Delta转换器的输入信号电平
公开(公告)号：US20090219185A1
公开(公告)日：2009-09-03
申请号：US12096604
申请日：2006-12-19
申请人： Lars Sundstrom , Stefan Nilsson
发明人： Lars Sundstrom , Stefan Nilsson
IPC分类号： H03M3/00 , H03M1/06
CPC分类号： H03M3/49 , H03M3/454 , H03M3/486
摘要： The invention relates to adjusting an input signal level of a Sigma-Delta converter. A control signal indicative of an input signal level to said Sigma-Delta converter is generated, and the input signal level to said Sigma-Delta converter is adjusted in dependence of said control signal. The control signal is generated as a signal indicating an operating condition of said Sigma-Delta converter. In this way, internal signals from the Sigma-Delta converter can be used to determine the state of the Sigma-Delta converter, i.e. whether it is operating within its operational input range or not, and whether it is close to the limits of the operational input range. This provides a simple, but accurate guidance of an automatic gain control upstream of the Sigma-Delta converter.
摘要翻译：本发明涉及调整Σ-Δ转换器的输入信号电平。产生指示到所述Σ-Δ转换器的输入信号电平的控制信号，并且根据所述控制信号调整到所述Σ-Δ转换器的输入信号电平。产生控制信号作为指示所述Σ-Δ转换器的运行状态的信号。这样，Sigma-Delta转换器的内部信号可用于确定Sigma-Delta转换器的状态，即它是否在其运行输入范围内运行，以及是否接近运行的极限输入范围。这提供了对Sigma-Delta转换器上游的自动增益控制的简单但准确的指导。

59. 发明申请

US20080291069A1 DELTA SIGMA MODULATOR 失效
标题翻译： DELTA SIGMA调制器
公开(公告)号：US20080291069A1
公开(公告)日：2008-11-27
申请号：US12124079
申请日：2008-05-20
申请人： Fumihito INUKAI , Hitoshi Kobayashi
发明人： Fumihito INUKAI , Hitoshi Kobayashi
IPC分类号： H03M3/00
CPC分类号： H03M3/32 , H03M3/418 , H03M3/454 , H03M3/456
摘要： In a delta sigma modulator including first and second integration circuits connected in cascade, each as a component thereof, first and second power source terminals for supplying first and second different power source voltages to the first and second integration circuits are provided. The first power source voltage is supplied to the former-stage first integration circuit having a SNR which is largely affected by the magnitude of the power source voltage. The second power source voltage lower than the first power source voltage is supplied to the latter-stage second integration circuit having a SNR which is not largely affected by the magnitude of the power source voltage.
摘要翻译：在包括串联连接的第一和第二积分电路的三角Σ调制器中，每个作为其组成部分，提供用于向第一和第二积分电路提供第一和第二不同电源电压的第一和第二电源端子。第一电源电压被提供给前级第一积分电路，其具有很大程度上受电源电压幅度影响的SNR。低于第一电源电压的第二电源电压被提供给具有不受电源电压的大小的很大影响的SNR的后级第二积分电路。

60. 发明授权

US07450047B1 Sigma-delta modulator with DAC resolution less than ADC resolution and increased dynamic range 有权
标题翻译： DAC分辨率小于ADC分辨率的Sigma-delta调制器和增加的动态范围
公开(公告)号：US07450047B1
公开(公告)日：2008-11-11
申请号：US11850979
申请日：2007-09-06
申请人： Jian-Yi Wu
发明人： Jian-Yi Wu
IPC分类号： H03M3/00
CPC分类号： H03M3/412 , H03M3/428 , H03M3/454 , H03M3/464
摘要： A sigma-delta modulator is provided with a feedback digital-to-analog converter having less resolution than the quantizer, while providing a reduced length output word, requiring minimal additional internal processing, and shaping of the truncation error by an effective noise transfer function greater than the order of the host sigma-delta modulator, and further providing increased dynamic range.
摘要翻译： Σ-Δ调制器具有反馈数模转换器，其具有比量化器更低的分辨率，同时提供减小长度的输出字，需要最小额外的内部处理，并通过有效噪声传递函数对截断误差进行整形比主机Σ-Δ调制器的顺序，并进一步提供增加的动态范围。

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