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51. 发明申请

US20140367743A1 FIELD EFFECT TRANSISTOR, AND MULTILAYERED EPITAXIAL FILM FOR USE IN PREPARATION OF FIELD EFFECT TRANSISTOR 有权
标题翻译：场效应晶体管和用于制备场效应晶体管的多层外延膜
公开(公告)号：US20140367743A1
公开(公告)日：2014-12-18
申请号：US14470403
申请日：2014-08-27
申请人： Renesas Electronics Corporation
发明人： Takashi Inoue , Tatsuo Nakayama , Yuji Ando , Yasuhiro Murase , Kazuki Ota , Hironobu Miyamoto , Katsumi Yamanoguchi , Naotaka Kuroda , Akio Wakejima , Yasuhiro Okamoto
IPC分类号： H01L29/778 , H01L29/205 , H01L29/06 , H01L29/20
CPC分类号： H01L29/7783 , H01L29/0607 , H01L29/155 , H01L29/2003 , H01L29/205 , H01L29/42316 , H01L29/7787
摘要： In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a≧5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 Å) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.
摘要翻译：在III族氮化物型场效应晶体管中，本发明通过缓冲层中的残留载流子的传导来减少漏电流成分，并且可以实现击穿电压的提高，并且提高了载流子限制效应（载流子限制）提高夹断特性的通道（抑制短路效应）。例如，当将本发明应用于GaN型场效应晶体管时，除了沟道层的GaN之外，使用其中铝组成逐渐或逐步朝向顶部的组分调制（组成梯度）AlGaN层用作缓冲层（杂质缓冲液）。对于要制备的FET的栅极长度Lg，选择电子供给层和沟道层的层厚度的和a以满足Lg /a≥5，并且在这种情况下，沟道的层厚度只要在室温下积聚在通道层中的二维电子气的德布罗意波长，不超过5倍（约500）的范围内选择层。

52. 发明申请

US20140361409A1 Release Strategies for Making Transferable Semiconductor Structures, Devices and Device Components 有权
标题翻译：制定可转移半导体结构，器件和器件组件的发布策略
公开(公告)号：US20140361409A1
公开(公告)日：2014-12-11
申请号：US14246962
申请日：2014-04-07
申请人： THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS
发明人： John A. ROGERS , Ralph G. NUZZO , Matthew MEITL , Heung Cho KO , Jongseung YOON , Etienne MENARD , Alfred J. BACA
IPC分类号： H01L31/0735 , H01L31/0304 , H01L31/18
CPC分类号： H01L31/0735 , B81C1/0046 , B81C2201/0191 , B82Y10/00 , B82Y20/00 , B82Y40/00 , H01L21/7813 , H01L29/155 , H01L29/20 , H01L31/03046 , H01L31/068 , H01L31/0687 , H01L31/072 , H01L31/0725 , H01L31/184 , H01L31/1844 , H01L33/0079 , H01L2924/0002 , Y02E10/52 , Y02E10/544 , Y02E10/547 , Y02P70/521 , Y10T156/1195 , H01L2924/00
摘要： Provided are methods for making a device or device component by providing a multi layer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.
摘要翻译：提供了通过提供具有多个功能层和多个释放层的多层结构来制造器件或器件部件的方法，并且通过分离一个或多个释放层从多层结构释放功能层以产生多个的可转移结构。可转移结构被印刷到由器件衬底支撑的器件衬底或器件部件上。该方法和系统提供制造高质量和低成本的光伏器件，可转移的半导体结构（光电）器件和器件部件的手段。

53. 发明申请

US20140353587A1 EPITAXIAL WAFER FOR HETEROJUNCTION TYPE FIELD EFFECT TRANSISTOR 有权
标题翻译：异相型场效应晶体管的外延波形
公开(公告)号：US20140353587A1
公开(公告)日：2014-12-04
申请号：US14372366
申请日：2013-01-15
申请人： Sharp Kabushiki Kaisha
发明人： Masayuki Hoteida , Nobuaki Teraguchi , Daisuke Honda , Nobuyuki Ito , Masakazu Matsubayashi , Haruhiko Matsukasa
IPC分类号： H01L29/15 , H01L29/205 , H01L29/778 , H01L29/20
CPC分类号： H01L29/152 , H01L21/02381 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L21/0262 , H01L29/155 , H01L29/2003 , H01L29/205 , H01L29/7787
摘要： An epitaxial wafer for a heterojunction type FET includes an AlN primary layer, a stepwisely composition-graded buffer layer structure, a superlattice buffer layer structure, a GaN channel layer, and a nitride semiconductor electron supply layer, which are sequentially provided on a Si substrate, the stepwisely composition-graded buffer layer structure including a plurality of AlGaN buffer layers provided on each other such that an Al composition ratio is sequentially reduced, an uppermost layer thereof having a composition of AlxGa1—xN (0
摘要翻译：用于异质结型FET的外延晶片包括依次设置在Si衬底上的AlN初级层，逐步组成梯度缓冲层结构，超晶格缓冲层结构，GaN沟道层和氮化物半导体电子供应层逐步组成梯度缓冲层结构，其包括彼此提供的多个AlGaN缓冲层，使得Al组成比顺序地减少，其最上层具有Al x Ga 1-x N（0

54. 发明授权

US08860038B2 Nitride semiconductor device and manufacturing method for the same 有权
标题翻译：氮化物半导体装置及其制造方法相同
公开(公告)号：US08860038B2
公开(公告)日：2014-10-14
申请号：US13617156
申请日：2012-09-14
申请人： Masayuki Iwami , Takuya Kokawa
发明人： Masayuki Iwami , Takuya Kokawa
IPC分类号： H01L29/15 , H01L21/02 , H01L31/06 , H01L21/338 , H01L29/778 , H01L29/20
CPC分类号： H01L29/7787 , H01L29/155 , H01L29/2003
摘要： Provided is a nitride semiconductor device comprising a base substrate; a buffer layer formed above the base substrate; an active layer formed on the buffer layer; and at least two electrodes formed above the active layer. The buffer layer includes one or more composite layers that each have a plurality of nitride semiconductor layers with different lattice constants, and at least one of the one or more composite layers is doped with carbon atoms and oxygen atoms in at least a portion of a carrier region of the nitride semiconductor having the largest lattice constant among the plurality of nitride semiconductor layers, the carrier region being a region in which carriers are generated due to the difference in lattice constants between this nitride semiconductor layer and the nitride semiconductor layer formed directly thereon.
摘要翻译：提供了一种氮化物半导体器件，其包括基底基板; 形成在所述基底基板上的缓冲层; 形成在缓冲层上的有源层; 以及形成在有源层上方的至少两个电极。缓冲层包括一个或多个复合层，每个复合层各自具有不同晶格常数的多个氮化物半导体层，并且该一个或多个复合层中的至少一个在载体的至少一部分中掺杂有碳原子和氧原子在多个氮化物半导体层中具有最大晶格常数的氮化物半导体的区域，由于该氮化物半导体层和直接形成的氮化物半导体层之间的晶格常数的差异，载流子区域是其中产生载流子的区域。

55. 发明授权

US08853666B2 Field effect transistor, and multilayered epitaxial film for use in preparation of field effect transistor 有权
标题翻译：场效应晶体管和用于制备场效应晶体管的多层外延膜
公开(公告)号：US08853666B2
公开(公告)日：2014-10-07
申请号：US12159599
申请日：2006-10-25
申请人： Takashi Inoue , Tatsuo Nakayama , Yuji Ando , Yasuhiro Murase , Kazuki Ota , Hironobu Miyamoto , Katsumi Yamanoguchi , Naotaka Kuroda , Akio Wakejima , Yasuhiro Okamoto
发明人： Takashi Inoue , Tatsuo Nakayama , Yuji Ando , Yasuhiro Murase , Kazuki Ota , Hironobu Miyamoto , Katsumi Yamanoguchi , Naotaka Kuroda , Akio Wakejima , Yasuhiro Okamoto
IPC分类号： H01L29/06 , H01L29/15 , H01L29/778 , H01L29/423 , H01L29/20
CPC分类号： H01L29/7783 , H01L29/0607 , H01L29/155 , H01L29/2003 , H01L29/205 , H01L29/42316 , H01L29/7787
摘要： In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a≧5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 Å) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.
摘要翻译：在III族氮化物型场效应晶体管中，本发明通过缓冲层中的残留载流子的传导来减少漏电流成分，并且可以实现击穿电压的提高，并提高载流子限制效应（载流子限制）提高夹断特性的通道（抑制短路效应）。例如，当将本发明应用于GaN型场效应晶体管时，除了沟道层的GaN之外，使用其中铝组成逐渐或逐步朝向顶部的组分调制（组成梯度）AlGaN层用作缓冲层（杂质缓冲液）。对于要制备的FET的栅极长度Lg，选择电子供给层和沟道层的层厚度的和a以满足Lg /a≥5，并且在这种情况下，沟道的层厚度只要在室温下积聚在通道层中的二维电子气的德布罗意波长，不超过5倍（约500）的范围内选择层。

56. 发明申请

US20140264274A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20140264274A1
公开(公告)日：2014-09-18
申请号：US14198430
申请日：2014-03-05
申请人： Renesas Electronics Corporation
发明人： Tatsuo NAKAYAMA , Hironobu MIYAMOTO , Yasuhiro OKAMOTO , Ryohei NEGA , Masaaki KANAZAWA , Takashi INOUE
IPC分类号： H01L29/778
CPC分类号： H01L29/66462 , H01L29/155 , H01L29/2003 , H01L29/7787
摘要： To improve performance of a semiconductor device. For example, on the assumption that a superlattice layer is inserted between a buffer layer and a channel layer, a concentration of acceptors introduced into nitride semiconductor layers forming a part of the superlattice layer is higher than a concentration of acceptors introduced into nitride semiconductor layers forming the other part of the superlattice layer. That is, the concentration of acceptors introduced into the nitride semiconductor layers having a small band gap is higher than the concentration of acceptors introduced into the nitride semiconductor layers having a large band gap.
摘要翻译：提高半导体器件的性能。例如，假设超晶格层被插入在缓冲层和沟道层之间，则导入形成超晶格层的一部分的氮化物半导体层中的受主的浓度高于形成氮化物半导体层的受主的浓度超晶格层的另一部分。也就是说，导入具有小带隙的氮化物半导体层的受主的浓度高于导入具有大带隙的氮化物半导体层的受主的浓度。

57. 发明申请

US20140103397A1 TECHNIQUES FOR FORMING NON-PLANAR GERMANIUM QUANTUM WELL DEVICES 审中-公开
标题翻译：用于形成非平板锗量子阱器件的技术
公开(公告)号：US20140103397A1
公开(公告)日：2014-04-17
申请号：US14141648
申请日：2013-12-27
申请人： Ravi Pillarisetty , Jack T. Kavalieros , Willy Rachmady , Uday Shah , Benjamin Chu-Kung , Marko Radosavljevic , Niloy Mukherjee , Gilbert Dewey , Been Y. Jin , Robert S. Chau
发明人： Ravi Pillarisetty , Jack T. Kavalieros , Willy Rachmady , Uday Shah , Benjamin Chu-Kung , Marko Radosavljevic , Niloy Mukherjee , Gilbert Dewey , Been Y. Jin , Robert S. Chau
IPC分类号： H01L29/66 , H01L29/78
CPC分类号： H01L29/775 , B82Y10/00 , H01L21/76 , H01L29/0653 , H01L29/1054 , H01L29/155 , H01L29/165 , H01L29/267 , H01L29/517 , H01L29/66431 , H01L29/66439 , H01L29/66477 , H01L29/66795 , H01L29/66977 , H01L29/7782 , H01L29/7849 , H01L29/785 , H01L29/7851
摘要： Techniques are disclosed for forming a non-planar germanium quantum well structure. In particular, the quantum well structure can be implemented with group IV or III-V semiconductor materials and includes a germanium fin structure. In one example case, a non-planar quantum well device is provided, which includes a quantum well structure having a substrate (e.g. SiGe or GaAs buffer on silicon), a IV or III-V material barrier layer (e.g., SiGe or GaAs or AlGaAs), a doping layer (e.g., delta/modulation doped), and an undoped germanium quantum well layer. An undoped germanium fin structure is formed in the quantum well structure, and a top barrier layer deposited over the fin structure. A gate metal can be deposited across the fin structure. Drain/source regions can be formed at respective ends of the fin structure.
摘要翻译：公开了用于形成非平面锗量子阱结构的技术。特别地，量子阱结构可以用IV或III-V族半导体材料实现，并且包括锗鳍结构。在一个示例性情况下，提供了非平面量子阱器件，其包括具有衬底（例如硅上的SiGe或GaAs缓冲器），IV或III-V材料阻挡层（例如，SiGe或GaAs或 AlGaAs），掺杂层（例如，掺杂Δ/调制）和未掺杂的锗量子阱层。在量子阱结构中形成未掺杂的锗鳍结构，以及沉积在鳍结构上的顶部势垒层。栅极金属可以跨鳍片结构沉积。排水/源极区域可以形成在翅片结构的相应端部处。

58. 发明申请

US20140077154A1 Semiconductor Material Doping 有权
标题翻译：半导体材料掺杂
公开(公告)号：US20140077154A1
公开(公告)日：2014-03-20
申请号：US13803753
申请日：2013-03-14
申请人： Sensor Electronic Technology, Inc.
发明人： Maxim S Shatalov , Remigijus Gaska , Jinwei Yang , Michael Shur , Alexander Dobrinsky
IPC分类号： H01L33/06 , H01L33/32 , H01L33/00
CPC分类号： H01L33/06 , B82Y10/00 , B82Y20/00 , H01L29/155 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L33/0075 , H01L33/04 , H01L33/32 , H01S5/2009 , H01S5/3211 , H01S5/3216 , H01S5/3407 , H01S5/34333
摘要： A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. Additionally, a target doping level for the quantum well and/or adjacent barrier can be selected to facilitate a real space transfer of holes across the barrier. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity and/or actual doping level(s) correspond to the relevant target(s).
摘要翻译：提供了一种用于设计和/或制造包括量子阱和相邻屏障的结构的解决方案。选择量子阱和相邻屏障之间的目标频带不连续性以与量子阱和/或屏障的掺杂剂的活化能一致。例如，可以选择目标价带不连续性，使得相邻势垒中的掺杂剂的掺杂剂能级与量子阱的价态能带边缘和/或价态能带中的自由载流子的基态能量一致量子阱。另外，可以选择量子阱和/或相邻势垒的目标掺杂水平以促进穿过势垒的空穴的实际空间传递。可以形成量子阱和相邻势垒，使得实际的带不连续性和/或实际掺杂水平对应于相关目标。

59. 发明申请

US20140054593A1 NITRIDE SEMICONDUCTOR STRUCTURE 有权
标题翻译：氮化物半导体结构
公开(公告)号：US20140054593A1
公开(公告)日：2014-02-27
申请号：US13591232
申请日：2012-08-22
申请人： Chen-Zi Liao , Chih-Wei Hu , Yen-Hsiang Fang , Rong Xuan
发明人： Chen-Zi Liao , Chih-Wei Hu , Yen-Hsiang Fang , Rong Xuan
IPC分类号： H01L29/205
CPC分类号： H01L33/32 , H01L21/02381 , H01L21/02433 , H01L21/02458 , H01L21/02502 , H01L21/02507 , H01L21/0251 , H01L21/0254 , H01L29/155 , H01L33/02 , H01L33/16
摘要： A nitride semiconductor structure is provided. The nitride semiconductor structure at least includes a silicon substrate, a AlN layer, a AlGaN layer and a GaN layer formed on the AlGaN layer. The silicon substrate has a surface tilted at 0
摘要翻译：提供氮化物半导体结构。氮化物半导体结构至少包括在AlGaN层上形成的硅衬底，AlN层，AlGaN层和GaN层。硅衬底具有相对于垂直于（111）晶面的轴线倾斜0°<θ0.5°的表面，并且在表面上形成AlN层。 AlN层形成在AlN层上。此外，AlGaN层中的Al含量在从硅衬底侧朝向GaN层侧的层厚度方向上逐渐减小。

60. 发明申请

US20140054548A1 TECHNIQUES FOR FORMING NON-PLANAR GERMANIUM QUANTUM WELL DEVICES 审中-公开
公开(公告)号：US20140054548A1
公开(公告)日：2014-02-27
申请号：US14069880
申请日：2013-11-01
申请人： Ravi Pillarisetty , Jack T. Kavalieros , Willy Rachmady , Uday Shah , Benjamin Chu-Kung , Marko Radosavljevic , Niloy Mukherjee , Gilbert Dewey , Been-Yih Jin , Robert S. Chau
发明人： Ravi Pillarisetty , Jack T. Kavalieros , Willy Rachmady , Uday Shah , Benjamin Chu-Kung , Marko Radosavljevic , Niloy Mukherjee , Gilbert Dewey , Been-Yih Jin , Robert S. Chau
IPC分类号： H01L29/775 , H01L21/76 , H01L29/66
CPC分类号： H01L29/775 , B82Y10/00 , H01L21/76 , H01L29/0653 , H01L29/1054 , H01L29/155 , H01L29/165 , H01L29/267 , H01L29/517 , H01L29/66431 , H01L29/66439 , H01L29/66477 , H01L29/66795 , H01L29/66977 , H01L29/7782 , H01L29/7849 , H01L29/785 , H01L29/7851
摘要： Techniques are disclosed for forming a non-planar germanium quantum well structure. In particular, the quantum well structure can be implemented with group IV or III-V semiconductor materials and includes a germanium fin structure. In one example case, a non-planar quantum well device is provided, which includes a quantum well structure having a substrate (e.g. SiGe or GaAs buffer on silicon), a IV or III-V material barrier layer (e.g., SiGe or GaAs or AlGaAs), a doping layer (e.g., delta/modulation doped), and an undoped germanium quantum well layer. An undoped germanium fin structure is formed in the quantum well structure, and a top barrier layer deposited over the fin structure. A gate metal can be deposited across the fin structure. Drain/source regions can be formed at respective ends of the fin structure.

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