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    • 52. 发明授权
    • Circuit for the detection of short voltage glitches in a supply voltage
    • 用于检测电源电压中短路毛刺的电路
    • US06751079B2
    • 2004-06-15
    • US10128816
    • 2002-04-24
    • Ernst Bretschneider
    • Ernst Bretschneider
    • H02H308
    • G01R19/16538G01R31/40G06F1/28
    • The invention relates to a circuit for the detection of short voltage glitches in a supply voltage Vsup (glitch detector). According to the circuit the two inputs (VN, VP) of a comparator (C) are connected to a voltage divider (R1, R2, R3). In case of a short voltage glitch the connection of the first input (VN) of the comparator (C) to the voltage divider is interrupted via a first transistor (N1), so that this input is fixed at the previous voltage level, while the other input (VP) changes in accordance with the voltage glitch. If the change is strong enough, there is a polarity reversal at the input of the comparator (C) and thus a flipping of the output signal (OUT) which shows the detection of a voltage glitch.
    • 本发明涉及用于检测供电电压Vsup(毛刺检测器)中短路毛刺的电路。 根据电路,比较器(C)的两个输入端(VN,VP)连接到分压器(R1,R2,R3)。 在短路电压短路的情况下,比较器(C)的第一输入(VN)与分压器的连接通过第一晶体管(N1)中断,使得该输入固定在先前的电压电平,而 其他输入(VP)根据电压毛刺而变化。 如果变化足够强,则在比较器(C)的输入端处具有极性反转,并且因此显示出电压毛刺检测的输出信号(OUT)的翻转。
    • 54. 发明申请
    • Supply voltage level detector
    • 电源电压检测器
    • US20030102855A1
    • 2003-06-05
    • US10026673
    • 2001-12-27
    • Hynix Semiconductor Inc.
    • Dae Han Kim
    • G01R031/02
    • G01R19/16538
    • The present invention relates to a supply voltage level detector. The supply voltage level detector includes a reference voltage generator for generating the reference voltage of a constant level depending on a control signal, a compare voltage generator for generating a compare voltage the variation ratio of which is higher than the supply voltage supplied from the outside depending on the control signal, and a comparator for comparing the reference voltage and the compare voltage depending on the control signal to output a given signal. The present invention constructs the compare voltage generator in the supply voltage level detector so that the variation of the compare voltage depending on the variation of the supply voltage becomes great. Therefore, the present invention can improve the sensing margin of the comparator for sensing the difference between the reference voltage and the compare voltage. Also, the present invention can prevent erroneous operation by a noise to accomplish a stable operation.
    • 本发明涉及电源电压电平检测器。 电源电压电平检测器包括:参考电压发生器,用于根据控制信号产生恒定电平的参考电压;比较电压发生器,用于产生其变化率高于从外部提供的电源电压的比较电压, 以及用于根据控制信号比较参考电压和比较电压以输出给定信号的比较器。 本发明构成电源电压检测器中的比较电压发生器,使得根据电源电压变化的比较电压的变化变大。 因此,本发明可以提高比较器的感测裕度,用于感测参考电压和比较电压之间的差异。 此外,本发明可以防止噪声的错误操作来实现稳定的操作。
    • 55. 发明申请
    • Power failure sensing device and a card reader having a power failure sensing device
    • 电源故障检测装置和具有电源故障检测装置的读卡器
    • US20030018933A1
    • 2003-01-23
    • US10184188
    • 2002-06-27
    • Hisashi Yamamoto
    • H04B001/74G06K005/00
    • G06F1/28G01R19/16538
    • A power failure detection system for detecting power failures in a cash dispenser machine and in an associated card reader includes an external signal input part for receiving a power failure signal from a first power failure sensing circuit located in a host cash dispenser machine, a card reader associated with the cash dispenser; an internal power source located in the card reader, a second power failure sensing circuit located in the card reader; a power failure signal output part for receiving and processing power failure signals from the external signal input part and from the second power failure sensing circuit. The power failure signal output part contains a circuit to output a final power failure signal if either the card reader or the cash dispenser has a power failure wherein the shape of said final power failure signal indicates whether the card reader or the cash dispenser or both experience a power failure.
    • 一种用于检测自动提款机和相关读卡器中的电源故障的电源故障检测系统,包括外部信号输入部分,用于从位于主机自动提款机中的第一电源故障检测电路接收电力故障信号,读卡器 与自动提款机相关联; 位于读卡器中的内部电源,位于读卡器中的第二电源故障感测电路; 电源故障信号输出部分,用于接收和处理来自外部信号输入部分和来自第二电源故障检测电路的电源故障信号。 电源故障信号输出部分包含用于输出最终停电信号的电路,如果读卡器或自动提款机有电源故障,其中所述最终停电信号的形状指示读卡器或自动提款机或两者是否经历 电源故障
    • 56. 发明授权
    • Power conversion device with power source voltage drop detection unit
    • 具有电源电压降检测单元的电源转换装置
    • US06442049B1
    • 2002-08-27
    • US10059322
    • 2002-01-31
    • Tadamitsu YoshikawaHiroaki Matsumoto
    • Tadamitsu YoshikawaHiroaki Matsumoto
    • H02M540
    • G01R19/16538G01R19/16542H02M1/32
    • In a power conversion device according to the present invention, an AC power source voltage signal Vac which is the instantaneous value of AC power source 1 detected by a power source voltage detection circuit comprising a transformer 5, rectifier 6 and A/D converter 7 is averaged by an averaging circuit 9 and an average AC power source voltage signal Vave is output. This average AC power source voltage signal Vave and AC power source voltage signal Vac are compared in comparator 8 and, if their deviation is more than a prescribed value, a power source voltage drop detection signal PSF_S is output. Spurious detection of power source voltage drop resulting from the effect of power source fluctuations can thereby be prevented.
    • 在根据本发明的电力转换装置中,由包括变压器5,整流器6和A / D转换器7的电源电压检测电路检测的作为交流电源1的瞬时值的交流电源电压信号Vac是 由平均电路9平均并输出平均AC电源电压信号Vave。 在比较器8中比较该平均交流电源电压信号Vave和交流电源电压信号Vac,如果它们的偏差大于规定值,则输出电源电压降检测信号PSF_S。 因此可以防止由电源波动的影响引起的电源电压降的杂散检测。
    • 58. 发明申请
    • Voltage detection circuit, power-on/off reset circuit, and semiconductor device
    • 电压检测电路,上电/断开复位电路以及半导体器件
    • US20010036119A1
    • 2001-11-01
    • US09803775
    • 2001-03-12
    • Hiroshige HiranoKouji AsariTatsumi Sumi
    • G11C005/00
    • H03K17/223G01R19/0084G01R19/155G01R19/16538G06F1/28G11C5/143G11C8/08G11C11/22
    • The present invention comprises a first MOS transistor whose gate and drain are connected with a first node, a second MOS transistor whose gate and drain are connected with the first node and a third node, respectively, a first resistive element which is connected between the first node and a second node, a second resistive element which is connected between the second node and a ground voltage terminal, a first NOT circuit whose input terminal is connected with the second node, whose output terminal is a fourth node, and which is connected between the third node and the ground voltage terminal, and a second NOT circuit whose input terminal is connected with the fourth node and whose output terminal is a fifth node. Consequently, the present invention can detect voltage in a stable condition with low power consumption.
    • 本发明包括栅极和漏极与第一节点连接的第一MOS晶体管,栅极和漏极分别与第一节点和第三节点连接的第二MOS晶体管,第一电阻元件连接在第一节点之间 节点和第二节点,连接在第二节点和地电压端子之间的第二电阻元件,其输入端与第二节点连接的第一NOT电路,其输出端子是第四节点,并且连接在 第三节点和地电压端子,以及第二NOT电路,其输入端与第四节点连接,其输出端为第五节点。 因此,本发明能够以低功耗检测稳定状态的电压。
    • 59. 发明授权
    • Direct current sum bandgap voltage comparator
    • 直流和带隙电压比较器
    • US5781043A
    • 1998-07-14
    • US932930
    • 1997-09-18
    • William Carl Slemmer
    • William Carl Slemmer
    • G01R19/165G05F3/24G05F3/26G05F3/30G11C5/14G11C11/413H03K5/22
    • G05F3/30G01R19/16538G05F3/24G11C5/141G11C5/143G05F3/262
    • A direct current sum bandgap voltage comparator for detecting voltage changes in a power supply. The direct current sum bandgap voltage comparator includes a summing node, current sources connected to the summing node and the power supply, and an indicator circuit connected to the summing node. Each current source supplies a current to the summing node wherein the summing node voltage level is responsive to the currents supplied. The indicator circuit is responsive to changes in the summing node voltage level and generates at an output a logical signal at one state when the summing node voltage level is greater than a predetermined value and generates the logical signal at the output at another state when the summing node voltage level is less than the predetermined value, the predetermined value corresponding to a preselected power supply voltage.
    • 用于检测电源中的电压变化的直流和带隙电压比较器。 直流和带隙电压比较器包括一个求和节点,连接到求和节点和电源的电流源,以及连接到求和节点的指示电路。 每个电流源向求和节点提供电流,其中求和节点电压电平响应所提供的电流。 指示电路响应于求和节点电压电平的变化,并且当加法节点电压电平大于预定值时,在一个状态下产生一个逻辑信号,并且在另一状态的输出处产生逻辑信号, 节点电压电平小于预定值,该预定值对应于预选电源电压。
    • 60. 发明授权
    • Reverse current prevention method and apparatus and reverse current
guarded low dropout circuits
    • 反向电流预防方法和装置以及反向电流保护的低压差电路
    • US5594381A
    • 1997-01-14
    • US235688
    • 1994-04-29
    • David Bingham
    • David Bingham
    • G01R19/165H03K3/01
    • G01R19/16538H03K2217/0018
    • A reverse current limited circuit configured to provide a reverse current limited low dropout voltage output. The reverse current limited circuit, coupled between a pair of terminals, comprises (i) a MOS pass transistor coupled in series between the first and second terminals, (ii) connection circuitry to connect the substrate of the MOS pass transistor to either one of the pair of terminals based on the relative magnitudes of the voltages measured on the pair of terminals, (iii) activation circuitry for turning on and off the MOS pass transistor based on the relative magnitudes of the voltages measured on the pair of terminals and (iv) comparison circuitry used to compare the voltages of the pair of terminals and to control the activation circuitry and the connection circuitry in response to the comparison made.
    • 反向电流限制电路,被配置为提供反向电流限制的低压差电压输出。 耦合在一对端子之间的反向电流限制电路包括:(i)串联耦合在第一和第二端子之间的MOS通过晶体管,(ii)连接电路,用于将MOS通过晶体管的衬底连接到 基于在所述一对端子上测量的电压的相对大小的一对端子,(iii)基于在所述一对端子上测量的电压的相对幅度来导通和关断所述MOS通过晶体管的激活电路,以及(iv) 比较电路用于比较一对终端的电压,并响应于进行比较来控制激活电路和连接电路。