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    • 58. 发明授权
    • Data receiving system using a decision feedback equalizer
    • 数据接收系统采用判决反馈均衡器
    • US5946350A
    • 1999-08-31
    • US736730
    • 1996-10-25
    • Mitsuru Uesugi
    • Mitsuru Uesugi
    • H03H21/00H04B3/10H04B7/005H04L25/03H03H7/30H03K5/159
    • H04L25/03146
    • A data receiving system, for equalizing a reception signal by using a decision feedback equalizer when the reception signal is formatted to have a sync signal positioned at the center of a burst, comprises a receiving buffer for storing reception data, training calculation means for obtaining a tap coefficient by performing a training using the sync signal involved in the reception data, a direction selecting means for selecting a preferable direction for a tracking of the decision feedback equalizer, based on a judgement as to which direction is preferable for the decision feedback equalizer between the direction identical with the receiving sequence of the reception data and the direction opposed to the receiving sequence of the reception data, and a tracking calculation means for performing the calculation of the decision feedback equalizer by tracking the reception data along the preferable direction using the tap coefficient given from the training calculation means having executed the training along the preferable direction selected by the direction selecting means. With this arrangement, the decision feedback equalizer can be used in the minimum phase transition which is the most effective condition for the DFE, thereby enhancing the effect of compensating the distortion derived from the multipath fading.
    • 一种数据接收系统,用于当接收信号被格式化为具有位于突发中心的同步信号时通过使用判决反馈均衡器对接收信号进行均衡,包括用于存储接收数据的接收缓冲器,用于获得接收信号的训练计算装置 通过使用在接收数据中涉及的同步信号进行训练来进行训练的抽头系数;方向选择装置,用于根据对于决策反馈均衡器的哪个方向优选的判定来选择用于跟踪判决反馈均衡器的优选方向 与接收数据的接收序列和与接收数据的接收序列相反的方向相同的方向,以及跟踪计算装置,用于通过使用抽头跟踪沿着优选方向的接收数据来执行判决反馈均衡器的计算 从具有执行的训练计算装置给出的系数 d沿着由方向选择装置选择的优选方向的训练。 通过这种布置,判决反馈均衡器可以用作DFE最有效条件的最小相位转换,从而增强补偿从多径衰落导出的失真的效果。
    • 59. 发明授权
    • Apparatus for calculating the square root of the sum of two squares
    • 用于计算两个平方和的平方根的装置
    • US5459683A
    • 1995-10-17
    • US277826
    • 1994-07-20
    • Mitsuru UesugiKouichi Honma
    • Mitsuru UesugiKouichi Honma
    • G06F17/10G06F7/544G06F7/552G06F7/38
    • G06F9/30021G06F7/544G06F7/552G06F2207/5525
    • A first digital signal of a serial form is processed into a second digital signal of a serial form. The second digital signal represents an absolute value of a value represented by the first digital signal. A third digital signal of a serial form is processed into a fourth digital signal of a serial form. The fourth digital signal represents an absolute value of a value represented by the third digital signal. The values represented by the first and third digital signals are compared to generate a comparison-result digital signal representing a result of the comparison. A calculation-result digital signal of a serial form is generated in response to the second digital signal, the fourth digital signal, and the comparison-result digital signal. The calculation-result digital signal represents a value which is approximate to a square root of a sum of a square of the value represented by the first digital signal and a square of the value represented by the third digital signal.
    • 将串行形式的第一数字信号处理成串行形式的第二数字信号。 第二数字信号表示由第一数字信号表示的值的绝对值。 串行形式的第三数字信号被处理成串行形式的第四数字信号。 第四数字信号表示由第三数字信号表示的值的绝对值。 将由第一和第三数字信号表示的值进行比较以产生表示比较结果的比较结果数字信号。 响应于第二数字信号,第四数字信号和比较结果数字信号产生串行形式的计算结果数字信号。 计算结果数字信号表示近似于由第一数字信号表示的值的平方和与由第三数字信号表示的值的平方的和的平方根的值。