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    • 54. 发明授权
    • Apparatus for manufacturing a laminated unit of ceramic green sheets
    • 陶瓷生片层叠单元的制造装置
    • US4698192A
    • 1987-10-06
    • US714381
    • 1985-03-21
    • Saburo KuzeYoshiharu KatoShozo Kojima
    • Saburo KuzeYoshiharu KatoShozo Kojima
    • B32B43/00B28B5/02B28B13/02B28B19/00B32B18/00C04B41/45C04B41/81H05K1/03H05K3/46B29C31/02B29C39/20
    • C04B41/009B28B13/02B28B19/00B28B5/027C04B41/4578C04B41/81H05K1/0306H05K3/4611H05K3/4629
    • An apparatus for manufacturing a laminated unit of ceramic green sheets comprises an endless belt, and an applying apparatus provided at a predetermined position on the running path of the endless belt. The applying apparatus includes a reservoir for storing a ceramic slurry and a moveable blade. When the belt runs with the blade spaced a predetermined distance from the top surface of the endless belt, the ceramic slurry flows out through a gap between the blade and the belt and, thus, is applied on the belt to a predetermined thickness. The applied ceramic slurry is dried by a drier so as to form a ceramic green sheet. A conductive paste is printed on the top surface of the ceramic green sheet by a printing apparatus. The printed conductive paste is dried by a drier. The ceramic green sheet with the conductive paste printed thereon is brought again to the applying apparatus due to the movement of the endless belt, the blade of the applying apparatus is further displaced upward, and ceramic slurry is applied on the previously formed ceramic green sheet. By repeating such applied again on the ceramic green sheet. By repeating such a process, a laminated unit of the ceramic green sheets is obtained.
    • 一种用于制造陶瓷生片的层叠单元的装置包括环形带和设置在环形带的行进路径上的预定位置处的施加装置。 施加装置包括用于存储陶瓷浆料和可移动叶片的储存器。 当带子与环形带的顶表面隔开预定距离的叶片运行时,陶瓷浆料通过叶片和带之间的间隙流出,因此被施加到带上预定的厚度。 将所施加的陶瓷浆料通过干燥器干燥以形成陶瓷生片。 导电浆料通过印刷装置印刷在陶瓷生片的顶表面上。 印刷的导电浆料通过干燥器干燥。 由于环形带的移动,其上印有导电浆料的陶瓷生片被再次带到施加装置,施加装置的刀片进一步向上移动,并且将陶瓷浆料施加在预先形成的陶瓷生片上。 通过重复这种再次应用于陶瓷生片上。 通过重复这样的处理,得到陶瓷生片的层压单元。
    • 59. 发明授权
    • Semiconductor device and method of testing the same
    • 半导体器件及其测试方法
    • US07562335B2
    • 2009-07-14
    • US11583131
    • 2006-10-19
    • Yoshiharu Kato
    • Yoshiharu Kato
    • G06F17/50
    • H03K5/26G11C11/401G11C29/02G11C29/023Y10T307/74
    • An object is to provide a semiconductor device in which it is possible to determine whether or not a minute delay time given by a delay circuit is within a specified value or not, and a method of testing the semiconductor device. In response to a data strobe signal TDQS for testing, the delay circuits DC0 and DC1 produce delay data strobe signals IDQS0 and IDQS1 delayed by delay times DT0 and DT1. Outputted as a reverse signal from the inverter INV0, is a reverse data strobe signal RIDQS0 in response to the delay data strobe signal IDQS0, and delayed by an allowable delay time IT. Inputted into the NAND gate ND0, are the reverse data strobe signal RIDQS0 and the delay data strobe signal IDQS1. When, in comparison with the phase of the delay data strobe signal IDQS0, the phase of the delay data strobe signal IDQS1 is delayed by the allowable delay time IT or more, a pulse signal PL0 is not outputted from the NAND gate ND0.
    • 目的是提供一种半导体器件,其中可以确定由延迟电路给出的微小延迟时间是否在规定值内,以及测试半导体器件的方法。 响应于用于测试的数据选通信号TDQS,延迟电路DC0和DC1产生延迟数据选通信号IDQS0和IDQS1延迟延迟时间DT0和DT1。 作为来自反相器INV0的反向信号输出,是响应于延迟数据选通信号IDQS0的反向数据选通信号RIDQS0,并延迟了允许的延迟时间IT。 输入到NAND门ND0中的是反向数据选通信号RIDQS0和延迟数据选通信号IDQS1。 当与延迟数据选通信号IDQS0的相位相比,延迟数据选通信号IDQS1的相位延迟可允许的延迟时间IT或更大时,不从NAND门ND0输出脉冲信号PL0。
    • 60. 发明授权
    • Semiconductor memory device and method of controlling the semiconductor memory device
    • 半导体存储器件和控制半导体存储器件的方法
    • US07495990B2
    • 2009-02-24
    • US11806721
    • 2007-06-04
    • Kazufumi KomuraYoshiharu KatoSatoru Kawamoto
    • Kazufumi KomuraYoshiharu KatoSatoru Kawamoto
    • G11C8/00
    • G11C11/4094G11C11/4076G11C2207/005
    • It is an object to provide a semiconductor memory device that can conduct the equalizing operation of bit lines with a low current consumption while maintaining a normal accessing speed and the chip area, and a control method thereof. In a semiconductor memory device of the shared sense amplification system, in a predetermined number of times which is (k−1) times or less among k-times of continuous word line selections of a selected memory block, the bit line separation gate of the unselected memory block is rendered conductive in the active period of the equalizing unit after the word line selection. Also, a circuit that equalizes a wiring higher in the capacity component is driven by a higher voltage level according to the wiring capacity component of the sense amplification power supply line and the bit lines, to thereby equalize the power supply line and the bit line in the equal time, thereby being capable of preventing the short-circuiting within the sense amplifier.
    • 本发明的目的是提供一种半导体存储器件及其控制方法,该半导体存储器件可以在保持正常访问速度和芯片面积的同时以低电流消耗进行位线的均衡操作。 在共享读出放大系统的半导体存储器件中,在所选择的存储器块的连续字线选择的k次之间的预定次数(k-1)倍以下的情况下,位线分离门 未选择的存储块在字线选择之后的均衡单元的有效周期内变为导通。 此外,根据感测放大电源线和位线的布线电容分量,通过较高的电压电平驱动均衡电容分量较高的布线的电路,从而使电源线和位线的均匀化 相等的时间,从而能够防止读出放大器内的短路。