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    • 56. 发明授权
    • Non-volatile memory device and a method of fabricating the same
    • 非易失性存储器件及其制造方法
    • US07622765B2
    • 2009-11-24
    • US11709057
    • 2007-02-22
    • Won-joo KimYoon-dong ParkJung-hoon Lee
    • Won-joo KimYoon-dong ParkJung-hoon Lee
    • H01L29/788
    • H01L29/7881H01L27/115H01L27/11519H01L29/42332H01L29/792
    • A non-volatile memory device and a method of fabricating the same are provided. A non-volatile memory device may include a semiconductor substrate including a body and at least one pair of fins vertically protruding from the body and spaced apart from each other, and at least one control gate electrode on at least portions of outer side surfaces of the at least one pair of fins and extending onto top portions of the at least one pair of fins on an angle with the at least one pair of fins. The non-volatile memory device may further include at least one pair of gate insulating layers between the at least one control gate electrode and the at least one pair of fins, and at least one pair of storage node layers between the at least one pair of gate insulating layers and at least a portion of the at least one control gate electrode. The at least one control gate electrode may extend onto top portions of the at least one pair of fins in a zigzag fashion.
    • 提供了一种非易失性存储器件及其制造方法。 非易失性存储器件可以包括半导体衬底,其包括主体和从主体垂直突出并且彼此间隔开的至少一对鳍,以及至少一个控制栅电极,其位于至少一个的外侧表面的至少部分上 至少一对翅片,并且与所述至少一对翅片成角度地延伸到所述至少一对翅片的顶部上。 非易失性存储器件还可以包括至少一对控制栅电极与至少一对散热片之间的至少一对栅绝缘层,以及至少一对控制栅电极之间的至少一对存储节点层 栅绝缘层和至少一个控制栅电极的至少一部分。 至少一个控制栅极可以以锯齿形的方式延伸到至少一对翅片的顶部。
    • 59. 发明申请
    • Nonvolatile memory device and method of fabricating the same
    • 非易失性存储器件及其制造方法
    • US20080157176A1
    • 2008-07-03
    • US11902511
    • 2007-09-21
    • Won-joo KimYoon-dong ParkJune-mo KooSuk-pil KimSung-jae Byun
    • Won-joo KimYoon-dong ParkJune-mo KooSuk-pil KimSung-jae Byun
    • H01L27/115H01L21/8247
    • H01L27/115H01L27/11521H01L27/11524H01L27/11568H01L29/42336H01L29/66803
    • A nonvolatile memory device having lower bit line contact resistance and a method of fabricating the same is provided. In the nonvolatile memory device, a semiconductor substrate of a first conductivity type may include first and second fins. A common bit line electrode may connect one end of the first fin to one end of the second fin. A plurality of control gate electrodes may cover the first and second fins and expand across the top surface of each of the first and second fins. A first string selection gate electrode may be positioned between the common bit line electrode and the plurality of control gate electrodes. The first string selection gate electrode may cover the first and second fins and expand across the top surface of each of the first and second fins. A second string selection gate electrode may be positioned between the first string selection gate electrode and the plurality of control gate electrodes. The second string selection gate electrode may cover the first and second fins and expand across the top surface of each of the first and second fins. The first fin under the first string selection gate electrode and the second fin under the second string selection gate electrode may have a second conductivity type opposite to the first conductivity type.
    • 提供一种具有较低位线接触电阻的非易失性存储器件及其制造方法。 在非易失性存储器件中,第一导电类型的半导体衬底可以包括第一和第二鳍片。 公共位线电极可将第一鳍片的一端连接到第二鳍片的一端。 多个控制栅极电极可以覆盖第一和第二鳍片并且跨越第一和第二鳍片中的每一个的顶表面膨胀。 第一串选择栅极可以位于公共位线电极和多个控制栅电极之间。 第一串选择栅电极可以覆盖第一和第二鳍片并且横跨第一和第二鳍片中的每一个的顶表面扩展。 第二串选择栅电极可以位于第一串选择栅电极和多个控制栅电极之间。 第二串选择栅电极可以覆盖第一和第二鳍片并且横跨第一和第二鳍片中的每一个的顶表面扩展。 第一串选择栅电极下的第一鳍和第二串选择栅电极下的第二鳍可以具有与第一导电类型相反的第二导电类型。