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    • 51. 发明申请
    • Interrupt routing within multiple-processor system
    • 多处理器系统中的中断路由
    • US20070239917A1
    • 2007-10-11
    • US11299152
    • 2005-12-09
    • Ryuji OritaMehul ShahSumeet Kochar
    • Ryuji OritaMehul ShahSumeet Kochar
    • G06F13/24
    • G06F13/24
    • Interrupts are routed within a multiple-processor system, such as a single computing device having multiple processors. Such a computerized system includes a number of processors and a mechanism. Each processor is capable of processing an interrupt. The mechanism, such as a Southbridge controller, receives the interrupt and routes it to a selected processor. The selected processor processes the interrupt via entry into a mode related to the interrupt. The interrupt may be a system management interrupt (SMI), and the mode a system management mode (SMM). The other processors operate normally and are not affected by processing of the interrupt, and do not have to enter the mode. These other processors can continue executing code as before, and may receive and process other types of interrupts. The system may include another mechanism, such as a complex programmable logic device (CPLD), specifying the selected processor.
    • 中断在多处理器系统中路由,例如具有多个处理器的单个计算设备。 这种计算机化系统包括多个处理器和机构。 每个处理器都能处理一个中断。 诸如南桥控制器的机制接收中断并将其路由到所选择的处理器。 所选择的处理器通过进入与中断相关的模式来处理中断。 中断可能是系统管理中断(SMI),而模式是系统管理模式(SMM)。 其他处理器正常运行,不受中断处理的影响,无需进入模式。 这些其他处理器可以像以前一样继续执行代码,并且可以接收和处理其他类型的中断。 该系统可以包括指定所选择的处理器的另一种机制,例如复杂可编程逻辑器件(CPLD)。