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51. 发明申请

US20050006584A1 Method for manufacturing an infrared detection element 审中-公开
标题翻译：红外线检测元件的制造方法
公开(公告)号：US20050006584A1
公开(公告)日：2005-01-13
申请号：US10901110
申请日：2004-07-29
申请人： Takashi Kawakubo , Kazuhide Abe , Kenya Sano
发明人： Takashi Kawakubo , Kazuhide Abe , Kenya Sano
IPC分类号： G01J1/02 , G01J5/02 , G01J5/34 , H01L37/02 , G01J5/10 , H01L37/00
CPC分类号： H01L37/02
摘要： The present invention provides an infrared detection element having a single-crystalline base layer 3 with a thickness of 50 nm to 10 μm having a principal surface, a first electrode layer 4 formed on the principal surface of the single-crystalline base layer 3, a ferroelectric layer 5 which is formed on the first electrode layer 4 and is composed of a single-crystalline layer or a unidirectioally oriented layer. Distortion of the single-crystalline layer or a unidirectioally oriented layer in a surface parallel to the principal surface of the single-crystalline base layer 3 is elastically constrained by the single-crystalline base layer 3. The infrared detection element further has a second electrode layer 6 formed on the ferroelectric layer 5. An amount of charge is changed by changes in temperature caused by irradiation of infrared light to the ferroelectric layer 5. The amount of the charge is detected from the first and the second electrode layer4, 6. With the infrared detection element, an accurate temperature measurement is possible even in the neighborhood of the Curie temperature due to a discontinuous primary phase transition.
摘要翻译：本发明提供一种红外线检测元件，其具有厚度为50nm〜10μm的具有主面的单晶基底层3，形成在单晶基底层3的主面上的第一电极层4，形成在第一电极层4上并由单晶层或单向取向层构成的铁电体层5。在与单晶基底层3的主表面平行的表面中的单晶层或单向取向层的失真由单晶基底层3弹性约束。红外线检测元件还具有第二电极层形成在铁电层5上的电荷量。由于红外光照射到铁电层5而引起的温度变化，电荷量被改变。从第一和第二电极层4,6检测电荷量。红外线检测元件，由于不连续的初级相变，即使在居里温度附近也可进行精确的温度测量。

52. 发明授权

US08305147B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US08305147B2
公开(公告)日：2012-11-06
申请号：US13424591
申请日：2012-03-20
申请人： Tadahiro Sasaki , Kazuhide Abe , Kazuhiko Itaya
发明人： Tadahiro Sasaki , Kazuhide Abe , Kazuhiko Itaya
IPC分类号： H03F3/14
CPC分类号： H03F3/19 , H01L29/0649 , H01L29/0692 , H01L29/0696 , H01L29/1087 , H01L29/41758 , H01L29/4238 , H03F3/245
摘要： A power amplifier according to the embodiments includes: a silicon substrate; an input terminal configured to receive an input of a RF signal; a power dividing unit configured to divide the RF signal into a first signal and a second signal; a phase modulating unit configured to modulate a phase of the second signal; an N well formed in the silicon substrate; a P well formed in the N well and configured to receive an input of the second signal of a modulated phase; a gate insulating film formed on the P well; a gate electrode formed on the gate insulating film and configured to receive an input of the first signal; source and drain electrodes formed on both sides of the gate electrode in the silicon substrate; and an output terminal configured to output a RF signal obtained from the drain electrode.
摘要翻译：根据实施例的功率放大器包括：硅衬底; 输入终端，被配置为接收RF信号的输入; 功率分配单元，被配置为将RF信号划分为第一信号和第二信号; 相位调制单元，被配置为调制所述第二信号的相位; 在硅衬底中形成N阱; P阱形成在N阱中并且被配置为接收调制相位的第二信号的输入; 在P阱上形成栅极绝缘膜; 栅电极，形成在所述栅极绝缘膜上并被配置为接收所述第一信号的输入; 源极和漏极形成在硅衬底中的栅电极的两侧; 以及输出端子，被配置为输出从漏电极获得的RF信号。

53. 发明授权

US08039873B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08039873B2
公开(公告)日：2011-10-18
申请号：US12276787
申请日：2008-11-24
申请人： Kazuhide Abe , Tadahiro Sasaki , Kazuhiko Itaya
发明人： Kazuhide Abe , Tadahiro Sasaki , Kazuhiko Itaya
IPC分类号： H01L27/105
CPC分类号： H01L27/088 , H01L23/4824 , H01L27/0207 , H01L27/105 , H01L29/1033 , H01L29/41758 , H01L29/7831 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A semiconductor device includes a substrate including an element region having a polygonal shape defined by a plurality of edges, and an isolation region surrounding the element region, and a plurality of gate electrodes provided on the substrate, crossing the element region, arranged in parallel with each other, and electrically connected with each other, wherein at least one of the edges does not cross any of the gate electrodes, and is not parallel to the gate electrodes.
摘要翻译：半导体器件包括：衬底，其包括具有由多个边缘限定的多边形形状的元件区域和围绕该元件区域的隔离区域;以及多个栅电极，设置在该衬底上，与该元件区域交叉，与该彼此电连接，其中至少一个边缘不与任何栅电极交叉，并且不平行于栅电极。

54. 发明申请

US20110039359A1 Light emitting device and method of manufacturing the same 失效
标题翻译：发光元件及其制造方法
公开(公告)号：US20110039359A1
公开(公告)日：2011-02-17
申请号：US12923949
申请日：2010-10-15
申请人： Isao Takasu , Yuko Nomura , Tsuyoshi Hioki , Isao Amemiya , Kazuhide Abe
发明人： Isao Takasu , Yuko Nomura , Tsuyoshi Hioki , Isao Amemiya , Kazuhide Abe
IPC分类号： H01L33/48
CPC分类号： H01L33/54 , H01L33/46 , H01L33/507 , H01L2224/45144 , H01L2224/48091 , H01L2933/0041 , H01L2924/00014 , H01L2924/00
摘要： A method of manufacturing a light emitting device. The method includes: mounting a light emitting chip on a substrate; forming a transparent resin portion and a phosphor layer by using a liquid droplet discharging apparatus, the transparent resin portion being formed in a shape of a dome and covering the light emitting chip to fill an exterior thereof on the substrate, a phosphor layer containing phosphor and being formed on an exterior of the transparent resin portion close to at least a top side thereof; and forming a reflecting layer at a position exterior of the transparent resin portion and the phosphor layer close to the substrate.
摘要翻译：一种制造发光器件的方法。该方法包括：将发光芯片安装在基板上; 通过使用液滴喷射装置形成透明树脂部分和荧光体层，所述透明树脂部分形成为圆顶形状并且覆盖所述发光芯片以将其外部填充在所述基板上，所述荧光体层包含磷光体和形成在透明树脂部分的至少其顶侧附近的外部; 并且在透明树脂部分的外部和靠近基板的荧光体层的位置处形成反射层。

55. 发明授权

US07718515B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07718515B2
公开(公告)日：2010-05-18
申请号：US12073492
申请日：2008-03-06
申请人： Kazuhide Abe
发明人： Kazuhide Abe
IPC分类号： H01L21/20
CPC分类号： H01L29/66712 , H01L21/046 , H01L21/0475 , H01L21/3225 , H01L29/1608 , H01L29/66068
摘要： The principal objects of the present invention are to provide structure of a semiconductor device capable of reducing a bowing of a wafer, and a method for fabricating the semiconductor device. The present invention is applied to a semiconductor device, which is fabricated with a semiconductor substrate having a silicon carbide (SiC) film. The method includes the steps of: forming the SiC film on a semiconductor wafer; discriminating a deformation condition of the semiconductor wafer; and forming grooves in the SiC film, the grooves having a shape determined in accordance with the deformation condition of the semiconductor wafer.
摘要翻译：本发明的主要目的是提供能够减少晶片弯曲的半导体器件的结构以及制造半导体器件的方法。本发明应用于半导体器件，其由具有碳化硅（SiC）膜的半导体衬底制造。该方法包括以下步骤：在半导体晶片上形成SiC膜; 鉴别半导体晶片的变形状态; 以及在所述SiC膜中形成槽，所述槽具有根据所述半导体晶片的变形条件确定的形状。

56. 发明申请

US20080238550A1 POWER AMPLIFIER AND TRANSMISSION AND RECEPTION SYSTEM 有权
标题翻译：功率放大器和传输和接收系统
公开(公告)号：US20080238550A1
公开(公告)日：2008-10-02
申请号：US11857737
申请日：2007-09-19
申请人： Tadahiro SASAKI , Kazuhide Abe , Kazuhiko Itaya , Hideyuki Funaki
发明人： Tadahiro SASAKI , Kazuhide Abe , Kazuhiko Itaya , Hideyuki Funaki
IPC分类号： H03F3/16 , H03F3/68
CPC分类号： H03F3/604 , H01L21/823425 , H01L27/088 , H03F1/3205 , H03F3/16 , H03F3/607 , H03F3/72 , H03F2200/108 , H03F2200/451 , H03F2200/468 , H03F2200/543 , H03F2200/78 , H03F2203/7236
摘要： A power amplifier includes: a first multi-finger FET formed on a semiconductor substrate; a second multi-finger FET formed on the semiconductor substrate; a first temperature detector which detects a channel temperature of the first FET; a second temperature detector which detects a channel temperature of the second FET; a third temperature detector which detects a temperature of the semiconductor substrate; a first detection circuit detecting a difference between an output of the first temperature detector and an output of the third temperature detector and converting the difference to thermoelectromotive force; a second detection circuit detecting a difference between an output of the second temperature detector and the output of the third temperature detector and converting the difference to thermoelectromotive force; and a comparator comparing outputs of the first and second detection circuits with each other to turn on one of the first and second switches and turn off the other.
摘要翻译：功率放大器包括：形成在半导体衬底上的第一多指FET; 形成在半导体衬底上的第二多指FET; 第一温度检测器，其检测第一FET的通道温度; 第二温度检测器，其检测第二FET的通道温度; 第三温度检测器，其检测半导体衬底的温度; 第一检测电路，检测第一温度检测器的输出和第三温度检测器的输出之间的差异，并将差值转换为热电动势; 第二检测电路，检测第二温度检测器的输出与第三温度检测器的输出之间的差异，并将差值转换为热电动势; 以及比较器，将第一和第二检测电路的输出彼此进行比较，以打开第一和第二开关中的一个并且关闭另一个。

57. 发明申请

US20080233716A1 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20080233716A1
公开(公告)日：2008-09-25
申请号：US12073492
申请日：2008-03-06
申请人： Kazuhide Abe
发明人： Kazuhide Abe
IPC分类号： H01L21/322
CPC分类号： H01L29/66712 , H01L21/046 , H01L21/0475 , H01L21/3225 , H01L29/1608 , H01L29/66068
摘要： The principal objects of the present invention are to provide structure of a semiconductor device capable of reducing a bowing of a wafer, and a method for fabricating the semiconductor device. The present invention is applied to a semiconductor device, which is fabricated with a semiconductor substrate having a silicon carbide (SiC) film. The method includes the steps of: forming the SiC film on a semiconductor wafer; discriminating a deformation condition of the semiconductor wafer; and forming grooves in the SiC film, the grooves having a shape determined in accordance with the deformation condition of the semiconductor wafer.
摘要翻译：本发明的主要目的是提供能够减少晶片弯曲的半导体器件的结构以及制造半导体器件的方法。本发明应用于半导体器件，其由具有碳化硅（SiC）膜的半导体衬底制造。该方法包括以下步骤：在半导体晶片上形成SiC膜; 鉴别半导体晶片的变形状态; 以及在所述SiC膜中形成槽，所述槽具有根据所述半导体晶片的变形条件确定的形状。

58. 发明申请

US20060220083A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060220083A1
公开(公告)日：2006-10-05
申请号：US11306387
申请日：2005-12-27
申请人： Kazuhide Abe
发明人： Kazuhide Abe
IPC分类号： H01L29/94
CPC分类号： H01L27/11502 , H01L21/2855 , H01L21/28556 , H01L21/31055 , H01L21/31116 , H01L21/31122 , H01L21/32136 , H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L21/76858 , H01L21/76864 , H01L21/7687 , H01L21/76877 , H01L27/11507 , H01L28/65 , H01L28/75
摘要： A semiconductor device includes a semiconductor substrate, a first electrode that is formed over said semiconductor substrate, a capacitive insulating film that is formed on the first electrode and is made of a metal oxide ferroelectric, a second electrode that is formed on the capacitive insulating film, an insulating film that has a first opening exposing a portion of an upper side of the second electrode and is formed so that it covers the first electrode, the capacitive insulating film, and the second electrode, a first barrier film having an amorphous structure which is formed inside the first opening and on the insulating film, and a wiring film that is formed over the first barrier film.
摘要翻译：半导体器件包括半导体衬底，形成在所述半导体衬底上的第一电极，形成在第一电极上并由金属氧化物铁电体制成的电容绝缘膜，形成在电容绝缘膜上的第二电极绝缘膜，其具有暴露第二电极的上侧的一部分并且形成为使得其覆盖第一电极，电容绝缘膜和第二电极的第一开口，具有非晶结构的第一阻挡膜，形成在第一开口内部和绝缘膜上，以及形成在第一阻挡膜上的布线膜。

59. 发明授权

US06924176B2 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06924176B2
公开(公告)日：2005-08-02
申请号：US10103696
申请日：2002-03-25
申请人： Toru Yoshie , Kazuhide Abe , Yusuke Harada
发明人： Toru Yoshie , Kazuhide Abe , Yusuke Harada
IPC分类号： H01L21/28 , H01L21/302 , H01L21/3065 , H01L21/3213 , H01L21/768 , H01L23/525 , H01L21/82 , H01L21/26 , H01L21/326
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A conductive layer which is formed on an insulative layer on a semiconductor substrate is connected to the semiconductor substrate via a through portion which passes through the insulative layer and reaches the semiconductor substrate. In a state where the conductive layer is electrically connected to the semiconductor substrate via the through portion, a patterning process using a plasma etching is performed on the conductive layer, thereby forming a conductive path. After the formation of the conductive path, a heating process is performed on the substrate or the conductive path in order to disconnect the electrical connection between the through portion and the substrate by a reaction between the through portion and the semiconductor substrate which is in contact therewith.
摘要翻译：形成在半导体衬底上的绝缘层上的导电层通过穿过绝缘层并到达半导体衬底的贯穿部连接到半导体衬底。在导电层通过贯通部分电连接到半导体衬底的状态下，在导电层上进行使用等离子体蚀刻的图案化工艺，从而形成导电路径。在形成导电路径之后，在衬底或导电路径上进行加热处理，以便通过与其接触的通孔部分和半导体衬底之间的反应而断开通孔部分和衬底之间的电连接。

60. 发明申请

US20050151224A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050151224A1
公开(公告)日：2005-07-14
申请号：US10910318
申请日：2004-08-04
申请人： Kazuhide Abe
发明人： Kazuhide Abe
IPC分类号： H01L21/288 , H01L21/311 , H01L21/321 , H01L21/3213 , H01L21/768 , H01L21/8238 , H01L23/522 , H01L23/532 , H01L29/00
CPC分类号： H01L23/5226 , H01L21/2885 , H01L21/31116 , H01L21/3212 , H01L21/32135 , H01L21/32136 , H01L21/76801 , H01L21/76802 , H01L21/76807 , H01L21/76831 , H01L21/76834 , H01L21/76844 , H01L21/76849 , H01L21/76852 , H01L21/76865 , H01L21/76877 , H01L23/53233 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device has a semiconductor substrate, a first insulating film formed on a surface of the semiconductor substrate, a first recess formed in the first insulating film, a first barrier film formed on an inner surface of the first insulating film except a top peripheral region of the first trench, a first conductive film formed in the first trench, and a covering film formed on an upper surface and a top peripheral region of the first conductive film and an upper surface of the first barrier film. The first conductive film includes copper.
摘要翻译：半导体器件具有半导体衬底，形成在半导体衬底的表面上的第一绝缘膜，形成在第一绝缘膜中的第一凹槽，形成在除了顶部周边区域之外的第一绝缘膜的内表面上的第一阻挡膜形成在第一沟槽中的第一导电膜和形成在第一导电膜的上表面和顶周边区域上的覆盖膜和第一阻挡膜的上表面。第一导电膜包括铜。

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