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51. 发明授权

US5365454A Layout designing method for a semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件的布局设计方法
公开(公告)号：US5365454A
公开(公告)日：1994-11-15
申请号：US777704
申请日：1991-10-17
申请人： Shinichi Nakagawa , Hiroyuki Kawai
发明人： Shinichi Nakagawa , Hiroyuki Kawai
IPC分类号： H01L21/82 , G06F17/50 , H01L27/118 , G06F15/60
CPC分类号： G06F17/5068 , H01L27/11807
摘要： In a layout designing method for an LSI by a CMOS standard cell method, layout cells (standard layout patterns) which respectively correspond to logical function units are selected from a library. In this selection, the respective layout cells are selected from the library as patterns which are divided into p-type layout cells and n-type layout cells. The p-type layout cells and the n-type layout cells are arranged in accordance with a predetermined logical circuit diagram. Interconnection patterns for interconnecting the p-type layout cells and for interconnecting the n-type layout cells are arranged in accordance with the logical circuit diagram. An excessive interconnection region can be minimized, and efficient interconnections can be achieved. Therefore, an occupied plane area can be reduced in the layout design.
摘要翻译：在通过CMOS标准单元方法的LSI的布局设计方法中，从库中选择分别对应于逻辑功能单元的布局单元（标准布局图案）。在该选择中，将各个布局单元从库中选择为分为p型布局单元和n型布局单元的图案。 p型布局单元和n型布局单元根据预定的逻辑电路图布置。用于互连p型布局单元和用于互连n型布局单元的互连模式根据逻辑电路图布置。可以最小化过度的互连区域，并且可以实现有效的互连。因此，布局设计中可以减少占用面积。

52. 发明授权

US4727415A Variable direction filter for separation of luminance and chrominance signals 失效
标题翻译：用于分离亮度和色度信号的可变方向滤波器
公开(公告)号：US4727415A
公开(公告)日：1988-02-23
申请号：US783536
申请日：1985-10-03
申请人： Shinichi Nakagawa , Tokumichi Murakami
发明人： Shinichi Nakagawa , Tokumichi Murakami
IPC分类号： H04N9/78 , H04N9/64
CPC分类号： H04N9/78
摘要： Signal generating means formed by variable line delay circuits 6 and 9 and dot delay circuits 7 and 8 receives a series of signal sample of a composite color television signal sampled in synchronism with a chrominance subcarrier at a frequency four times the chrominance subcarrier frequency and generates simultaneously a sample signal at a specified sampled point for separating a luminance signal and a chrominance signal and sampled signals at four sample points adjacent to the specified sample point, namely, four sampled points on the upper, lower, right and left sides of the specified sample point. A comparing and determining circuit 10 compares and determines a direction in which there is little change in the picture, based on the sampled signals at the adjacent sample points. Based on the result of determination of the comparing and determining circuit 10, a selector 11 selects and provides two sampled signals 110 and 111 existing in a region where there is little change in the picture. A separation filter 12 separates a chrominance signal 105 from the sampled signal 102 at the specified sample point using the two sampled signals 110 and 111 provided from the selector 11. A subtractor 5 subtracts the chrominance signal 105 from the sampled signal 102 at the specified sample point so as to provide a luminance signal 106.
摘要翻译：由可变行延迟电路6和9以及点延迟电路7和8形成的信号产生装置接收与色度副载波频率采样的复合彩色电视信号的一系列信号样本，其频率为色度副载波频率的四倍，同时产生用于分离亮度信号和色度信号的指定采样点的采样信号以及与指定采样点相邻的四个采样点处的采样信号，即在指定采样的上，下，右和左侧上的四个采样点点。比较和确定电路10基于相邻采样点处的采样信号来比较并确定图像中几乎没有变化的方向。基于比较和确定电路10的确定结果，选择器11选择并提供存在于图像变化不大的区域中的两个采样信号110和111。分离滤波器12使用从选择器11提供的两个采样信号110和111，在指定的采样点处将色度信号105与采样信号102分离。减法器5从指定采样的采样信号102中减去色度信号105 以便提供亮度信号106。

53. 发明授权

US4703095A Fluorine-containing copolymer 失效
标题翻译：含氟共聚物
公开(公告)号：US4703095A
公开(公告)日：1987-10-27
申请号：US829221
申请日：1986-02-14
申请人： Shinichi Nakagawa , Tsuneo Nakagawa , Toshihiko Amano , Mitsugu Omori , Sadaatsu Yamaguchi , Kozo Asano
发明人： Shinichi Nakagawa , Tsuneo Nakagawa , Toshihiko Amano , Mitsugu Omori , Sadaatsu Yamaguchi , Kozo Asano
IPC分类号： C08F214/26 , C08F16/24
CPC分类号： C08F214/262
摘要： A fluorine-containing copolymer comprising monomeric units of:(a) tetrafluoroethylene,(b) 8 to 15% by weight of hexafluoropropene on the basis of the weight of the copolymer, and(c) 0.2 to 2% by weight of a fluoroalkyl vinyl ether of the formula:CF.sub.2 .dbd.CF--O--(CF.sub.2).sub.n --CF.sub.2 X wherein X is hydrogen or fluorine, and n is an integer of 3 to 9, on the basis of the weight of the copolymer, which has good moldability and improved stress crack resistance and flex resistance when formed as an article such as a film.
摘要翻译：一种含氟共聚物，其包含单体单元：（a）四氟乙烯，（b）基于共聚物重量的8至15重量％的六氟丙烯，和（c）0.2至2重量％的氟代烷基乙烯基醚：式中X为氢或氟的CF 2 = CF-O-（CF 2）n -CF 2 X，n为3〜9的整数，基于共聚物的重量，其成型性良好且改善当作为诸如膜的物品形成时的抗应力开裂性和抗挠曲性。

54. 发明授权

US10561163B2 Extruded noodle and die piece for extruded noodle 有权
公开(公告)号：US10561163B2
公开(公告)日：2020-02-18
申请号：US13996156
申请日：2011-12-21
申请人： Mitsuru Tanaka , Tatsuo Yamaya , Takuo Nakazeko , Shinichi Nakagawa , Masahiro Oda
发明人： Mitsuru Tanaka , Tatsuo Yamaya , Takuo Nakazeko , Shinichi Nakagawa , Masahiro Oda
IPC分类号： A23L1/16 , A23L7/113 , A23P30/20 , A21C11/16 , A23L7/109
摘要： Disclosed is an extruded noodle having a hole extending therethrough in a longitudinal direction, wherein: the hole closes or contracts during boiling or rehydration in hot water; and the hole in a cross section of the noodle is configured such that a plurality of grooves are formed rotationally symmetrically about a center of the cross section, extending in an outer radial direction from the center of the cross section of the noodle.

55. 发明申请

US20110059603A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110059603A1
公开(公告)日：2011-03-10
申请号：US12947275
申请日：2010-11-16
申请人： Shinichi Nakagawa , Itsuro Sannomiya
发明人： Shinichi Nakagawa , Itsuro Sannomiya
IPC分类号： H01L21/28
CPC分类号： H01L27/11519 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11548 , Y10T428/12347
摘要： Disclosed is a method of manufacturing a semiconductor device, which includes exposing a photoresist using an exposing mask provided with a light-shielding pattern having two or more narrow width portions, developing the photoresist to form a plurality of stripe-shaped resist patterns, selectively etching a first conductive film using the resist pattern as a mask, forming an intermediate insulating film on the first conductive film, forming a second conductive film on the intermediate insulating film, and forming, by patterning the first conductive film, the intermediate insulating film, and the second conductive film, a flash memory cell and a structure constructed by forming a lower conductor pattern, a segment of the intermediate insulating film, and a dummy gate electrode in this stacking order.
摘要翻译：本发明公开了一种制造半导体器件的方法，其包括使用设置有具有两个或多个窄宽度部分的遮光图案的曝光掩模曝光光致抗蚀剂，使光致抗蚀剂显影以形成多个条形抗蚀剂图案，选择性蚀刻使用抗蚀剂图案作为掩模的第一导电膜，在第一导电膜上形成中间绝缘膜，在中间绝缘膜上形成第二导电膜，通过图案化第一导电膜，中间绝缘膜和第二导电膜，闪存单元以及通过以该堆叠顺序形成下导体图案，中间绝缘膜的段和虚拟栅极电极而构成的结构。

56. 发明授权

US07859045B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07859045B2
公开(公告)日：2010-12-28
申请号：US12139720
申请日：2008-06-16
申请人： Shinichi Nakagawa , Itsuro Sannomiya
发明人： Shinichi Nakagawa , Itsuro Sannomiya
IPC分类号： H01L29/788
CPC分类号： H01L27/11519 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11548 , Y10T428/12347
摘要： Disclosed is a method of manufacturing a semiconductor device, which includes exposing a photoresist using an exposing mask provided with a light-shielding pattern having two or more narrow width portions, developing the photoresist to form a plurality of stripe-shaped resist patterns, selectively etching a first conductive film using the resist pattern as a mask, forming an intermediate insulating film on the first conductive film, forming a second conductive film on the intermediate insulating film, and forming, by patterning the first conductive film, the intermediate insulating film, and the second conductive film, a flash memory cell and a structure constructed by forming a lower conductor pattern, a segment of the intermediate insulating film, and a dummy gate electrode in this stacking order.
摘要翻译：本发明公开了一种制造半导体器件的方法，其包括使用设置有具有两个或多个窄宽度部分的遮光图案的曝光掩模曝光光致抗蚀剂，使光致抗蚀剂显影以形成多个条形抗蚀剂图案，选择性蚀刻使用抗蚀剂图案作为掩模的第一导电膜，在第一导电膜上形成中间绝缘膜，在中间绝缘膜上形成第二导电膜，通过图案化第一导电膜，中间绝缘膜和第二导电膜，闪存单元以及通过以该堆叠顺序形成下导体图案，中间绝缘膜的段和虚拟栅极电极而构成的结构。

57. 发明授权

US07767523B2 Semiconductor device with integrated flash memory and peripheral circuit and its manufacture method 有权
标题翻译：具有集成闪存和外围电路的半导体器件及其制造方法
公开(公告)号：US07767523B2
公开(公告)日：2010-08-03
申请号：US12320753
申请日：2009-02-04
申请人： Shinichi Nakagawa
发明人： Shinichi Nakagawa
IPC分类号： H01L21/336
CPC分类号： H01L27/11526 , H01L27/105 , H01L27/11536 , H01L27/11548
摘要： A non-volatile semiconductor memory device includes: a nonvolatile memory area including gate electrodes, each including stack of a floating gate, an inter-electrode insulating film and a control gate, and having first insulating side walls formed on side walls of the gate electrode; a peripheral circuit area including single-layer gate electrodes made of the same layer as the control gate; and a first border area including: a first isolation region formed in the semiconductor substrate for isolating the non-volatile memory area and peripheral circuit area; a first conductive pattern including a portion made of the same layer as the control gate and formed above the isolation region; and a first redundant insulating side wall made of the same layer as the first insulating side wall and formed on the side wall of the first conductive pattern on the side of the non-volatile memory area.
摘要翻译：非易失性半导体存储器件包括：包括栅极的非易失性存储区，每个包括浮置栅极的堆叠，电极间绝缘膜和控制栅极，并且具有形成在栅电极的侧壁上的第一绝缘侧壁 ; 外围电路区域，包括由与控制栅极相同的层构成的单层栅电极; 以及第一边界区域，包括：形成在所述半导体衬底中的用于隔离所述非易失性存储区域和外围电路区域的第一隔离区域; 第一导电图案，包括由与所述控制栅极相同的层形成并形成在所述隔离区域上方的部分; 以及与所述第一绝缘侧壁相同的层构成的第一冗余绝缘侧壁，并形成在所述非易失性存储区域侧的所述第一导电图案的侧壁上。

58. 发明授权

US07504688B2 Semiconductor device with integrated flash memory and peripheral circuit and its manufacture method 有权
标题翻译：具有集成闪存和外围电路的半导体器件及其制造方法
公开(公告)号：US07504688B2
公开(公告)日：2009-03-17
申请号：US11201212
申请日：2005-08-11
申请人： Shinichi Nakagawa
发明人： Shinichi Nakagawa
IPC分类号： H01L29/788 , H01L29/76 , H01L29/94 , H01L31/00
CPC分类号： H01L27/11526 , H01L27/105 , H01L27/11536 , H01L27/11548
摘要： A non-volatile semiconductor memory device includes: a non-volatile memory area including gate electrodes, each including stack of a floating gate, an inter-electrode insulating film and a control gate, and having first insulating side walls formed on side walls of the gate electrode; a peripheral circuit area including single-layer gate electrodes made of the same layer as the control gate; and a first border area including: a first isolation region formed in the semiconductor substrate for isolating the non-volatile memory area and peripheral circuit area; a first conductive pattern including a portion made of the same layer as the control gate and formed above the isolation region; and a first redundant insulating side wall made of the same layer as the first insulating side wall and formed on the side wall of the first conductive pattern on the side of the non-volatile memory area.
摘要翻译：非易失性半导体存储器件包括：包括栅电极的非易失性存储区域，每个包括浮置栅极的堆叠体，电极间绝缘膜和控制栅极，并且具有形成在第一绝缘侧壁上的第一绝缘侧壁栅电极外围电路区域，包括由与控制栅极相同的层构成的单层栅电极; 以及第一边界区域，包括：形成在所述半导体衬底中的用于隔离所述非易失性存储区域和外围电路区域的第一隔离区域; 第一导电图案，包括由与所述控制栅极相同的层形成并形成在所述隔离区域上方的部分; 以及与所述第一绝缘侧壁相同的层构成的第一冗余绝缘侧壁，并形成在所述非易失性存储区域侧的所述第一导电图案的侧壁上。

59. 发明申请

US20080257732A1 GAS SENSOR 有权
标题翻译：气体传感器
公开(公告)号：US20080257732A1
公开(公告)日：2008-10-23
申请号：US12015238
申请日：2008-01-16
申请人： Yoshihiro NAKANO , Shinichi Nakagawa , Yuichi Koyama , Takio Kojima
发明人： Yoshihiro NAKANO , Shinichi Nakagawa , Yuichi Koyama , Takio Kojima
IPC分类号： G01N27/26
CPC分类号： G01N27/16 , Y10T428/2982
摘要： There is provided a gas sensor, including a gas sensing film formed of an oxide semiconductor material and a gas-permeable protection layer formed of oxide particles and arranged on the gas sensing film. The oxide particles of the protection layer have an average particle size of 500 nm or smaller.
摘要翻译：提供了一种气体传感器，其包括由氧化物半导体材料形成的气体感测膜和由氧化物颗粒形成并且设置在气体感测膜上的透气保护层。保护层的氧化物粒子的平均粒径为500nm以下。

60. 发明授权

US07412871B2 Oxidizing gas sensor and production method thereof 有权
标题翻译：氧化气体传感器及其制造方法
公开(公告)号：US07412871B2
公开(公告)日：2008-08-19
申请号：US11359380
申请日：2006-02-23
申请人： Yoshihiro Nakano , Masahito Kida , Shinichi Nakagawa , Takio Kojima
发明人： Yoshihiro Nakano , Masahito Kida , Shinichi Nakagawa , Takio Kojima
IPC分类号： G01N7/00
CPC分类号： G01N27/125
摘要： There is provided an oxidizing gas sensor that includes an insulating substrate, a gas sensing layer laminated on the insulating substrate and substantially made of tin oxide so as to make resistance changes in response to concentration variations in oxidizing gas and a plurality of catalyst grains applied to a surface of the gas sensing layer and substantially made of gold, wherein 20% or more of the catalyst grains have an aspect ratio of 2.0 or greater when viewed at from the surface of the gas sensing layer.
摘要翻译：提供一种氧化气体传感器，其包括绝缘基板，层压在绝缘基板上并基本上由氧化锡制成的气体感测层，以便响应于氧化气体的浓度变化和施加到气体感测层的表面，并且基本上由金制成，其中当从气体感测层的表面观察时，其中20％或更多的催化剂颗粒具有2.0或更大的纵横比。

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