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51. 发明申请

US20160351599A1 DUAL GATE TFT SUBSTRATE STRUCTURE UTILIZING COA SKILL 有权
标题翻译：双栅TFT基板结构利用COA技能
公开(公告)号：US20160351599A1
公开(公告)日：2016-12-01
申请号：US14771202
申请日：2015-05-21
申请人： Shenzhen China Star Optoelectronics Technology Co. Ltd.
发明人： Hejing Zhang , Chihyuan Tseng , Chihyu Su , Wenhui Li , Longqiang Shi , Xiaowen Lv , Shimin Ge
IPC分类号： H01L27/12 , H01L29/786 , H01L27/32
CPC分类号： H01L27/1248 , G02F1/1368 , H01L21/77 , H01L27/12 , H01L27/1225 , H01L27/32 , H01L27/322 , H01L27/3262 , H01L29/786 , H01L29/78606 , H01L29/78648 , H01L29/78663 , H01L29/78672 , H01L29/7869
摘要： The present invention provides a dual gate TFT substrate structure utilizing COA skill, comprising a substrate (1), a bottom gate (2) positioned on the substrate (1), a bottom gate isolation layer (3) covering the bottom gate (2) and the substrate (1), an active layer (4) positioned on the bottom gate isolation layer (3) above the bottom gate (2), an etching stopper layer (5) positioned on the active layer (4) and the bottom gate isolation layer (3), a source/a drain (6) positioned on the etching stopper layer (5) and respectively contacted with two ends of the active layer (4), color filter (8) positioned on the source/the drain (6) and the etching stopper layer (5), and a top gate (9) positioned on the color filter (8) and contacted with the bottom gate (2); the active layer (4) and the thin film of the previous manufacture process can be effectively protected and the original property and the stability of the active layer (4) and the thin film of the previous manufacture process can be ensured.
摘要翻译：本发明提供了利用COA技术的双栅极TFT基板结构，包括基板（1），位于基板（1）上的底栅（2），覆盖底栅（2）的底栅隔离层（3）和基板（1），位于底栅极（2）上方的底栅隔离层（3）上的有源层（4），位于有源层（4）和底栅（4）上的蚀刻阻挡层隔离层（3），定位在蚀刻停止层（5）上并分别与有源层（4）的两端接触的源极/漏极（6），位于源极/漏极上的滤色器（8） 6）和蚀刻停止层（5）和位于滤色器（8）上并与底栅（2）接触的顶栅（9）; 可以有效地保护有源层（4）和先前制造工艺的薄膜，并且可以确保活性层（4）和先前制造工艺的薄膜的原始性能和稳定性。

52. 发明申请

US20160307975A1 OLED DISPLAY ELEMENT 审中-公开
标题翻译： OLED显示元件
公开(公告)号：US20160307975A1
公开(公告)日：2016-10-20
申请号：US14763832
申请日：2015-05-22
申请人： Shenzhen China Star Optoelectronics Technology Co. Ltd.
发明人： Xiaowen Lv , Longqiang Shi
IPC分类号： H01L27/32
CPC分类号： H01L27/3246
摘要： The present invention provides an OLED display element, comprising: a substrate (1), a pixel electrode (2), an organic light emitting layer (3) and a common electrode (4) sequentially stacked on the substrate (1) in each pixel area, and a pixel isolation layer (5) having a plurality of apertures, and the aperture is formed with pixel isolation layer side walls (51) around, and each aperture corresponds to one pixel area; material of the pixel isolation layer (5) is inorganic material, and the pixel isolation layer side wall (51) comprises a straight line part (511), and a curved part (512) connected to the straight line part (511) from top to bottom, which can solve the deterioration issue of the organic light emitting layer (3) caused by the pixel isolation layer side walls (51) to prevent that gaps of the organic light emitting layer (3) and the common electrode (4) generate at positions of the pixel isolation layer side walls (51) and to avoid the short circuit of the common electrode (4) and the pixel electrode (2), i.e. the cathode and the anode of the OLED display element for improving the display effect.
摘要翻译：本发明提供了一种OLED显示元件，包括：在每个像素中依次层叠在基板（1）上的基板（1），像素电极（2），有机发光层（3）和公共电极（4）区域和具有多个孔的像素隔离层（5），并且所述孔围绕着像素隔离层侧壁（51）形成，并且每个孔对应于一个像素区域; 像素隔离层（5）的材料是无机材料，像素隔离层侧壁（51）包括直线部分（511）和从顶部连接到直线部分（511）的弯曲部分（512）可以解决由像素隔离层侧壁（51）引起的有机发光层（3）的劣化问题，以防止有机发光层（3）和公共电极（4）的间隙产生在像素隔离层侧壁（51）的位置处，并且避免了公共电极（4）和像素电极（2）的短路，即用于改善显示效果的OLED显示元件的阴极和阳极。

53. 发明申请

US20200083261A1 THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：US20200083261A1
公开(公告)日：2020-03-12
申请号：US16684552
申请日：2019-11-14
申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd.
发明人： Xiaowen Lv
IPC分类号： H01L27/12 , H01L29/786 , H01L29/66 , H01L29/51 , H01L29/49 , H01L51/56 , H01L51/52
摘要： A thin film transistor array substrate includes: a substrate on which a thin film transistor and a storage capacitor are formed. The storage capacitor includes a first electrode plate formed on the substrate, a gate isolation layer or an etching stopper layer formed on the first electrode plate, and a second electrode plate formed on the gate isolation layer or the etching stopper layer. The etching stopper layer may be formed on the gate isolation layer, of which one is partially etched and removed such that there is only one of the gate isolation layer and the etching stopper layer existing between the two electrode plates of the storage capacitor so as to reduce the overall thickness of the isolation layer of the storage capacitor. Thus, the capacitor occupies a smaller area and a higher aperture ratio may be achieved.

54. 发明授权

US10121441B2 GOA driver circuit and liquid crystal display 有权
公开(公告)号：US10121441B2
公开(公告)日：2018-11-06
申请号：US15323974
申请日：2016-12-20
申请人： SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
发明人： Xiaowen Lv , Shujhih Chen
IPC分类号： G09G3/36
摘要： A gate driver on array (GOA) driver circuit and a liquid crystal display are proposed. The GOA driver circuit includes cascaded GOA units. The Nth-stage GOA unit includes a pull-up module, a pull-up control module, a pull-down holding module, a transferring module, and a bootstrap capacitor module. The pull-up module, the pull-down holding module, and the bootstrap capacitor module are electrically connected to an Nth-stage gate signal node Qn and an Nth-stage horizontal scan line Gn, respectively. The pull-up control module and the transferring module are connected to the Nth-stage gate signal node Qn.

55. 发明申请

US20180097020A1 THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：US20180097020A1
公开(公告)日：2018-04-05
申请号：US15834077
申请日：2017-12-07
申请人： Shenzhen China Star Optoelectronics Technology Co Ltd.
发明人： Xiaowen Lv , Chihyu Su
IPC分类号： H01L27/12 , H01L29/786 , H01L29/423 , H01L29/49 , H01L21/4757 , H01L29/51
CPC分类号： H01L27/1255 , H01L21/47573 , H01L21/77 , H01L27/12 , H01L27/1225 , H01L27/1248 , H01L27/1288 , H01L29/42356 , H01L29/4908 , H01L29/517 , H01L29/518 , H01L29/7869
摘要： A thin-film transistor (TFT) array substrate includes a TFT arrangement and a storage capacitor. A gate insulation layer has a portion interposed between two electrode plates of the storage capacitor and thinner than a remaining portion of the gate insulation layer and thus, the thickness of insulation between the electrode plates of the storage capacitor is reduced so that the area of the opposite surfaces of the capacitor can be made smaller and an increased aperture ratio can be achieved.

56. 发明授权

US09935160B2 OLED display device having pixel separation layer sidewall comprising curved sections 有权
公开(公告)号：US09935160B2
公开(公告)日：2018-04-03
申请号：US14762805
申请日：2015-05-25
申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd.
发明人： Xiaowen Lv , Hejing Zhang
IPC分类号： H01L27/32 , H01L51/52 , H01L51/50
CPC分类号： H01L27/3246 , H01L51/5012 , H01L51/5206 , H01L51/5221 , H01L51/5237 , H01L2251/301 , H01L2251/5392
摘要： The present invention provides an OLED display device, which includes: a substrate (1), a plurality of pixel zones arranged in an array on the substrate (1), each of the pixel zones comprising a pixel electrode (2), an organic light-emitting layer (3), and a common electrode (4) that are sequentially stacked on the substrate (1), and a pixel separation layer (5) including a plurality of openings, the openings being each delimited and circumferentially surrounded by a pixel separation layer sidewall (51), each of the openings corresponding to one of the pixel zones. The pixel separation layer (5) is formed of an inorganic material. The pixel separation layer sidewall (51) includes, arranged from top to bottom, a first curved section (511), a linear section (512), and a second curved section (513), so as to overcome a deterioration issue of the organic light-emitting layer (3) caused by the pixel separation layer sidewall (51), prevent the organic light-emitting layer (3) and the common electrode (4) from breaking at a site corresponding to the pixel separation layer sidewall (51), prevent shorting between the common electrode (4) and the pixel electrode (2), which are the cathode and anode of the OLED display device, and improve displaying performance.

57. 发明授权

US09876037B2 Thin-film transistor array substrate and manufacturing method thereof 有权
公开(公告)号：US09876037B2
公开(公告)日：2018-01-23
申请号：US14762813
申请日：2015-05-25
申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd.
发明人： Xiaowen Lv , Chihyu Su
IPC分类号： H01L27/12 , H01L29/786 , H01L29/49 , H01L29/423 , H01L21/4757 , H01L29/51
CPC分类号： H01L27/1255 , H01L21/47573 , H01L21/77 , H01L27/12 , H01L27/1225 , H01L27/1248 , H01L27/1288 , H01L29/42356 , H01L29/4908 , H01L29/517 , H01L29/518 , H01L29/7869
摘要： The present invention provides a thin-film transistor array substrate and a manufacturing method thereof. In the thin-film transistor array substrate of the present invention, the portion of the gate insulation layer interposed between two electrode plates of the storage capacitor is smaller than that of the remaining portion of the gate insulation layer so that the thickness of the insulation layer of the storage capacitor is reduced and the area of the opposite surfaces of the capacitor can be made smaller and an increased aperture ratio can be achieved. The manufacturing method of a thin-film transistor array substrate of the present invention provides uses a half tone masking operation and applies two etching operations to have a portion of a gate insulation layer that is located on a first electrode plate of a storage capacitor partially etched so as to reduce the thickness thereof, thereby reducing the thickness of the internal insulation layer of the storage capacitor, whereby the area of the opposite surfaces of the capacitor electrode plates can be reduced under the condition of achieving the same capacitance and thus the aperture ratio is increased.

58. 发明授权

US09806106B2 Thin film transistor array substrate and manufacture method thereof 有权
公开(公告)号：US09806106B2
公开(公告)日：2017-10-31
申请号：US14763818
申请日：2015-05-21
申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd.
发明人： Xiaowen Lv
IPC分类号： H01L27/12 , H01L29/786 , H01L29/51 , H01L29/49 , H01L29/66
CPC分类号： H01L27/1255 , H01L27/1225 , H01L27/1259 , H01L29/4908 , H01L29/517 , H01L29/66969 , H01L29/7869 , H01L51/52 , H01L51/56
摘要： The present invention provides a thin film transistor array substrate and a manufacture method thereof, comprising: a substrate (1) and a thin film transistor and a storage capacitor formed on the substrate (1); the storage capacitor comprises a first electrode plate (31) on the substrate (1), a gate isolation layer (31) or an etching stopper layer (5) on the first electrode plate (31), a second electrode plate (32) on the gate isolation layer (3) or the etching stopper layer (5); there is only one isolation layer, which is the gate isolation layer or the etching stopper layer, existing between the two electrode plates of the storage capacitor in the aforesaid thin film transistor array substrate, the isolation layer thickness of the storage capacitor is thinner, and relatively, the capacitor occupies a smaller area and possesses a higher aperture ratio.

59. 发明授权

US09768324B2 Co-planar oxide semiconductor TFT substrate structure and manufacture method thereof 有权
公开(公告)号：US09768324B2
公开(公告)日：2017-09-19
申请号：US15436690
申请日：2017-02-17
申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd.
发明人： Xiaowen Lv , Chihyuan Tseng
IPC分类号： H01L21/768 , H01L29/786 , H01L27/12 , H01L29/66 , H01L29/417 , H01L21/44
CPC分类号： H01L29/78696 , H01L21/44 , H01L27/124 , H01L27/1248 , H01L29/41733 , H01L29/66969 , H01L29/78609 , H01L29/7869
摘要： Provided is a co-planar oxide semiconductor TFT substrate structure, in which an active layer includes a main body and a plurality of short channels connected to the main body and are separated with a plurality of strip metal electrodes to make the active layer possess higher mobility and lower leak current. Also provided is a manufacture method of the co-planar oxide semiconductor TFT substrate structure, in which with the plurality of strip metal electrodes formed between the source and the drain, which are separately positioned, as deposing the oxide semiconductor layer, the plurality of short channels can be formed between the source and the drain. The method is simple and does not require additional mask or process to obtain the active layer structure different from prior art. The manufactured actively layer possesses higher mobility and lower leak current. Thus, the performance of the TFT element can be improved.

60. 发明授权

US09768323B2 Manufacture method of dual gate oxide semiconductor TFT substrate and structure thereof 有权
公开(公告)号：US09768323B2
公开(公告)日：2017-09-19
申请号：US15455082
申请日：2017-03-09
申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd.
发明人： Shimin Ge , Hejing Zhang , Chihyuan Tseng , Chihyu Su , Wenhui Li , Longqiang Shi , Xiaowen Lv
IPC分类号： H01L29/10 , H01L29/786 , H01L27/32 , H01L29/24 , H01L29/66 , H01L27/12 , H01L29/51 , H01L29/49 , H01L21/4763 , H01L21/027
CPC分类号： H01L29/7869 , H01L21/02565 , H01L21/02631 , H01L21/0274 , H01L21/467 , H01L21/47635 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L27/1288 , H01L27/3248 , H01L27/3262 , H01L29/24 , H01L29/45 , H01L29/4908 , H01L29/495 , H01L29/518 , H01L29/66969 , H01L29/78618 , H01L29/78648 , H01L29/78696 , H01L51/5206 , H01L2227/323
摘要： A dual gate oxide semiconductor TFT substrate is made by utilizing a halftone mask to implement one photo process, which accomplishes patterning of an oxide semiconductor layer and forms an oxide conductor layer with ion doping process. Patterning of a bottom gate isolation layer and a top gate isolation layer are performed at the same time with one photo process. A first top gate, a first source, a first drain, a second top gate, a second source, and a second drain are formed at the same time with one photo process. Patterning of a flat layer, a passivation layer, and a top gate isolation layer are performed at the same time with one photo process. As such, the number of photo processes applied to manufacture the TFT substrate is reduced to five and the manufacturing process is shortened to thereby raise the production efficiency and lower the production cost.

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