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51. 发明授权

US07304902B2 Pre-charge voltage supply circuit of semiconductor device 有权
标题翻译：半导体器件的预充电电压电路
公开(公告)号：US07304902B2
公开(公告)日：2007-12-04
申请号：US11275162
申请日：2005-12-16
申请人： Sang Il Park , Jong Won Lee
发明人： Sang Il Park , Jong Won Lee
IPC分类号： G11C7/00
CPC分类号： G11C11/4094 , G11C7/12
摘要： A pre-charge voltage supply circuit of a semiconductor device is disclosed which includes a first switch which supplies a pre-charge voltage in response to a first signal having a predetermined voltage level, and has a turn-on resistance of a predetermined level, and a second switch which is connected in parallel to the first switch, supplies the pre-charge voltage in response to a second signal, and has a turn-on resistance lower than the turn-on resistance of the first switch.
摘要翻译：公开了一种半导体器件的预充电电压供应电路，其包括响应于具有预定电压电平的第一信号提供预充电电压并具有预定电平的导通电阻的第一开关，以及与第一开关并联连接的第二开关，响应于第二信号而提供预充电电压，并且具有比第一开关的导通电阻低的导通电阻。

52. 发明授权

US07262653B2 Voltage level detection circuit 有权
标题翻译：电压电平检测电路
公开(公告)号：US07262653B2
公开(公告)日：2007-08-28
申请号：US11275463
申请日：2006-01-06
申请人： Sang Il Park , Ja Seung Gou
发明人： Sang Il Park , Ja Seung Gou
IPC分类号： G05F1/10
CPC分类号： H03K5/24
摘要： A voltage level detection circuit is disclosed. The voltage level detection circuit comprises a pull-up unit including a plurality of pull-up devices, each for supplying an internal voltage in response to a signal resulting from a logic operation of a voltage up control signal and a voltage down control signal, a voltage division unit including a plurality of voltage dividers, each for dividing the internal voltage from a corresponding one of the pull-up device, a switching unit including a plurality of switching devices, each for switching and supplying an output voltage from a corresponding one of the voltage dividers to an output node in response to a signal resulting from a logic operation of the voltage up control signal and voltage down control signal, and a comparator for comparing the voltage at the output node with a predetermined reference voltage and outputting a voltage pumping enable signal according to a result of the comparison.
摘要翻译：电压电平检测电路包括一个上拉单元，其包括多个上拉装置，每个上拉装置用于响应由升压控制信号和降压控制信号的逻辑运算产生的信号而提供内部电压，分压单元包括多个分压器，每个分压器用于分压来自上拉装置中的相应一个的内部电压，包括多个开关装置的开关单元，每个开关装置用于切换和提供来自相应的一个的输出电压响应于由升压控制信号和降压控制信号的逻辑运算而产生的信号，分压器输出到输出节点;以及比较器，用于将输出节点处的电压与预定参考电压进行比较，并输出电压泵浦根据比较结果启用信号。

53. 外观设计

USD542749S1 TV receiver 有权
公开(公告)号：USD542749S1
公开(公告)日：2007-05-15
申请号：US29224046
申请日：2005-02-24
申请人： Kyoung Hoon Kim , Sang Il Park , Young Sun Shin , Baek Ki Kim
设计人： Kyoung Hoon Kim , Sang Il Park , Young Sun Shin , Baek Ki Kim

54. 发明授权

US07170803B2 Current reduction circuit of semiconductor device 失效
标题翻译：半导体器件的电流降低电路
公开(公告)号：US07170803B2
公开(公告)日：2007-01-30
申请号：US11275421
申请日：2005-12-30
申请人： Sang Il Park
发明人： Sang Il Park
IPC分类号： G11C29/00
CPC分类号： G11C29/02 , G11C29/025 , G11C29/83 , G11C2029/5006
摘要： A current reduction circuit of a semiconductor device is disclosed which includes an enabling signal generator which outputs a predetermined enabling signal in association with a cell block in which a bridge has been formed between a word line and a bit line, and an isolation controller which is enabled in response to the enabling signal, and outputs a control signal to periodically isolate the bridge-formed cell block from a sense amplifier array for a predetermined period in a standby mode in response to a periodic signal enabled at intervals of a predetermined time.
摘要翻译：公开了一种半导体器件的电流减小电路，其包括使能信号发生器，其与在字线和位线之间形成桥的单元块相关联地输出预定的使能信号，以及隔离控制器，响应于使能信号使能，并且响应于以预定时间间隔启用的周期性信号，输出控制信号，以在备用模式中将桥形成的单元块周期性地与读出放大器阵列隔离一段预定周期。

55. 发明授权

US06692997B2 Thin film transistors with dual layered source/drain electrodes and manufacturing method thereof, and active matrix display device and manufacturing method thereof 有权
标题翻译：具有双层源极/漏极的薄膜晶体管及其制造方法，以及有源矩阵显示装置及其制造方法
公开(公告)号：US06692997B2
公开(公告)日：2004-02-17
申请号：US10077771
申请日：2002-02-20
申请人： Woo Young So , Kyung Jin Yoo , Sang Il Park
发明人： Woo Young So , Kyung Jin Yoo , Sang Il Park
IPC分类号： H01L2184
CPC分类号： G02F1/136227 , H01L27/124 , H01L27/1244 , H01L27/1288 , H01L29/41733 , H01L29/458 , H01L29/66757
摘要： The present invention discloses a method of manufacturing an active matrix display device, comprising: a) forming a semiconductor layer on an insulating substrate; b) forming a gate insulating layer over the whole surface of the substrate while convering the semiconductor layer; c) forming a gate electrode on the gate insulating layer over the semiconductor layer; d) forming spacers on both side wall portions of the gate electrode while exposing both end portions of the semiconductor layer; e) ion-implaing a high-density impurity into the semiconductor layer to form high-density source and drain regions in the semiconductor layer; f) depositing sequentially a transparent conductive layer and a metal layer on the inter insulating layer; g) patterning the transparent conductive layer and the metal layer to form the source and drain electrodes, the source and drain electrodes directly contacting the high-density source and drain regions and having a dual-layered structure; h) forming a passivation layer over the whole surface of the substrate; i) etching the passivation layer and the metal layer to form an opening portion exposing a portions of the transparent conductive layer, thereby forming a pixel electrode; and j) performing a reflow process to cover the metal layer in the opening portion by the passivation layer.
摘要翻译：本发明公开了一种制造有源矩阵显示装置的方法，包括：a）在绝缘基板上形成半导体层; b）在半导体层会聚的同时在衬底的整个表面上形成栅极绝缘层; c）在半导体层上的栅极绝缘层上形成栅电极; d）在露出半导体层的两个端部部分的同时，在栅电极的两个侧壁部分上形成间隔物; e）将高密度杂质离子注入到半导体层中以在半导体层中形成高密度源极和漏极区; f）在所述绝缘层上依次沉积透明导电层和金属层; g）图案化透明导电层和金属层以形成源极和漏极，源极和漏极直接接触高密度源极和漏极区并具有双层结构; h）在衬底的整个表面上形成钝化层; i）蚀刻钝化层和金属层以形成露出透明导电层的一部分的开口部分，从而形成像素电极; 和j）进行回流处理以通过钝化层覆盖开口部分中的金属层。

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