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    • 51. 发明申请
    • Fully-Buffered Memory-Module with Error-Correction Code (ECC) Controller in Serializing Advanced-Memory Buffer (AMB) that is transparent to Motherboard Memory Controller
    • 具有错误校正码(ECC)控制器的全缓冲存储器模块,串行化为主板内存控制器透明的高级内存缓冲区(AMB)
    • US20080022186A1
    • 2008-01-24
    • US11309298
    • 2006-07-24
    • Ramon S. CoDavid Sun
    • Ramon S. CoDavid Sun
    • G11C29/00
    • G06F11/1044G11C5/04G11C2029/0409
    • An error-correcting fully-buffered memory module can detect and correct some errors in data read from memory chips. An error correction code ECC controller is added to the Advanced Memory Buffer (AMB) on the memory module that fully buffers memory requests sent as serial packets. The error correction controller generates ECC bits for write data, and both the ECC bits and the write data are written to the memory chips by a DRAM controller in the AMB. During reads, an ECC checker generates a syndrome and can activate an error corrector to correct data or signal a non-correctable error. The corrected data is formed into serial packets sent back to the motherboard by the AMB. Configuration data for the ECC controller could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to error-correction configuration registers on the AMB during power-up.
    • 纠错完全缓冲存储器模块可以检测和纠正从存储器芯片读取的数据中的一些错误。 纠错码ECC控制器被添加到存储器模块上的高级存储器缓冲器(AMB),该存储器模块完全缓冲作为串行数据包发送的存储器请求。 纠错控制器产生用于写数据的ECC位,并且ECC位和写数据都由AMB中的DRAM控制器写入存储器芯片。 在读取期间,ECC检查器产生综合征,并且可以激活错误校正器以校正数据或发出不可纠错的错误。 校正后的数据形成为由AMB发回主板的串行数据包。 可以首先将ECC控制器的配置数据编程到存储器模块上的串行存在检测电可擦除可编程只读存储器(SPD-EEPROM)中,然后在上电时复制到AMB上的纠错配置寄存器中, 向上。
    • 53. 发明申请
    • Wireless flash memory card expansion system
    • 无线闪存卡扩展系统
    • US20070239929A1
    • 2007-10-11
    • US11399975
    • 2006-04-07
    • Ben ChenNgoc LeDavid Sun
    • Ben ChenNgoc LeDavid Sun
    • G06F12/00
    • G06F13/385G06F3/0607G06F3/0632G06F3/0661G06F3/0679G06F2213/3814
    • A Flash memory card system is disclosed. The Flash memory card system comprises a Flash memory wireless host adapter and a Flash memory bus wireless device. The Flash memory wireless host adapter comprises a Flash memory card connector and a Flash memory controller coupled to the Flash memory card connector. The Flash-52 memory card signals are converted to standard Flash memory internal bus signals by the Flash memory controller. The host adapter further comprises a Flash memory wireless module coupled to the Flash memory controller for receiving and transmitting the standard Flash memory bus signals wirelessly. The Flash-51 memory bus wireless device comprises a Flash memory bus wireless device adapter coupled to a Flash memory. The device adapter is paired to the wireless module for receiving and transmitting the standard Flash memory bus signals wirelessly. A host device storage capacity utilizing the Flash memory card system is expanded.
    • 公开了一种闪存卡系统。 闪存卡系统包括闪存无线主机适配器和闪存总线无线设备。 闪存无线主机适配器包括闪存卡连接器和连接到闪存卡连接器的闪存控制器。 Flash-52存储卡信号由闪存控制器转换为标准闪存内部总线信号。 主机适配器还包括闪速存储器无线模块,其耦合到闪速存储器控制器,用于无线地接收和发送标准闪存总线信号。 Flash-51存储器总线无线设备包括耦合到闪存的闪存总线无线设备适配器。 设备适配器与无线模块配对,用于无线接收和发送标准闪存总线信号。 扩展了利用闪存卡系统的主机设备存储容量。
    • 55. 发明授权
    • Manifold-Distributed Air Flow Over Removable Test Boards in a Memory-Module Burn-In System With Heat Chamber Isolated by Backplane
    • 通过背板隔离的热室的内存模块烧录系统中的可拆卸测试板上的歧管分布式气流
    • US07131040B2
    • 2006-10-31
    • US10906318
    • 2005-02-14
    • Ramon S. CoTat Leung LaiDavid Sun
    • Ramon S. CoTat Leung LaiDavid Sun
    • G11C29/00
    • G01R31/2855G01R31/2863G01R31/31905G11C29/56G11C29/56004G11C29/56016G11C2029/2602
    • Hot air blown past memory modules under test in a heat chamber is improved. Hot air entering the chamber from an inlet pipe is split by a manifold and deflectors. Holes in the manifold allow for a relatively even air distribution within the chamber, minimizing temperature variations. Return air is collected by a heat-chamber bottom cover into a return pipe. A heating unit re-heats the return air and blows it into the inlet pipe. One side of the heat chamber is an insulated backplane. Memory modules are inserted into sockets on module motherboards, which are inserted into motherboard sockets on the backplane. On the other side of the backplane, card sockets receive pattern-generator cards outside the heat chamber but electrically connected to the module motherboards through the backplane. The pattern-generator cards exercise the memory modules. The pattern-generator cards are cooled while memory modules in the heat chamber are heated.
    • 改进了在热室中被测试的存储器模块的热空气。 从入口管进入腔室的热空气被歧管和导流器分开。 歧管中的孔允许室内相对均匀的空气分布,使温度变化最小化。 返回空气由热室底盖收集回流管。 加热单元重新加热回流空气并将其吹入入口管。 加热室的一侧是绝缘背板。 内存模块插入模块主板上的插座,插入背板主板插槽。 在背板的另一侧,卡插座在加热室外部接收图案发生器卡,但通过背板电连接到模块主板。 图案发生器卡练习内存模块。 图案发生器卡被冷却,而加热室中的存储器模块被加热。
    • 56. 发明申请
    • Flash memory controller utilizing multiple voltages and a method of use
    • 使用多种电压的闪存控制器和使用方法
    • US20060203556A1
    • 2006-09-14
    • US11067095
    • 2005-02-25
    • Ben ChenDavid ChenDavid Sun
    • Ben ChenDavid ChenDavid Sun
    • G11C16/04
    • G11C16/30G11C16/20
    • A Flash memory controller is disclosed. The Flash memory controller comprises a host interface, a Flash memory interface, controller logic coupled between the host interface, the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or a multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.
    • 公开了一种闪存控制器。 闪存控制器包括主机接口,闪存接口,耦合在主机接口之间的控制器逻辑,处理多个电压的控制器逻辑。 控制器还包括允许多电压主机与高电压或多电压闪存接口的机构。 根据本发明的多电压闪速存储器控制器提供了比传统闪存控制器以下的优点:(1)允许电压主机与在任何组合中以不同电压工作的多个闪存组件进行接口; (2)通过将可编程稳压器和电压比较器机构与闪存控制器集成来提高功耗效率; (3)电源配置消除外部跳线选择; 和(4)闪存控制器电源接口引脚简化。
    • 57. 发明申请
    • Reduction of reactive gas attack on substrate heater
    • 减少基板加热器的反应气体攻击
    • US20060005856A1
    • 2006-01-12
    • US10882129
    • 2004-06-29
    • David SunKeith HarveyNitin IngleKarthik Janakiraman
    • David SunKeith HarveyNitin IngleKarthik Janakiraman
    • C25F3/12C23F1/00
    • H01J37/32477B08B7/0035C23C16/4405H01J37/32357H01J37/32862
    • Embodiments of the present invention provide a method of reducing damage to the substrate support by the cleaning gas during a cleaning process of the processing chamber, such as by reducing aluminum fluoride formation on the substrate support. In one embodiment, a method of cleaning a semiconductor process chamber which is used for processing a substrate disposed on a surface of a substrate support comprises introducing a cleaning gas into a process chamber through an inlet facing a surface of a substrate support. The inlet is spaced from the surface of the substrate support by a clean spacing. Reactive species are provided from the cleaning gas to clean the process chamber. The clean spacing is substantially greater than a process spacing between the inlet and the surface of the substrate support during processing of a substrate on the substrate support in the process chamber.
    • 本发明的实施例提供了一种在处理室的清洁处理期间减少由清洁气体对基板支撑件的损害的方法,例如通过减少基板支撑件上的氟化铝形成。 在一个实施例中,清洁用于处理设置在基板支撑件的表面上的基板的半导体处理室的方法包括通过面向基板支撑件的表面的入口将清洁气体引入处理室。 入口与衬底支撑件的表面间隔一定距离。 从清洁气体提供活性物质以清洁处理室。 在处理处理室中的衬底支撑件上的衬底的处理期间,清洁间距明显大于衬底支撑件的入口和表面之间的工艺间隔。
    • 59. 发明授权
    • System tools for evaluating operational and financial performance from dispatchers using after the fact analysis
    • 在事实分析后使用调度员评估运营和财务绩效的系统工具
    • US09558250B2
    • 2017-01-31
    • US12830011
    • 2010-07-02
    • David SunKwok CheungBut-Chung ChiuXing WangYing XiaoKee MokMike Yao
    • David SunKwok CheungBut-Chung ChiuXing WangYing XiaoKee MokMike Yao
    • G06Q10/06G06F17/30G06Q10/04
    • G06F17/30557G06Q10/04G06Q10/06Y04S10/54Y04S10/60
    • A decision-support tool is provided to evaluate operational and financial performance for dispatchers in power grid control centers associated with utility systems. A scheduler engine is coupled to a comprehensive operating plan that applies after the fact analysis for performance metrics, root-cause impacts and process re-engineering. A relational database is coupled to a data archiver that captures actual system and resource conditions and then supplies the system and resource conditions to the relational database. The scheduler engine receives the actual system and resource conditions from the relational database and processes it to calculate system performance. A user interface is configured to display at least one of, transmission evaluation application displays, reference and scenario cases and associations between them, results presented with a graphical or tabular displays, comparison results between scenario cases and a reference case, a family of curves where each curve is a performance metric, comparison of scenario input data, study results and statistical analysis and historical data.
    • 提供了一个决策支持工具,用于评估与公用事业系统相关的电网控制中心的调度员的运营和财务绩效。 调度器引擎被耦合到综合运行计划之后,在针对性能指标,根本原因影响和流程重新设计的事实分析之后应用。 关系数据库被耦合到数据归档器,其捕获实际的系统和资源条件,然后将系统和资源条件提供给关系数据库。 调度器引擎从关系数据库接收实际的系统和资源条件,并处理它以计算系统性能。 用户界面被配置为显示以下中的至少一个:传输评估应用显示,参考和场景情况以及它们之间的关联,以图形或表格显示呈现的结果,情景案例与参考案例之间的比较结果,曲线族 每个曲线是绩效指标,场景输入数据的比较,研究结果和统计分析和历史数据。