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    • 51. 发明授权
    • Method and device for signal testing
    • 用于信号测试的方法和装置
    • US06233528B1
    • 2001-05-15
    • US09148949
    • 1998-09-08
    • Jiin LaiJyhfong LinHsin-Chieh Lin
    • Jiin LaiJyhfong LinHsin-Chieh Lin
    • G01R1300
    • G01R31/31709G01R31/3016
    • A signal-testing device used with a tester for testing a first signal and a second signal includes a selected signal generator receiving first signal and second signal for generating a selected signal the state of which is changed when first signal and second signal are in specific states, and a signal selector for selectively outputting one of first and second signals in response to the selected signal state. The present invention also provides a signal-testing method including steps of a) generating a selected signal having a plurality of pulses in response to a first signal and a second signal, b) obtaining a plurality of time differences between times when two inter-adjacent respective pulses respectively reach a specific voltage, c) obtaining a plurality of absolute values between two inter-adjacent respective time differences, and d) obtaining a phase difference by dividing by 2 an average value of the absolute values.
    • 与用于测试第一信号和第二信号的测试仪一起使用的信号测试装置包括接收第一信号的选择信号发生器和用于产生当第一信号和第二信号处于特定状态时其状态改变的选择信号的第二信号 以及信号选择器,用于响应于所选择的信号状态选择性地输出第一和第二信号之一。 本发明还提供了一种信号测试方法,包括以下步骤:a)响应于第一信号和第二信号产生具有多个脉冲的选定信号,b)获得两个相邻时间之间的多个时间差 各个脉冲分别达到特定电压,c)在两个相邻的相应时间差之间获得多个绝对值,以及d)通过将绝对值的平均值除以2来获得相位差。
    • 52. 发明授权
    • Electronic system and digital right management methods thereof
    • 电子系统及其数字权利管理方法
    • US08738924B2
    • 2014-05-27
    • US12107206
    • 2008-04-22
    • Zhun HuangJiin Lai
    • Zhun HuangJiin Lai
    • H04L9/32
    • G06F21/10G06F21/445G06F2221/2129
    • An electronic system is provided, in which a smart chip, a smart chip controller, a processor, a system memory, and an access management module is provided. The smart chip controller communicates with the smart chip. The processor performs a mutual authentication with the smart chip. The system memory is accessible to the smart chip and the processor. The access management module is coupled between the processor and the smart chip controller. The access management module prevents the processor accessing a certain range of the system memory according to a block command from the smart chip controller, in response of that the mutual authentication between the processor and the smart chip is failed.
    • 提供了一种电子系统,其中提供智能芯片,智能芯片控制器,处理器,系统存储器和访问管理模块。 智能芯片控制器与智能芯片通信。 处理器与智能芯片执行相互认证。 智能芯片和处理器可以访问系统内存。 访问管理模块耦合在处理器和智能芯片控制器之间。 响应于处理器和智能芯片之间的相互认证失败,访问管理模块防止处理器根据来自智能芯片控制器的块命令访问系统存储器的特定范围。
    • 54. 发明授权
    • Backward compatible optical USB device
    • 向后兼容的光学USB设备
    • US08270840B2
    • 2012-09-18
    • US12818361
    • 2010-06-18
    • Jiin Lai
    • Jiin Lai
    • H04B10/02H04B10/04
    • G06F13/426G06F13/385
    • An optical USB device includes an electro-optical converter configured to receive optical signals from an optical fiber and to convert them into first electrical signals and configured to receive second electrical signals and to convert them into optical signals for transmission to the optical fiber. A USB 3.0 pin-compatible connector is coupled to the electro-optical converter. The pin-compatible connector is configured for coupling to a USB 3.0 connector of another USB device. The pin-compatible connector includes a first pair of pins configured for transmitting the first electrical signals from the optical USB device. The pin-compatible connector also includes a second pair of pins configured for receiving the second electrical signals into the optical USB device. The pin-compatible connector also includes a third pair of pins configured for transceiving third electrical signals according to a non-USB serial bus interface protocol to control and configure the electro-optical converter.
    • 光学USB装置包括电光转换器,其被配置为从光纤接收光信号并将其转换为第一电信号并且被配置为接收第二电信号并将其转换成用于传输到光纤的光信号。 USB 3.0引脚兼容的连接器耦合到电光转换器。 引脚兼容连接器被配置为耦合到另一个USB设备的USB 3.0连接器。 引脚兼容连接器包括被配置为从光学USB设备传输第一电信号的第一对引脚。 引脚兼容连接器还包括被配置为将第二电信号接收到光学USB设备中的第二对引脚。 引脚兼容连接器还包括第三对引脚,其被配置用于根据非USB串行总线接口协议收发第三电信号,以控制和配置电光转换器。
    • 57. 发明申请
    • BACKWARD COMPATIBLE OPTICAL USB DEVICE
    • 背面兼容的OPTICAL USB DEVICE
    • US20110243568A1
    • 2011-10-06
    • US12818361
    • 2010-06-18
    • Jiin Lai
    • Jiin Lai
    • H04B10/28
    • G06F13/426G06F13/385
    • An optical USB device includes an electro-optical converter configured to receive optical signals from an optical fiber and to convert them into first electrical signals and configured to receive second electrical signals and to convert them into optical signals for transmission to the optical fiber. A USB 3.0 pin-compatible connector is coupled to the electro-optical converter. The pin-compatible connector is configured for coupling to a USB 3.0 connector of another USB device. The pin-compatible connector includes a first pair of pins configured for transmitting the first electrical signals from the optical USB device. The pin-compatible connector also includes a second pair of pins configured for receiving the second electrical signals into the optical USB device. The pin-compatible connector also includes a third pair of pins configured for transceiving third electrical signals according to a non-USB serial bus interface protocol to control and configure the electro-optical converter.
    • 光学USB装置包括电光转换器,其被配置为从光纤接收光信号并将其转换为第一电信号并且被配置为接收第二电信号并将其转换成用于传输到光纤的光信号。 USB 3.0引脚兼容的连接器耦合到电光转换器。 引脚兼容连接器被配置为耦合到另一个USB设备的USB 3.0连接器。 引脚兼容连接器包括被配置为从光学USB设备传输第一电信号的第一对引脚。 引脚兼容连接器还包括被配置为将第二电信号接收到光学USB设备中的第二对引脚。 引脚兼容连接器还包括第三对引脚,其被配置用于根据非USB串行总线接口协议收发第三电信号,以控制和配置电光转换器。
    • 59. 发明申请
    • ELECTRONIC SYSTEM AND DIGITAL RIGHT MANAGEMENT METHODS THEREOF
    • 电子系统及其数字权限管理方法
    • US20080313471A1
    • 2008-12-18
    • US12107206
    • 2008-04-22
    • Zhun HuangJiin Lai
    • Zhun HuangJiin Lai
    • H04K1/00
    • G06F21/10G06F21/445G06F2221/2129
    • An electronic system is provided, in which a smart chip, a smart chip controller, a processor, a system memory, and an access management module is provided. The smart chip controller communicates with the smart chip. The processor performs a mutual authentication with the smart chip. The system memory is accessible to the smart chip and the processor. The access management module is coupled between the processor and the smart chip controller. The access management module prevents the processor accessing a certain range of the system memory according to a block command from the smart chip controller, in response of that the mutual authentication between the processor and the smart chip is failed.
    • 提供了一种电子系统,其中提供智能芯片,智能芯片控制器,处理器,系统存储器和访问管理模块。 智能芯片控制器与智能芯片通信。 处理器与智能芯片执行相互认证。 智能芯片和处理器可以访问系统内存。 访问管理模块耦合在处理器和智能芯片控制器之间。 响应于处理器和智能芯片之间的相互认证失败,访问管理模块防止处理器根据来自智能芯片控制器的块命令访问系统存储器的特定范围。
    • 60. 发明申请
    • DATA TRANSMISSION COORDINATING METHOD AND SYSTEM
    • 数据传输协调方法与系统
    • US20080046618A1
    • 2008-02-21
    • US11876579
    • 2007-10-22
    • Ruei-Ling LinJiin Lai
    • Ruei-Ling LinJiin Lai
    • G06F13/36
    • G06F13/4217
    • A data transmission coordinating method is used between a central processing unit and a bridge chip of a computer system. By entering the computer system into a coordinating state, the data transmission coordinating method is executed. The bridge chip and the CPU are informed of maximum bit numbers of each other for data transmission therebetween via the front side bus. Then, a commonly operable maximum bit number for data transmission between the CPU and the bridge chip can be coordinated according to the first and second maximum bit numbers. Once the commonly operable maximum bit number is determined, the CPU is reset to operate with the commonly operable maximum bit number. The maximum bit numbers are those of bus transmission width or bus transmission speed.
    • 在计算机系统的中央处理单元和桥接芯片之间使用数据传输协调方法。 通过将计算机系统进入协调状态,执行数据传输协调方法。 通过桥芯片和CPU通过相互之间的最大位数,以经由前端总线进行数据传输。 然后,可以根据第一和第二最大比特数来协调CPU和桥接芯片之间用于数据传输的通用可操作的最大比特数。 一旦确定了通用可操作的最大位数,则CPU被复位以通常可操作的最大位数进行操作。 最大位数是总线传输宽度或总线传输速度。