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51. 发明授权

US5237667A Digital signal processor system having host processor for writing instructions into internal processor memory 失效
标题翻译：数字信号处理器系统具有用于将指令写入内部处理器存储器的主处
公开(公告)号：US5237667A
公开(公告)日：1993-08-17
申请号：US755503
申请日：1991-08-27
申请人： Tokumichi Murakami , Koh Kamizawa , Yoshiaki Katoh , Hideo Ohira , Masatoshi Kameyama , Naoto Kinjo
发明人： Tokumichi Murakami , Koh Kamizawa , Yoshiaki Katoh , Hideo Ohira , Masatoshi Kameyama , Naoto Kinjo
IPC分类号： G06F7/575 , G06F9/32 , G06F9/355 , G06F9/38 , G06F13/28 , G06F15/78
CPC分类号： G06F7/575 , G06F13/28 , G06F15/7832 , G06F15/7842 , G06F15/786 , G06F9/30058 , G06F9/30094 , G06F9/355 , G06F9/3877 , G06F9/3885 , G06F2207/3884
摘要： A digital signal processor of a simple circuit configuration capable of implementing arithmetic processes and interruption processes efficiently in a reduced number of steps at a high processing speed. The digital signal processor comprises instruction execution pipeline stages including a stage in which data is read from a data memory and the data is applied to an arithmetic unit; an arithmetic unit for the execution stage, including a barrel shifter, a multiplier and an arithmetic and logic unit, a normalizing barrel shifter, a round-off/accumulation adder, internal data memories and a DMA transfer bus for a write/accumulation stage, an address generating unit capable of parallel and two-dimensional generation of two inputs one output data memory addresses and a DMA control unit for controlling the two-dimensional data transfer through a DMA bus between the internal data memories and an external data memory for an instruction execution stage.
摘要翻译：一种简单的电路配置的数字信号处理器，其能够以高处理速度以减少的步数有效地实现算术处理和中断处理。数字信号处理器包括指令执行流水线级，包括从数据存储器读取数据并将数据应用于运算单元的阶段; 用于执行级的运算单元，包括桶形移位器，乘法器和算术和逻辑单元，归一化桶形移位器，舍入/累积加法器，用于写入/累加级的内部数据存储器和DMA传输总线，地址产生单元，其能够并行和二维地生成两个输入，一个输出数据存储器地址和用于控制通过内部数据存储器之间的DMA总线和用于指令的外部数据存储器的二维数据传输的DMA控制单元执行阶段

52. 发明授权

US5045993A Digital signal processor 失效
标题翻译：数字信号处理器
公开(公告)号：US5045993A
公开(公告)日：1991-09-03
申请号：US201208
申请日：1988-06-03
申请人： Tokumichi Murakami , Koh Kamizawa , Yoshiaki Katoh , Hideo Ohira , Masatoshi Kameyama , Naoto Kinjo
发明人： Tokumichi Murakami , Koh Kamizawa , Yoshiaki Katoh , Hideo Ohira , Masatoshi Kameyama , Naoto Kinjo
IPC分类号： G06F7/575 , G06F9/32 , G06F9/345 , G06F9/355 , G06F9/38 , G06F13/28 , G06F15/78
CPC分类号： G06F7/575 , G06F13/28 , G06F15/7832 , G06F15/786 , G06F9/30058 , G06F9/30094 , G06F9/345 , G06F9/355 , G06F9/3877 , G06F9/3885 , G06F2207/3884
摘要： A digital signal processor of a simple circuit configuration capable of implementing arithmetic processes and interruption processes efficiently in a reduced number of steps at a high processing speed. The digital signal processor comprises instruction execution pipeline stages including a stage in which data is read from a data memory and the data is applied to an arithmetic unit; an arithmetic unit for the execution stage, including a barrel shifter, a multiplier and an arithmetic and logic unit, a normalizing barrel shifter, a round-off/accumulation adder, internal data memories and a DMA transfer bus for a write/accumulation stage, an address generating unit capable of parallel and two-dimensional generation of two inputs one output data memory addresses and a DMA control unit for controlling the two-dimensional data transfer through a DMA bus between the internal data memories and an external data memory for an instruction execution stage.

53. 发明申请

US20090268260A1 IMAGE READING APPARATUS 有权
标题翻译：图像阅读器
公开(公告)号：US20090268260A1
公开(公告)日：2009-10-29
申请号：US11940314
申请日：2007-11-14
申请人： Hideo Ohira , Yoshinori Osakabe
发明人： Hideo Ohira , Yoshinori Osakabe
IPC分类号： H04N1/04
CPC分类号： H04N1/00795 , H04N2201/0081 , H04N2201/0422
摘要： An image reading apparatus includes an original-sheet support table and reading an image on an original sheet supported by the original-sheet support table. The original-sheet support table includes: (a) an original-sheet support surface on which the original sheet is supported; (b) a contact surface which stands up from the original-sheet support surface and is contactable with one side of the original sheet supported by the original-sheet support surface; and (c) at least one guide mark which is provided in the contact surface. The original sheet is positioned on the original-sheet support surface in a state in which the one side of the original sheet is held in contact with the contact surface of the original-sheet support table and one end of the one side of the original sheet is aligned with the at least one guide mark.
摘要翻译：图像读取装置包括原稿支撑台，并且在由原稿支撑台支撑的原稿上读取图像。原稿支持表包括：（a）支持原稿的原件支撑表面; （b）从原稿支撑面立起并与由原稿支撑面支撑的原稿的一面接触的接触面; 和（c）设置在接触表面中的至少一个引导标记。在原稿片的一侧与原稿片支承台的接触面保持接触的状态下，将原稿片放置在原稿支承面上，并且原稿的一侧的一端与至少一个引导标记对准。

54. 发明授权

US07075989B2 Motion compensating apparatus, moving image coding apparatus and method 失效
标题翻译：运动补偿装置，运动图像编码装置及方法
公开(公告)号：US07075989B2
公开(公告)日：2006-07-11
申请号：US10837704
申请日：2004-05-04
申请人： Tokumichi Murakami , Hideo Ohira , Hirofumi Nishikawa , Kenichi Asano , Yoshihisa Yamada , Shunichi Sekiguchi , Kohtaro Asai
发明人： Tokumichi Murakami , Hideo Ohira , Hirofumi Nishikawa , Kenichi Asano , Yoshihisa Yamada , Shunichi Sekiguchi , Kohtaro Asai
IPC分类号： H04N7/12
CPC分类号： H04N11/042 , H04N19/51 , H04N19/517 , H04N19/567
摘要： The present invention provides a motion compensating apparatus which is capable of enhancing the overall coding efficiency by taking the amount of coded information used to code a motion vector as well as the sum of difference absolute values of estimated differences into consideration in order to determine an optimal vector. The motion compensating apparatus includes: a motion compensation processing unit for outputting a motion vector between an input image and a reference image, and an estimated image which is extracted from the reference image in accordance with the motion vector; a unit for calculating the sum of difference absolute values, as a distortion amount calculating unit, to obtain a distortion amount between the input image and the estimated image; a vector value coding unit for receiving the motion vector to code the motion vector thus inputted thereto to output a vector coded amount; and an optimal vector determining unit for receiving the motion vector, the distortion amount and the vector coded amount to obtain, for all of a plurality of motion vectors to be evaluated, an evaluation function calculated from the distortion amount and the vector coded amount to output as an optimal vector the motion vector in which the evaluation function exhibits a minimum value.
摘要翻译：本发明提供一种运动补偿装置，其能够通过考虑用于编码运动矢量的编码信息的量以及估计差的绝对值之和来提高整体编码效率，以便确定最优向量。运动补偿装置包括：运动补偿处理单元，用于输出输入图像和参考图像之间的运动矢量，以及根据运动矢量从参考图像中提取的估计图像; 用于计算差分绝对值之和作为失真量计算单元获得输入图像与估计图像之间的失真量的单元; 矢量值编码单元，用于接收运动矢量以对输入的运动矢量进行编码，以输出矢量编码量; 以及最佳向量确定单元，用于接收所述运动矢量，所述失真量和矢量编码量，以针对要评估的多个运动矢量的全部获得从所述失真量和所述矢量编码量计算出的评估函数以输出作为评估函数呈现最小值的运动矢量的最佳向量。

55. 发明授权

US06641966B2 Toner composition 有权
公开(公告)号：US06641966B2
公开(公告)日：2003-11-04
申请号：US09941555
申请日：2001-08-30
申请人： Akira Endo , Mitsuru Ohta , Hideo Ohira
发明人： Akira Endo , Mitsuru Ohta , Hideo Ohira
IPC分类号： G03G09087
CPC分类号： G03G9/0821 , G03G9/0827 , G03G9/08793 , G03G9/08795 , G03G9/08797
摘要： A toner composition having a high light transmission when printed on a transparent medium, in addition to being superior in strength and durability is provided. Binder resin particles manufactured through a dispersing polymerization method are colored using at least one kind of dye and are then subjected to a process of injecting an organic finely divided powder and a charge controlling agent and to a process of externally adding a hydrophobic silica and a conductive titanium oxide, thereby making a toner composition having a gel percentage of 2 to 15%.

56. 发明授权

US06590615B2 Digital video receiving apparatus 失效
公开(公告)号：US06590615B2
公开(公告)日：2003-07-08
申请号：US09970951
申请日：2001-10-05
申请人： Tokumichi Murakami , Hideo Ohira
发明人： Tokumichi Murakami , Hideo Ohira
IPC分类号： H04N1104
CPC分类号： H04N21/4347 , H04N5/4401 , H04N5/45 , H04N19/30 , H04N19/436
摘要： The present invention provides a digital video receiving apparatus for displaying a plurality of digital TV pictures on a plurality of receiving terminal apparatuses. The digital video receiving apparatus includes a tuner for extracting the received digital TV multiplexed signal, a demodulator for decoding the digital signals provided from the tuner, a demultiplexer for demultiplexing the multiplexed signals outputted from the demodulator to obtain a bit stream including a video signal, an audio signal and a data signal. The digital video receiving apparatus further includes a video decoder, an audio decoder and a data decoder for decoding signals outputted from the demultiplexer. The digital video receiving apparatus decodes the input multiplexed digital TV signal and outputs a video signal, an audio signal and a data signal corresponding to respective programs.

57. 发明授权

US06558865B2 Toner composition 有权
公开(公告)号：US06558865B2
公开(公告)日：2003-05-06
申请号：US09956025
申请日：2001-09-20
申请人： Akira Endo , Mitsuru Ohta , Hideo Ohira
发明人： Akira Endo , Mitsuru Ohta , Hideo Ohira
IPC分类号： G03G908
CPC分类号： G03G9/0819 , G03G9/0802 , G03G9/0825 , G03G9/0827 , G03G9/097 , G03G9/09708 , G03G9/09716 , G03G9/09725
摘要： A toner composition that permits printing of clear-cut and high image quality without developing a fog or a blur is provided. Binder resin particles manufactured through a dispersing polymerization method are colored using a dye and are then subjected to a process of injecting an organic finely divided powder and a charge controlling agent and to a process of externally adding a hydrophobic silica and a conductive titanium oxide, thereby making a toner composition having an average particle diameter by volume of 7 &mgr;m or less, a coagulation level of 10% or less, and an external additive coating ratio of 70% or less

58. 发明授权

US5671226A Multimedia information processing system 失效
标题翻译：多媒体信息处理系统
公开(公告)号：US5671226A
公开(公告)日：1997-09-23
申请号：US462519
申请日：1995-06-05
申请人： Tokumichi Murakami , Kazuhiro Matsuzaki , Yoshiaki Kato , Hideo Ohira
发明人： Tokumichi Murakami , Kazuhiro Matsuzaki , Yoshiaki Kato , Hideo Ohira
IPC分类号： H04N7/52 , H04L12/56
CPC分类号： H04N21/2368 , H04N21/236 , H04N21/23614 , H04N21/2383 , H04N21/242 , H04N21/4302 , H04N21/434 , H04N21/4341 , H04N21/4344 , H04N21/4348 , H04N21/4382 , H04N21/64322 , H04N7/52
摘要： A multimedia information processing system comprises an information-source coding section for generating an element packet containing coded multimedia information and additional information to specify the packet, a packet multiplexing section for generating multiplexed stream by multiplexing the element packet, and a transmission processing section for outputting the multiplexed stream as a transmission signal corresponding transmission media. In this multimedia information processing system, a processing sequence from selection of multimedia information to transmission or storage processing is classified, and the processing contents and input/output data are determined for each hierarchy. Data exchange between services such as broadcasting, communication, storage in computer and so on can be easily attained. Additionally, hardware structure of this system can be simplified, and additional functions can be easily added.
摘要翻译：一种多媒体信息处理系统，包括：信息源编码部分，生成包含编码多媒体信息的元素分组和用于指定分组的附加信息;分组复用部分，用于通过复用元素分组来产生多路复用流;以及发送处理部分，用于输出复用流作为传输信号对应传输媒体。在该多媒体信息处理系统中，对从多媒体信息的选择到发送或存储处理的处理顺序进行分类，对各层次确定处理内容和输入/输出数据。可以容易地实现广播，通信，计算机存储等服务之间的数据交换。此外，该系统的硬件结构可以简化，可以轻松添加附加功能。

59. 发明授权

US5590291A Digital signal processing system for limiting a result to be predetermined bit count 失效
标题翻译：用于将结果限制为预定位计数的数字信号处理系统
公开(公告)号：US5590291A
公开(公告)日：1996-12-31
申请号：US562
申请日：1993-01-04
申请人： Tokumichi Murakami , Hideo Ohira
发明人： Tokumichi Murakami , Hideo Ohira
IPC分类号： H04N7/26 , H04N7/36 , H04N7/46 , G06F3/14
CPC分类号： H04N19/00 , H04N19/43 , H04N19/436 , H04N19/51 , H04N19/533 , H04N19/577 , H04N19/587 , H04N19/30
摘要： A video codec (coder-decoder) system inputs consecutively admitted frames of sub-sampled video data obtained by sub-sampling video data in units of frames. The video data is coded in parallel by internal coding circuits. This averages the numbers of significant pixels in the sub-sampled video data to be processed. The coded video data is composed so as to comply with specifications of the receiving equipment. Upon transmission, the data is again sub-sampled depending on the number of coding circuits on the receiving side. Each block of the sub-sampled data is given a header for consecutive transmission. This allows for a certain period of time between pieces of data that arrive at the receiving side, thereby eliminating time differences in receiving and coding.
摘要翻译：视频编解码器（编码器 - 解码器）系统输入通过以帧为单位对视频数据进行子采样获得的子采样视频数据的连续允许帧。视频数据由内部编码电路并行编码。这将对待处理的子采样视频数据中的有效像素数进行平均。编码视频数据被构成为符合接收设备的规格。在发送时，根据接收侧的编码电路的数量再次对数据进行子采样。子采样数据的每个块都被给出用于连续传输的报头。这允许在到达接收侧的数据段之间的一定时间段，从而消除接收和编码中的时间差异。

60. 发明授权

US5504916A Digital signal processor with direct data transfer from external memory 失效
标题翻译：数字信号处理器，可直接从外部存储器传输数据
公开(公告)号：US5504916A
公开(公告)日：1996-04-02
申请号：US128257
申请日：1993-09-28
申请人： Tokumichi Murakami , Koh Kamizawa , Hideo Ohira
发明人： Tokumichi Murakami , Koh Kamizawa , Hideo Ohira
IPC分类号： G06T7/20 , H04N5/14 , H04N7/26 , G06F13/32
CPC分类号： G06T7/202 , G06T7/2013 , G06T7/2026 , H04N19/43 , H04N19/433 , H04N19/51 , H04N19/533 , H04N5/145 , G06T2200/28 , G06T2207/10016
摘要： A digital signal processor having a DMA controller adapted for image processing while transmitting data between an internal memory and an external memory. The DMA controller includes a frame horizontal size register for representing a horizontal size of a two dimensional address space and block horizontal size register for representing a horizontal size of a rectangular portion in the two dimensional address space with a block address register for indicating a head address of source area, an internal memory start address register for representing a head address of destination area, and a word register. An address calculation unit in the DMA controller generates addresses based on two horizontal size register. An external data memory connecting unit in DSP for connecting the internal memory and the external memory has two modes. One is a mode of outputting an address in two machine cycles, and the other is a mode of outputting an address in one machine cycle.
摘要翻译：一种具有DMA控制器的数字信号处理器，适于在内部存储器和外部存储器之间传输数据的同时进行图像处理。 DMA控制器包括用于表示二维地址空间的水平尺寸的帧水平尺寸寄存器和用于表示二维地址空间中的矩形部分的水平尺寸的块水平尺寸寄存器，其具有用于指示头地址的块地址寄存器的源区域，用于表示目的地区域的头地址的内部存储器起始地址寄存器和字寄存器。 DMA控制器中的地址计算单元基于两个水平尺寸寄存器生成地址。用于连接内部存储器和外部存储器的DSP中的外部数据存储器连接单元具有两种模式。一种是在两个机器周期中输出地址的模式，另一种是在一个机器周期中输出地址的模式。

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