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51. 发明授权

US07449348B1 Feedback control of imprint mask feature profile using scatterometry and spacer etchback 有权
标题翻译：使用散射法和间隔蚀刻蚀刻对印迹掩模特征轮廓的反馈控制
公开(公告)号：US07449348B1
公开(公告)日：2008-11-11
申请号：US10858605
申请日：2004-06-02
申请人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian , Khoi A. Phan
发明人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian , Khoi A. Phan
IPC分类号： H01L21/00
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00 , H01L22/12
摘要： The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate compensating for retrograde feature profiles on an imprint mask. An aspect of the invention generates feedback information that facilitates control of imprint mask feature profile via employing a scatterometry system to detect retrograde feature profiles, and mitigating the retrograde profiles via a spacer etchback procedure.
摘要翻译：本发明一般涉及光刻系统和方法，更具体地涉及有助于补偿压印掩模上逆行特征轮廓的系统和方法。本发明的一个方面产生反馈信息，其通过使用散射测量系统来检测逆行特征轮廓，以及通过间隔回蚀程序来缓解逆行轮廓，从而有助于控制压印掩模特征轮廓。

52. 发明授权

US07221060B1 Composite alignment mark scheme for multi-layers in lithography 有权
标题翻译：光刻多层复合对准标记方案
公开(公告)号：US07221060B1
公开(公告)日：2007-05-22
申请号：US11074602
申请日：2005-03-08
申请人： Bhanwar Singh , Khoi A. Phan , Bharath Rangarajan , Iraj Emami , Ramkumar Subramanian
发明人： Bhanwar Singh , Khoi A. Phan , Bharath Rangarajan , Iraj Emami , Ramkumar Subramanian
IPC分类号： H01L23/544
CPC分类号： G03F7/70625 , G03F7/70633 , G03F9/7076 , Y10S438/975
摘要： Systems and/or methods are disclosed for aligning multiple layers of a multi-layer semiconductor device fabrication process and/or system utilizing a composite alignment mark. A component is provided to form the composite alignment mark, such that a first portion of the composite alignment mark is associated with a layer of the wafer and a second portion of the composite alignment mark is associated with a disparate layer of the wafer. An alignment component is utilized to align a reticle for a layer to be patterned to the composite alignment mark.
摘要翻译：公开了用于对准多层半导体器件制造工艺和/或利用复合对准标记的系统的多层的系统和/或方法。提供组件以形成复合对准标记，使得复合对准标记的第一部分与晶片的层相关联，并且复合对准标记的第二部分与晶片的不同层相关联。使用对准部件将待图案化的层的掩模版对准到复合对准标记。

53. 发明授权

US07109046B1 Surface oxide tabulation and photo process control and cost savings 失效
标题翻译：表面氧化物制图和照相工艺控制和成本节约
公开(公告)号：US07109046B1
公开(公告)日：2006-09-19
申请号：US10768514
申请日：2004-01-30
申请人： Ramkumar Subramanian , Bhanwar Singh , Khoi A. Phan
发明人： Ramkumar Subramanian , Bhanwar Singh , Khoi A. Phan
IPC分类号： H01L21/00
CPC分类号： H01L22/12
摘要： The present invention relates generally to semiconductor processing, and more particularly to methods and systems for reducing costs of wafer production by analyzing key aspects of wafer status to determine whether to initiate corrective measures to salvage a wafer at an early stage and before substantial costs are incurred in fabricating a defective wafer. One aspect of the present invention provides for growing an oxide layer on a wafer upon a determination that an oxide layer on the wafer surface is absent or is present but inadequate. Another aspect of the present invention provides for a determination of whether to apply preemptory corrective treatment(s) to a wafer surface based on the presence and/or magnitude of nitrogen signatures in an extant oxide surface layer, which can indicate that an undesirable defect known as “footing” will occur during a post-exposure delay period. Thus, the invention advantageously reduces production costs by facilitating a most correct decision to mitigate the source(s) of potential defects at an early stage and, thus, before substantial costs are incurred in production of the wafer.
摘要翻译：本发明一般涉及半导体处理，更具体地说，涉及通过分析晶片状态的关键方面来降低晶片生产成本的方法和系统，以确定是否启动在早期阶段挽救晶片的纠正措施以及在大量成本产生之前在制造缺陷晶片时。本发明的一个方面提供了在确定晶片表面上的氧化物层不存在或存在但不足的情况下，在晶片上生长氧化物层。本发明的另一方面提供了根据现有氧化物表面层中氮标记的存在和/或大小来确定是否对晶片表面施加抢占式校正处理，其可以指示不期望的缺陷已知因为在曝光后延迟期间将发生“立足”。因此，本发明有利地通过促进最正确的决定来降低生产成本，以在早期阶段减轻潜在缺陷的来源，并且因此在生产晶片之前花费大量成本之前。

54. 发明授权

US07076320B1 Scatterometry monitor in cluster process tool environment for advanced process control (APC) 有权
标题翻译：用于高级过程控制（APC）的集群过程工具环境中的散射测量监视器
公开(公告)号：US07076320B1
公开(公告)日：2006-07-11
申请号：US10838827
申请日：2004-05-04
申请人： Khoi A. Phan , Bhanwar Singh , Ramkumar Subramanian
发明人： Khoi A. Phan , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： G06F19/00
CPC分类号： H01L21/67253 , G03F7/70525
摘要： Systems and methods that improve process control in semiconductor manufacturing are disclosed. According to an aspect of the invention, conditions in a cluster tool environment and/or a wafer therein can be monitored in-situ via, for example, a scatterometry system, to determine whether parameters associated with wafer production are within control limits. A cluster tool environment can include, for example, a lithography track, a stepper, a plasma etcher, a cleaning tool, a chemical bath, etc. If an out-of-control condition is detected, either associated with a tool in the cluster tool environment or with the wafer itself, compensatory measures can be taken to correct the out-of-control condition. The invention can further employ feedback/feed-forward loop(s) to facilitate compensatory action in order to improve process control.
摘要翻译：公开了改进半导体制造过程控制的系统和方法。根据本发明的一个方面，可以通过例如散射测量系统原地监测集群工具环境和/或其中的晶片中的条件，以确定与晶片生产相关的参数是否处于控制限度内。集群工具环境可以包括例如光刻轨迹，步进器，等离子体蚀刻器，清洁工具，化学浴等。如果检测到失控状态，则与集群中的工具相关联工具环境或晶圆本身，可采取补偿措施来纠正失控状态。本发明可以进一步采用反馈/前馈回路来促进补偿动作，以改善过程控制。

55. 发明授权

US07064846B1 Non-lithographic shrink techniques for improving line edge roughness and using imperfect (but simpler) BARCs 有权
标题翻译：非光刻收缩技术，用于改善线边缘粗糙度并使用不完美（但更简单）的BARC
公开(公告)号：US07064846B1
公开(公告)日：2006-06-20
申请号：US10646190
申请日：2003-08-22
申请人： Gilles Amblard , Bhanwar Singh , Khoi A. Phan , Ramkumar Subramanian
发明人： Gilles Amblard , Bhanwar Singh , Khoi A. Phan , Ramkumar Subramanian
IPC分类号： G01B11/04
CPC分类号： G03F7/40
摘要： The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate the reduction of line-edge roughness (LER) and/or standing wave expression during pattern line formation in an integrated circuit. Systems and methods are disclosed for retaining a target critical dimension (CD) of photoresist lines, comprising a non-lithographic shrink component that facilitates mitigating LER and/or standing wave expression, wherein the shrink component is employed to heat a particular resist to the glass transition temperature of the resist to effectuate mitigation of LER and/or standing wave expression. Additionally, by heating the resist to its glass transition temperature, the systems and methods of the present invention effectively impede deviation from a desired target critical dimension.
摘要翻译：本发明一般涉及光刻系统和方法，更具体地涉及有助于在集成电路中的图案线形成期间减少线边缘粗糙度（LER）和/或驻波表达的系统和方法。公开了用于保持光致抗蚀剂线的目标临界尺寸（CD）的系统和方法，其包括有助于减轻LER和/或驻波表达的非光刻收缩组分，其中采用收缩组分将特定抗蚀剂加热到玻璃抗蚀剂的转变温度来实现LER和/或驻波表达的缓解。此外，通过将抗蚀剂加热至其玻璃化转变温度，本发明的系统和方法有效地阻止了偏离所需目标临界尺寸。

56. 发明授权

US07056646B1 Use of base developers as immersion lithography fluid 有权
标题翻译：使用基底显影剂作为浸没光刻液
公开(公告)号：US07056646B1
公开(公告)日：2006-06-06
申请号：US10676749
申请日：2003-10-01
申请人： Gilles Amblard , Bhanwar Singh , Khoi A. Phan
发明人： Gilles Amblard , Bhanwar Singh , Khoi A. Phan
IPC分类号： G03F7/20
CPC分类号： G03F7/2041 , G03F7/322 , G03F7/70341
摘要： Disclosed are immersion lithography methods involving using a base developer as an immersion lithography fluid. Consequently, it is unnecessary to contact a developer with an irradiated resist after the immersion lithography fluid is removed.
摘要翻译：公开了涉及使用基底显影剂作为浸没光刻流体的浸没式光刻方法。因此，在浸没光刻液被去除之后，不需要将曝光的抗蚀剂接触显影剂。

57. 发明授权

US06924157B1 Real time particle monitor inside of plasma chamber during resist strip processing 失效
标题翻译：抗蚀带处理过程中等离子体室内实时粒子监测
公开(公告)号：US06924157B1
公开(公告)日：2005-08-02
申请号：US10277003
申请日：2002-10-21
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
IPC分类号： H01L21/00
CPC分类号： H01L21/67288 , H01J2237/0225 , H01J2237/3342
摘要： One aspect of the present invention relates to a system and method for controlling defect formation during a resist strip process. The system includes a reaction chamber comprising a patterned resist layer overlying a semiconductor structure wherein the resist layer is being exposed to a plasma material flowing into the chamber in order to facilitate removing the resist layer from the structure, a plasma-resist particle monitoring system connected to the reaction chamber and programmed to determine a particle count in the reaction chamber during the resist strip process, and a reaction controller coupled to the chamber and to the monitoring system, the reaction controller being programmed to receive particle data from the monitoring system to facilitate determining whether the counted particles in the chamber are within a tolerable limit. The method involves continuing to expose the structure and the chamber to the plasma until an acceptable particle count is obtained.
摘要翻译：本发明的一个方面涉及一种用于在抗蚀剂剥离过程中控制缺陷形成的系统和方法。该系统包括反应室，其包括覆盖半导体结构的图案化抗蚀剂层，其中抗蚀剂层暴露于流入室中的等离子体材料，以便于从结构去除抗蚀剂层;连接的等离子体抗蚀剂颗粒监测系统并且被编程为在抗蚀剂剥离过程期间确定反应室中的颗粒计数，以及耦合到室和反应控制器的反应控制器，反应控制器被编程为从监测系统接收颗粒数据以促进确定室中的计数颗粒是否在可容忍的极限内。该方法包括继续将结构和室暴露于等离子体，直到获得可接受的颗粒数。

58. 发明授权

US06915177B2 Comprehensive integrated lithographic process control system based on product design and yield feedback system 有权
标题翻译：基于产品设计和产量反馈系统的综合光刻过程控制系统
公开(公告)号：US06915177B2
公开(公告)日：2005-07-05
申请号：US10261569
申请日：2002-09-30
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
IPC分类号： G03F7/20 , H01L21/66 , G06F19/00
CPC分类号： G03F7/70525 , G03F7/70616 , G03F7/70858 , H01L22/20
摘要： The present invention provides systems and methods that facilitate performing fabrication process. Critical parameters are valued collectively as a quality matrix, which weights respective parameters according to their importance to one or more design goals. The critical parameters are weighted by coefficients according to information such as, product design, simulation, test results, yield data, electrical data and the like. The invention then can develop a quality index which is a composite “score” of the current fabrication process. A control system can then do comparisons of the quality index with design specifications in order to determine if the current fabrication process is acceptable. If the process is unacceptable, test parameters can be modified for ongoing processes and the process can be re-worked and re-performed for completed processes. As such, respective layers of a device can be customized for different specifications and quality index depending on product designs and yields.
摘要翻译：本发明提供了便于执行制造过程的系统和方法。关键参数被统称为质量矩阵，其根据其对一个或多个设计目标的重要性来对各个参数进行加权。关键参数根据产品设计，仿真，测试结果，产量数据，电气数据等信息对系数进行加权。然后，本发明可以开发质量指数，其是当前制造过程的综合“评分”。然后，控制系统可以将质量指标与设计规范进行比较，以便确定当前的制造过程是否可接受。如果该过程是不可接受的，则可以对正在进行的过程修改测试参数，并且可以对完成的过程重新处理和重新执行该过程。因此，根据产品设计和产量，可以针对不同的规格和质量指数定制装置的各个层。

59. 发明授权

US06818360B1 Quartz mask crack monitor system for reticle by acoustic and/or laser scatterometry 失效
标题翻译：用于通过声学和/或激光散射测量的石英掩模裂纹监测系统
公开(公告)号：US06818360B1
公开(公告)日：2004-11-16
申请号：US10261571
申请日：2002-09-30
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
IPC分类号： G03F900
CPC分类号： G03F1/84 , G01N21/47 , G01N21/9501 , G01N21/956 , G03F1/26
摘要： A system that monitors and controls a phase shift mask fabrication process is disclosed. Acoustic beams and/or beams of light are selectively directed at portions of the mask to scan the mask as it matriculates through the fabrication process. Portions of the beams that pass through and/or are reflected from the mask are collected and examined, such as in accordance with scatterometry based techniques, to determine, for example, whether cracks or other defects are forming on or within the mask, and/or whether features, such as apertures, are being formed as desired. The measurements can be employed to generate feed forward and/or feedback control data that can utilized to selectively adjust one or more fabrication components and/or operating parameters associated therewith to adapt the fabrication process. Controlling the mask fabrication process facilitates improved mask fabrication and resulting chip quality as compared to conventional systems.
摘要翻译：公开了一种监测和控制相移掩模制造工艺的系统。声波束和/或光束被选择性地定向在掩模的部分，以在掩模通过制造过程进入时扫描掩模。通过和/或从掩模反射的光束的部分被收集和检查，例如根据基于散射法的技术，以确定例如是否在掩模上或面罩内形成裂纹或其它缺陷，和/ 或者是否根据需要形成诸如孔的特征。可以采用测量来产生可以用于选择性地调整一个或多个制造部件和/或与其相关联的操作参数以适应制造过程的前馈和/或反馈控制数据。与常规系统相比，控制掩模制造工艺有助于改进掩模制造和产生的芯片质量。

60. 发明授权

US06784446B1 Reticle defect printability verification by resist latent image comparison 有权
标题翻译：光栅缺陷可印刷性验证通过抗蚀剂潜像比较
公开(公告)号：US06784446B1
公开(公告)日：2004-08-31
申请号：US10230714
申请日：2002-08-29
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
IPC分类号： G01N2186
CPC分类号： G01N21/95692
摘要： One aspect of the present invention relates to a system and method for detecting defects on a reticle by inspecting latent images printed on a resist wafer by the reticle. The system includes a wafer having a printed photoresist layer formed thereon, a latent image inspection system connected to the wafer exposure system for examining the printed photoresist layer in order to determine whether a reticle employed to print the photoresist layer is defective, and a processor for receiving data from the inspection system in order to verify the presence of defects on the reticle. The method involves printing a first latent image, a second latent image, and a third latent image on a resist wafer using a reticle, and comparing the three latent images to one another to determine whether the reticle is defective. Comparison of the latent images may be facilitated by employing an optical system programmed to perform such comparisons.
摘要翻译：本发明的一个方面涉及通过检查通过掩模版印刷在抗蚀剂晶片上的潜像来检测掩模版上的缺陷的系统和方法。该系统包括其上形成有印刷的光致抗蚀剂层的晶片，连接到晶片曝光系统以检查印刷的光致抗蚀剂层以便确定用于印刷光致抗蚀剂层的掩模版是否有缺陷的潜像检查系统，以及用于从检查系统接收数据，以验证掩模版上是否存在缺陷。该方法包括使用掩模版在抗蚀剂晶片上印刷第一潜像，第二潜像和第三潜像，并将三个潜像彼此进行比较，以确定掩模版是否有缺陷。可以通过使用被编程为执行这种比较的光学系统来促进潜像的比较。

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