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51. 发明授权

US07122434B2 Method for generating an electrical contact with buried track conductors 有权
标题翻译：用于产生与埋地轨道导体电接触的方法
公开(公告)号：US07122434B2
公开(公告)日：2006-10-17
申请号：US11124726
申请日：2005-05-09
申请人： Christoph Ludwig , Klaus-Dieter Morhard , Christoph Kutter
发明人： Christoph Ludwig , Klaus-Dieter Morhard , Christoph Kutter
IPC分类号： H01L21/8234
CPC分类号： H01L27/115 , H01L21/76897 , H01L23/522 , H01L23/528 , H01L27/0207 , H01L27/10885 , H01L27/10888 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure 300 comprises a plurality of first track conductors 303, a plurality of second track conductors 304, which are insulated with respect to the first track conductors 303 and form a grid together with these first track conductors 303, and a plurality of third track conductors 307 parallel above the first track conductors 303, which third track conductors 307 partly cover the second track conductors 304 and are insulated with respect thereto, in which semiconductor structure 300, between in each case two adjacent second track conductors 304, there is located an electrical contact 305 between each first track conductor 303 and the corresponding third track conductor 307 which lies above it.
摘要翻译：半导体结构300包括多个第一轨道导体303，多个第二轨道导体304，其相对于第一轨道导体303绝缘并与这些第一轨道导体303一起形成栅格，以及多个第三轨道导体307平行于第一轨道导体303之上，第三轨道导体307部分地覆盖第二轨道导体304并相对于其彼此绝缘，其中半导体结构300在每种情况下在两个相邻的第二轨道导体304之间位于每个第一轨道导体303和位于其上方的对应的第三轨道导体307之间的电接触305。

52. 发明授权

US06368970B1 Semiconductor configuration and corresponding production process 有权
标题翻译：半导体配置及相应的生产工艺
公开(公告)号：US06368970B1
公开(公告)日：2002-04-09
申请号：US09645238
申请日：2000-08-24
申请人： Ayad Abdul-Hak , Achim Gratz , Christoph Ludwig , Reinhold Rennekamp , Elard Stein Von Kamienski , Peter Wawer
发明人： Ayad Abdul-Hak , Achim Gratz , Christoph Ludwig , Reinhold Rennekamp , Elard Stein Von Kamienski , Peter Wawer
IPC分类号： H01L21302
CPC分类号： H01L21/76232 , H01L21/823481
摘要： A process for producing a semiconductor configuration includes the steps of providing a semiconductor substrate, providing a buffer oxide layer on the semiconductor substrate and providing a hard mask on the buffer oxide layer. An STI trench is etched by using the hard mask and a liner oxide layer is provided in the STI trench. The hard mask is removed to expose the buffer oxide layer and the buffer oxide layer is removed by an etching process. The buffer oxide layer is etched more rapidly than the liner oxide layer in the etching process. A gate oxide layer is provided on the semiconductor substrate. A semiconductor configuration is also provided.
摘要翻译：一种制造半导体结构的方法包括以下步骤：提供半导体衬底，在半导体衬底上提供缓冲氧化物层，并在缓冲氧化物层上提供硬掩模。通过使用硬掩模蚀刻STI沟槽，并且在STI沟槽中提供衬垫氧化物层。去除硬掩模以暴露缓冲氧化物层，并通过蚀刻工艺除去缓冲氧化物层。在蚀刻工艺中，缓冲氧化物层比衬垫氧化物层蚀刻得更快。在半导体衬底上设置栅氧化层。还提供半导体配置。

53. 发明授权

US07678679B2 Vertical device with sidewall spacer, methods of forming sidewall spacers and field effect transistors, and patterning method 失效
标题翻译：具有侧壁间隔件的垂直装置，形成侧壁间隔物的方法和场效应晶体管，以及图案化方法
公开(公告)号：US07678679B2
公开(公告)日：2010-03-16
申请号：US11414553
申请日：2006-05-01
申请人： Dirk Manger , Jyoti Gupta , Christoph Ludwig , Hans Lindemann
发明人： Dirk Manger , Jyoti Gupta , Christoph Ludwig , Hans Lindemann
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L21/28247 , H01L29/6653 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： A growth material that grows selectively on the vertical sidewalls of a vertical device forms sidewall spacers on substantially vertical sidewalls of the vertical device that is disposed on a horizontal substrate surface of a semiconductor substrate. A spacer-like seed liner may be provided on the vertical sidewalls of the vertical device to control selective growth. The vertical device may be a gate electrode of a field effect transistor (FET). With selectively grown sidewall spacers, heavily doped contact regions of the FET may be precisely spaced apart from the gate electrode. The distance of the heavily doped contact regions to the gate electrode does not depend from the height of the gate electrode. Distances of more than 150 nm between the heavily doped contact region and the gate electrode may be achieved so as to facilitate the formation of, for example, DMOS devices.
摘要翻译：选择性地在垂直装置的垂直侧壁上生长的生长材料在垂直装置的基本上垂直的侧壁上形成侧壁间隔物，其设置在半导体衬底的水平衬底表面上。可以在垂直装置的垂直侧壁上设置间隔物种子衬垫，以控制选择性生长。垂直装置可以是场效应晶体管（FET）的栅电极。利用选择性地生长的侧壁间隔物，FET的重掺杂接触区域可以与栅电极精确地间隔开。重掺杂的接触区域与栅电极的距离不取决于栅电极的高度。可以实现重掺杂接触区域和栅电极之间超过150nm的距离，以便于例如DMOS器件的形成。

54. 发明申请

US20100058018A1 Memory Scheduler for Managing Internal Memory Operations 有权
标题翻译：用于管理内部存储器操作的内存调度器
公开(公告)号：US20100058018A1
公开(公告)日：2010-03-04
申请号：US12202581
申请日：2008-09-02
申请人： Michael Kund , Thomas Happ , GillYong Lee , Heinz Hoenigschmid , Rolf Weis , Christoph Ludwig
发明人： Michael Kund , Thomas Happ , GillYong Lee , Heinz Hoenigschmid , Rolf Weis , Christoph Ludwig
IPC分类号： G06F12/00
CPC分类号： G11C7/04 , G11C13/0002 , G11C13/0033 , G11C16/3431
摘要： An integrated circuit includes: a resistive memory having an array of resistive memory cells; a memory controller that controls operation of the resistive memory in accordance with external commands from an external device; and a memory scheduler coupled to the resistive memory and to the memory controller. The memory scheduler schedules internal maintenance operations within the resistive memory in response to trigger conditions indicated by at least one sensor signal or external command. The operation of the memory scheduler and performance of the internal maintenance operations are transparent to the external device and, optionally, transparent to the memory controller.
摘要翻译：集成电路包括：具有电阻存储器单元阵列的电阻性存储器; 存储器控制器，其根据来自外部设备的外部命令来控制所述电阻性存储器的操作; 以及耦合到电阻存储器和存储器控制器的存储器调度器。存储器调度器响应于由至少一个传感器信号或外部命令指示的触发条件来调度电阻性存储器内的内部维护操作。存储器调度器的操作和内部维护操作的性能对于外部设备是透明的，并且可选地对存储器控制器是透明的。

55. 发明申请

US20070221988A1 Charge trapping device and method of producing the charge trapping device 有权
标题翻译：电荷俘获装置及电荷俘获装置的制造方法
公开(公告)号：US20070221988A1
公开(公告)日：2007-09-27
申请号：US11390997
申请日：2006-03-27
申请人： Rainer Hagenbeck , Christoph Ludwig , Mark Isler , Elard Kamienski
发明人： Rainer Hagenbeck , Christoph Ludwig , Mark Isler , Elard Kamienski
IPC分类号： H01L29/76 , H01L29/94 , H01L31/00
CPC分类号： H01L29/0847 , H01L27/115 , H01L27/11568 , H01L29/66833 , H01L29/792
摘要： A charge-trapping device includes a field effect transistor, which has source and drain regions. The source and drain regions have a dopant concentration profile, which has a gradient each in a vertical and a lateral direction with respect to a surface of a semiconductor substrate. The gradient in the lateral direction towards a depletion region of the transistor is larger than the gradient in the vertical direction towards a well region.
摘要翻译：电荷捕获器件包括具有源极和漏极区域的场效应晶体管。源区和漏区具有掺杂剂浓度分布，其具有相对于半导体衬底的表面的垂直和横向方向的梯度。朝向晶体管的耗尽区域的横向的梯度大于朝向阱区域的垂直方向上的梯度。

56. 发明授权

US06917197B2 Device for adjusting an operating point of a magnetic field sensor 失效
标题翻译：用于调整磁场传感器的工作点的装置
公开(公告)号：US06917197B2
公开(公告)日：2005-07-12
申请号：US10487267
申请日：2002-08-07
申请人： Christoph Ludwig , Wolfgang Ludwig
发明人： Christoph Ludwig , Wolfgang Ludwig
IPC分类号： G01R33/035 , H01L39/22
CPC分类号： G01R33/0356
摘要： The invention relates to a device for setting an operating point of a magnetic field sensor having a periodic characteristic, in particular for a device for detecting a magnetic field and/or flux, having a SQUID as magnetic field sensor and a control unit which is connected downstream of the SQUID, has a control time constant (t) and has a feedback loop which acts on the SQUID and is designed such that it is active about a number of operating points of the SQUID, where flux quantum pump means are provided which are assigned to the SQUID, have a signal generation unit for generating a control and/or regulation signal for the SQUID and are designed such that, in order to pump at least one flux quantum into and out of the SQUID, a signal form of the control and/or regulation signal, generated by the signal generation unit, is different and, referred to a rising and a falling edge of a signal form, is unsymmetrical, where in each case only one of the edges of a signal form is short referred to the control time constant.
摘要翻译：本发明涉及一种用于设置具有周期性特性的磁场传感器的工作点的装置，特别是用于检测具有作为磁场传感器的SQUID和连接的控制单元的用于检测磁场和/或磁通的装置的装置 SQUID的下游具有控制时间常数（t）并且具有作用在SQUID上的反馈回路，并且被设计为使得其关于SQUID的多个工作点是活动的，其中提供了通量量子泵装置分配给SQUID的信号产生单元用于产生用于SQUID的控制和/或调节信号，并且被设计成使得为了将至少一个通量量子泵入和流出SQUID，控制信号形式和/或由信号产生单元生成的调节信号是不对称的，并且被称为信号形式的上升沿和下降沿是不对称的，其中在每种情况下，信号形式的边缘中只有一个是短的 d到控制时间常数。

57. 发明授权

US06628544B2 Flash memory cell and method to achieve multiple bits per cell 有权
标题翻译：闪存单元和方法来实现每个单元的多个位
公开(公告)号：US06628544B2
公开(公告)日：2003-09-30
申请号：US10057039
申请日：2002-01-25
申请人： Danny Shum , Georg Tempel , Christoph Ludwig
发明人： Danny Shum , Georg Tempel , Christoph Ludwig
IPC分类号： G11C1604
CPC分类号： G11C11/5642 , G11C5/145 , G11C11/5628 , G11C11/5635 , G11C16/0416 , G11C16/0433 , G11C2211/565
摘要： A method of flash memory cell programming is provided which uses a uniform electric potential across tunnel oxide. The tight Vt distribution and very stable Vt shift over program/erase cycling allows for a multi-level cell capable of having more than 2 bits per cell.
摘要翻译：提供了一种在隧道氧化物上使用均匀电势的闪存单元编程方法。紧密的Vt分布和非常稳定的Vt在编程/擦除循环中的移位允许一个能够在每个单元上具有超过2位的多级单元。

58. 外观设计

USD442873S1 Stand, especially for the mounting of a recording, detecting and controlling device 失效
标题翻译：特别适用于安装录音，检测和控制设备
公开(公告)号：USD442873S1
公开(公告)日：2001-05-29
申请号：US29124150
申请日：2000-05-31
申请人： Christoph Koennecke , Christoph Ludwig
设计人： Christoph Koennecke , Christoph Ludwig

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